Boris BREZILLON [Tue, 13 Oct 2015 09:22:18 +0000 (11:22 +0200)]
mtd: nand: pass page number to ecc->write_xxx() methods
The ->read_xxx() methods are all passed the page number the NAND controller
is supposed to read, but ->write_xxx() do not have such a parameter.
This is a problem if we want to properly implement data
scrambling/randomization in order to mitigate MLC sensibility to repeated
pattern: to prevent bitflips in adjacent pages in the same block we need
to avoid repeating the same pattern at the same offset in those pages,
hence the randomizer/scrambler engine need to be passed the page value
in order to adapt its seed accordingly.
Moreover, adding the page parameter to the ->write_xxx() methods add some
consistency to the current API.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Frans Klaver [Wed, 10 Jun 2015 20:38:35 +0000 (22:38 +0200)]
mtd: maps: sa1100-flash: show parent device in sysfs
Fix a bug where mtd parent device symlinks aren't shown in sysfs.
While at it, make use of the default owner value set by mtdcore.
Incidentally, it seems the owner field in the concatenated mtds is not
actually used, so this shouldn't make much of a difference anyway.
Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Frans Klaver [Wed, 10 Jun 2015 20:38:16 +0000 (22:38 +0200)]
mtd: core: set some defaults when dev.parent is set
If a parent device is set, add_mtd_device() has enough knowledge to fill
in some sane default values for the module name and owner. Do so if they
aren't already set.
Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Frans Klaver [Wed, 10 Jun 2015 20:38:15 +0000 (22:38 +0200)]
mtd: core: tone down suggestion that dev.parent should be set
add_mtd_device() has a comment suggesting that the caller should have
set dev.parent. This is required to have the parent device symlink show
up in sysfs, but not for proper operation of the mtd device itself.
Currently we have five drivers registering mtd devices during module
initialization, so they don't actually provide a parent device to link
to. That means we cannot WARN_ON() here, as it would trigger false
positives.
Make the comment a bit less firm in its assertion that dev.parent should
be set.
Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Anup Patel [Fri, 2 Oct 2015 17:56:42 +0000 (23:26 +0530)]
mtd: brcmnand: Fix pointer type-cast in brcmnand_write()
We should always type-cast pointer to "long" or "unsigned long"
because size of pointer is same as machine word size. This will
avoid pointer type-cast issues on both 32bit and 64bit systems.
This patch fixes pointer type-cast issue in brcmnand_write()
as-per above info.
Signed-off-by: Anup Patel <anup.patel@broadcom.com> Reviewed-by: Vikram Prakash <vikramp@broadcom.com> Reviewed-by: Ray Jui <rjui@broadcom.com> Reviewed-by: Scott Branden <sbranden@broadcom.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Dan Williams [Fri, 9 Oct 2015 22:16:51 +0000 (18:16 -0400)]
mtd: pxa2xx-flash: switch from ioremap_cache to memremap
In preparation for deprecating ioremap_cache() convert its usage in
pxa2xx-flash to memremap.
Cc: David Woodhouse <dwmw2@infradead.org>
[brian: also convert iounmap to memunmap] Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
When using nandsim to simulate a 128K block nand with `overridesize = 1',
the size of mtd device is too small (mtd_size = 4 * block_size) to get the
right length of bbt. Then when creating bbt, kzmalloc() will return
ZERO_SIZE_PTR. This causes a NULL pointer oops when scanning bbt.
Michal Suchanek [Tue, 18 Aug 2015 15:34:07 +0000 (15:34 +0000)]
mtd: mtdpart: add debug prints to partition parser.
The probe of a mtd device can fail when a partition parser returns
error. The failure due to partition parsing can be quite mysterious when
multiple partitioning schemes are compiled in and any of them can fail
the probe.
Add debug prints which show what parsers were tried and what they
returned.
Signed-off-by: Michal Suchanek <hramrach@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: lpc32xx_slc: fix calculation of timing arcs from given values
According to LPC32xx User's Manual all values measured in clock cycles
are programmable from 1 to 16 clocks (4 bits) starting from 0 in
bitfield, the current version of calculated clock cycles is too
conservative.
Correctness of 0 bitfield value (i.e. programmed 1 clock
timing) is proven with actual NAND chip devices.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: lpc32xx_slc: fix potential overflow over 4 bits
In case if quotient of controller clock rate to device clock rate does
not fit into 4 bit value, choose the maximum acceptable value 0xF, which
stands for 16 clocks.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
No functional change, move bitfield calculations to macro
definitions with added clock rate argument, which are in turn defined
by new common SLCTAC_CLOCKS(c, n, s) macro definition.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Boris BREZILLON [Wed, 30 Sep 2015 21:45:27 +0000 (23:45 +0200)]
mtd: nand: sunxi: retrieve corrected OOB bytes
The ECC engine is protecting a few OOB bytes. Retrieve them from the
USER_DATA register instead of reading them in raw mode (ie without the ECC
protection).
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Boris BREZILLON [Wed, 30 Sep 2015 21:45:25 +0000 (23:45 +0200)]
mtd: nand: sunxi: make use of sunxi_nfc_hw_ecc_read/write_chunk()
The sunxi_nfc_hw_ecc_read/write_chunk() functions have been created to
factorize the code in the normal and syndrome ECC implementation.
Make use of them where appropriate.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The logic behind normal and syndrome ECC handling is pretty much the same,
the only difference is the ECC bytes placement.
Create two functions to read/write ECC chunks. Those functions will later
be used by the sunxi_nfc_hw_ecc_read/write_page() and
sunxi_nfc_hw_syndrome_ecc_read/write_page() functions.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Boris BREZILLON [Thu, 1 Oct 2015 14:58:27 +0000 (16:58 +0200)]
mtd: nand: remove unused ->init_size() hook
The ->init_size() hook was introduced to let NAND controller drivers
support NAND devices that could not be described in the nand_ids table.
Since then, the core has added support for extended-id parsing and
full-id description, thus allowing to describe pretty much all existing
NANDs.
Moreover, this hook is not used by any mainline driver, and should not be
used by new drivers, because detecting the NAND chip is not something
controller specific.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Brian Norris [Wed, 30 Sep 2015 16:54:26 +0000 (09:54 -0700)]
mtd: nand: vf610_nfc: include missing pincrl/consumer.h
This must have been implicitly included on the builds I tested. Reported
by numerous test bots:
drivers/mtd/nand/vf610_nfc.c: In function 'vf610_nfc_resume':
drivers/mtd/nand/vf610_nfc.c:660:2: error: implicit declaration of function 'pinctrl_pm_select_default_state' [-Werror=implicit-function-declaration]
pinctrl_pm_select_default_state(dev);
^
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Stefan Agner <stefan@agner.ch>
Boris BREZILLON [Thu, 30 Jul 2015 10:18:03 +0000 (12:18 +0200)]
mtd: mtdpart: fix add_mtd_partitions error path
If we fail to allocate a partition structure in the middle of the partition
creation process, the already allocated partitions are never removed, which
means they are still present in the partition list and their resources are
never freed.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Cc: stable@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Stefan Agner [Thu, 3 Sep 2015 01:06:34 +0000 (18:06 -0700)]
mtd: nand: vf610_nfc: add hardware BCH-ECC support
This adds hardware ECC support using the BCH encoder in the NFC IP.
The ECC encoder supports up to 32-bit correction by using 60 error
correction bytes. There is no sub-page ECC step, ECC is calculated
always across the whole page (up to 2k pages).
Limitations:
- HW ECC: Only 2K page with 64+ OOB.
- HW ECC: Only 24 and 32-bit error correction implemented.
Raw writes have been tested using the generic nand_write_page_raw
implementation. However, raw reads are currently not possible
because the controller need to know whether we are going to use
the ECC mode already at NAND_CMD_READ0 command time. At this point
we do not have the information whether it is a raw read or a
regular read at driver level...
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Signed-off-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Stefan Agner [Thu, 3 Sep 2015 01:06:33 +0000 (18:06 -0700)]
mtd: nand: vf610_nfc: Freescale NFC for VF610, MPC5125 and others
This driver supports Freescale NFC (NAND flash controller) found on
Vybrid (VF610), MPC5125, MCF54418 and Kinetis K70. The driver has
been tested using 8-bit and 16-bit NAND interface on the ARM based
Vybrid SoC VF500 and VF610 platform.
parameter page reading.
Limitations:
- Untested on MPC5125 and M54418.
- DMA and pipelining not used.
- 2K pages or less.
- No chip select, one NAND chip per controller.
- No hardware ECC.
Some paths have been hand-optimized and evaluated by measurements
made using mtd_speedtest.ko on a 100MB MTD partition.
rel = using readl_relaxed/writel_relaxed in optimized paths
opt = hand-optimized by combining multiple accesses into one read/write
The measurements have not been statistically verfied, hence use them
with care. The author came to the conclusion that using the relaxed
variants of readl/writel are not worth the additional code.
Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Tested-by: Albert ARIBAUD <albert.aribaud@3adev.fr> Signed-off-by: Stefan Agner <stefan@agner.ch> Reviewed-by: Alexey Klimov <klimov.linux@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Brian Norris [Mon, 21 Sep 2015 20:26:59 +0000 (13:26 -0700)]
mtd: provide proper 32/64-bit compat_ioctl() support for BLKPG
After a bit of poking around wondering why my 32-bit user-space can't
seem to send a proper ioctl(BLKPG) to an MTD on my 64-bit kernel
(ARM64), I noticed that struct blkpg_ioctl_arg is actually pretty
unsuitable for use in the ioctl() ABI, due to its use of raw pointers,
and its lack of alignment/packing restrictions (32-bit arch'es tend to
pack the 4 fields into 4 32-bit words, whereas 64-bit arch'es would add
padding after the third int, and make this 6 32-bit words).
Anyway, this means BLKPG deserves some special compat_ioctl handling. Do
the conversion in a small shim for MTD.
block/compat_ioctl.c already has compat support for the block subsystem,
but it does so by a re-marshalling data to/from user-space (see
compat_blkpg_ioctl()). Personally, I think this approach is cleaner.
Tested only on MTD, with an ARM32 user space on an ARM64 kernel.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: spi-nor: scale up timeout for full-chip erase
This patch fixes timeout issues seen on large NOR flash (e.g., 16MB
w25q128fw) when using ioctl(MEMERASE) with offset=0 and length=16M. The
input parameters matter because spi_nor_erase() uses a different code
path for full-chip erase, where we use the SPINOR_OP_CHIP_ERASE (0xc7)
opcode.
Fix: use a different timeout for full-chip erase than for other
commands.
While most operations can be expected to perform relatively similarly
across a variety of NOR flash types and sizes (and therefore might as
well use a similar timeout to keep things simple), full-chip erase is
unique, because the time it typically takes to complete:
(1) is much larger than most operations and
(2) scales with the size of the flash.
Let's base our timeout on the original comments stuck here -- that a 2MB
flash requires max 40s to erase.
Small survey of a few flash datasheets I have lying around:
From this data, it seems plenty sufficient to say we need to wait for
40 seconds for each 2MB of flash.
After this change, it might make some sense to decrease the timeout for
everything else, as even the most extreme operations (single block
erase?) shouldn't take more than a handful of seconds. But for safety,
let's leave it as-is. It's only an error case, after all, so we don't
exactly need to optimize it.
Signed-off-by: Furquan Shaikh <furquan@google.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Graham Moore [Tue, 21 Jul 2015 14:39:31 +0000 (09:39 -0500)]
mtd: nand: denali: max_banks calculation changed in revision 5.1
Read Denali hardware revision number and use it to
calculate max_banks, The encoding of max_banks changed
in Denali revision 5.1.
Signed-off-by: Graham Moore <grmoore@opensource.altera.com>
[Brian: parentheses around macro arg] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
mtd: nand: denali: pass col argument to READID operation
A read id operation followed by 0x00 reads the device ID while
a read id operation followed by 0x20 reads the possible ONFI identifier.
As the READID function did not propagate the second id parameter but had
a hard-coded call for 0x90 0x00, reading the ONFI identifier was not
possible and thus chips werde not detected (tested with
MT29F8G08ABABAWP)
Signed-off-by: Enrico Jorns <ejo@pengutronix.de> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
projects / mirror_ubuntu-focal-kernel.git / log