This prepares framedone interrupt handling for
manual display update support.
Acked-by: Pavel Machek <pavel@ucw.cz> Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
While most display types only forward their VM to the DISPC, this
is not true for DSI. DSI calculates the VM for DISPC based on its
own, but it's not identical. Actually the DSI VM is not even a valid
DISPC VM making this check fail. Let's restore the old behaviour
and avoid checking the DISPC VM for DSI here.
Fixes: 7c27fa57ef31 ("drm/omap: Call dispc timings check operation directly") Acked-by: Pavel Machek <pavel@ucw.cz> Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This macro is only used by omapdrm, which should print
debug messages using the DRIVER category instead of the
default CORE category.
Acked-by: Pavel Machek <pavel@ucw.cz> Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Kefeng Wang [Tue, 23 Apr 2019 07:50:01 +0000 (15:50 +0800)]
drm/omap: Use dev_get_drvdata()
Using dev_get_drvdata directly.
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: dri-devel@lists.freedesktop.org Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Emil Velikov [Wed, 22 May 2019 15:02:18 +0000 (16:02 +0100)]
drm/omap: remove open-coded drm_invalid_op()
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Emil Velikov <emil.velikov@collabora.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Dave Airlie [Thu, 6 Jun 2019 03:47:40 +0000 (13:47 +1000)]
Merge branch 'drm-next-5.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
amdgpu:
- Revert timeline support until KHR is ready
- Various driver reload fixes
- Refactor clock handling in DC
- Aux fixes for DC
- Bandwidth calculation updates for DC
- Fix documentation due to file rename
- RAS fix
- Fix race in late_init
ttm:
- Allow for better forward progress when there is heavy memory contention
Christian König [Tue, 4 Jun 2019 15:07:10 +0000 (17:07 +0200)]
drm/ttm: fix ttm_bo_unreserve
Since we now keep BOs on the LRU we need to explicitely remove
them from the LRU now after they are pinned.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Fri, 31 May 2019 16:34:57 +0000 (11:34 -0500)]
drm/amdgpu/display: Drop some new CONFIG_DRM_AMD_DC_DCN1_01 guards
These got added back by subsequent merges accidently.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 28 May 2019 19:17:25 +0000 (14:17 -0500)]
drm/amdgpu: fix a race in GPU reset with IB test (v2)
Split late_init into two functions, one (do_late_init) which
just does the hw init, and late_init which calls do_late_init
and schedules the IB test work. Call do_late_init in
the GPU reset code to run the init code, but not schedule
the IB test code. The IB test code is called directly
in the gpu reset code so no need to run the IB tests
in a separate work thread. If we do, we end up racing.
v2: Rework late_init. Pull out the mgpu fan boost and xgmi
pstate code into late_init so they get called in all cases.
rename the late_init worker thread to delayed work since it's
just the IB tests now which can happen later. Schedule the
work at init and resume time. It's not needed at reset time
because the IB tests are called directly.
Reviewed-by: Christian König <christian.koenig@amd.com> Cc: Xinhui Pan <xinhui.pan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This file was renamed, but docs weren't updated accordingly.
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -function PRIME Buffer Sharing ./drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c' failed with return code 1
WARNING: kernel-doc './scripts/kernel-doc -rst -enable-lineno -internal ./drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c' failed with return code 2
Fixes: 2fbd6f94accdbb223a ("drm/amdgpu: rename amdgpu_prime.[ch] into amdgpu_dma_buf.[ch]") Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Thu, 6 Jun 2019 02:16:17 +0000 (12:16 +1000)]
Merge tag 'drm-misc-next-2019-06-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-next
drm-misc-next for v5.3:
UAPI Changes:
Cross-subsystem Changes:
- Add devicetree bindings for new panels.
- Convert allwinner's DT bindings to a schema.
- Drop video/hdmi static functions from kernel docs.
- Discard old fence when reserving space in reservation_object_get_fences_rcu.
Core Changes:
- Add missing -ENOMEM handling in edid loading.
- Fix null pointer deref in scheduler.
- Header cleanups, making them self-contained.
- Remove drmP.h inclusion from core.
- Fix make htmldocs warning in scheduler and HDR metadata.
- Fix a few warnings in the uapi header and add a doc section for it.
- Small MST sideband error handling fix.
- Clarify userspace review requirements.
- Clarify implicit/explicit fencing in docs.
- Flush output polling on shutdown.
Driver Changes:
- Small cleanups to stm.
- Add new driver for ST-Ericsson MCDE
- Kconfig fix for meson HDMI.
- Add support for Armadeus ST0700 Adapt panel.
- Add KOE tx14d24vm1bpa panel.
- Update timings for st7701.
- Fix compile error in mcde.
- Big series of tc358767 fixes, and enabling support for IRQ and HPD handling.
- Assorted fixes to sii902x, and implementing HDMI audio support.
- Enable HDR metadata support on amdgpu.
- Assorted fixes to atmel-hlcdc, and add sam9x60 LCD controller support.
Chris Wilson [Tue, 4 Jun 2019 12:53:23 +0000 (13:53 +0100)]
dma-buf: Discard old fence_excl on retrying get_fences_rcu for realloc
If we have to drop the seqcount & rcu lock to perform a krealloc, we
have to restart the loop. In doing so, be careful not to lose track of
the already acquired exclusive fence.
Fixes: fedf54132d24 ("dma-buf: Restart reservation_object_get_fences_rcu() after writes") Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Christian König <christian.koenig@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Sumit Semwal <sumit.semwal@linaro.org> Cc: stable@vger.kernel.org #v4.10 Reviewed-by: Christian König <christian.koenig@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190604125323.21396-1-chris@chris-wilson.co.uk
drm: atmel-hlcdc: avoid initializing cfg with zero
Remove cfg initialization with zero and read state with
drm_crtc_state_to_atmel_hlcdc_crtc_state() so that cfg to be initialized
with state's output_mode.
drm: atmel-hlcdc: add config option for clock selection
SAM9x60 LCD Controller has no option to select clock source as previous
controllers have. To be able to use the same driver even for this LCD
controller add a config option to know if controller supports this.
Chris Wilson [Mon, 3 Jun 2019 13:58:57 +0000 (14:58 +0100)]
drm: Flush output polling on shutdown
We need to mark the output polling as disabled to prevent concurrent
irqs from queuing new work as shutdown the probe -- causing that work to
execute after we have freed the structs:
Uma Shankar [Tue, 4 Jun 2019 11:17:02 +0000 (16:47 +0530)]
drm: Fix docbook warnings in hdr metadata helper structures
Fixes the following warnings:
./include/drm/drm_mode_config.h:841: warning: Incorrect use of
kernel-doc format: * hdr_output_metadata_property: Connector
property containing hdr
./include/drm/drm_mode_config.h:918: warning: Function parameter or member 'hdr_output_metadata_property' not described in 'drm_mode_config'
./include/drm/drm_connector.h:1251: warning: Function parameter or member 'hdr_output_metadata' not described in 'drm_connector'
./include/drm/drm_connector.h:1251: warning: Function parameter or member 'hdr_sink_metadata' not described in 'drm_connector'
Also adds some property documentation for HDR Metadata Connector
Property in connector property create function.
v2: Fixed Sean Paul's review comments.
v3: Fixed Daniel Vetter's review comments, added the UAPI structure
definition section in kernel docs.
v4: Fixed Daniel Vetter's review comments.
v5: Added structure member references as per Daniel's suggestion.
Cc: Shashank Sharma <shashank.sharma@intel.com> Cc: Ville Syrjä <ville.syrjala@linux.intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: "Ville Syrjä" <ville.syrjala@linux.intel.com> Cc: Hans Verkuil <hansverk@cisco.com> Cc: dri-devel@lists.freedesktop.org Cc: linux-fbdev@vger.kernel.org Reviewed-by: Sean Paul <sean@poorly.run> (v1) Signed-off-by: Uma Shankar <uma.shankar@intel.com>
[danvet: Fix up markup: () for functions, & for structs. Style guide
also recommends to prepend struct for structures.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/1559647022-7336-1-git-send-email-uma.shankar@intel.com
Noralf Trønnes [Fri, 31 May 2019 14:01:11 +0000 (16:01 +0200)]
drm/fb-helper: Remove drm_fb_helper_crtc
struct drm_fb_helper_crtc is now just a wrapper around drm_mode_set so
use that directly instead and attach it as a modeset array onto
drm_client_dev. drm_fb_helper will use this array to store its modesets
which means it will always initialize a drm_client, but it will not
register the client (callbacks) unless it's the generic fbdev emulation.
Code will later be moved to drm_client, so add code there in a new file
drm_client_modeset.c with MIT license to match drm_fb_helper.c.
The modeset connector array size is hardcoded for the cloned case to avoid
having to pass in a value from the driver. A value of 8 is chosen to err
on the safe side. This means that the max connector argument for
drm_fb_helper_init() and drm_fb_helper_fbdev_setup() isn't used anymore,
a todo entry for this is added.
In pan_display_atomic() restore_fbdev_mode_force() is used instead of
restore_fbdev_mode_atomic() because that one will later become internal
to drm_client_modeset.
v3:
- Use full drm_client_init/release for the modesets (Daniel Vetter)
- drm_client_for_each_modeset: use lockdep_assert_held (Daniel Vetter)
- Hook up to Documentation/gpu/drm-client.rst (Daniel Vetter)
v2:
- Add modesets array to drm_client (Daniel Vetter)
- Use a new file for the modeset code (Daniel Vetter)
- File has to be MIT licensed (Emmanuel Vadot)
- Add copyrights from drm_fb_helper.c
Daniel Vetter [Mon, 3 Jun 2019 14:28:48 +0000 (16:28 +0200)]
drm/docs: More links for implicit/explicit fencing.
drm_atomic_set_fence_for_plane() contains the main discussion from a
driver pov, link to that from more places.
Cc: Pekka Paalanen <pekka.paalanen@collabora.com> Reviewed-by: Pekka Paalanen <pekka.paalanen@collabora.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <maxime.ripard@bootlin.com> Cc: Sean Paul <sean@poorly.run> Cc: David Airlie <airlied@linux.ie> Cc: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20190603142848.26487-1-daniel.vetter@ffwll.ch
drm/amd/display: Only force modesets when toggling HDR
[Why]
We can issue HDR static metadata as part of stream updates for
non-modesets as long as we force a modeset when entering or exiting HDR.
This avoids unnecessary blanking for simple metadata updates.
[How]
When changing scaling and abm for the stream also check if HDR has
changed and send the stream update. This will only happen in non-modeset
cases.
drm/amd/display: Expose HDR output metadata for supported connectors
[Why]
For userspace to send static HDR metadata to the display we need to
attach the property on the connector and send it to DC.
[How]
The property is attached to HDMI and DP connectors. Since the metadata
isn't actually available when creating the connector this isn't a
property we can dynamically support based on the extension block
being available or not.
When the HDR metadata is changed a modeset will be forced for now.
We need to switch from 8bpc to 10bpc in most cases anyway, and we want
to fully exit HDR mode when userspace gives us a NULL metadata, so this
isn't completely unnecessary.
The requirement can later be reduced to just entering and exiting HDR
or switching max bpc.
drm/doc: Document expectation that userspace review looks at kernel uAPI.
there's been concerns raised that we expect userspace people to do
in-depth kernel patch review. That's not reasonable, same way kernel
people can't review all the userspace we have. Try to clarify
expectations a bit more.
Cc: Eric Anholt <eric@anholt.net> Cc: Pekka Paalanen <ppaalanen@gmail.com> Cc: contact@emersion.fr Cc: wayland-devel@lists.freedesktop.org Acked-by: Eric Anholt <eric@anholt.net> Reviewed-by: Simon Ser <contact@emersion.fr> Reviewed-by: Pekka Paalanen <pekka.paalanen@collabora.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190521084849.27452-1-daniel.vetter@ffwll.ch
Emily Deng [Fri, 31 May 2019 09:35:27 +0000 (17:35 +0800)]
drm/amdgpu/display: Fix reload driver error
Issue:
Will have follow error when reload driver:
[ 3986.567739] sysfs: cannot create duplicate filename '/devices/pci0000:00/0000:00:07.0/drm_dp_aux_dev'
[ 3986.567743] CPU: 6 PID: 1767 Comm: modprobe Tainted: G OE 5.0.0-rc1-custom #1
[ 3986.567745] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS Ubuntu-1.8.2-1ubuntu1 04/01/2014
[ 3986.567746] Call Trace:
......
[ 3986.567808] drm_dp_aux_register_devnode+0xdc/0x140 [drm_kms_helper]
......
[ 3986.569081] kobject_add_internal failed for drm_dp_aux_dev with -EEXIST, don't try to register things with the same name in the same directory.
Root cause:
When unload driver, it doesn't unregister aux.
v2: Don't use has_aux
Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Oak Zeng [Tue, 28 May 2019 19:51:49 +0000 (14:51 -0500)]
drm/amdkfd: Return proper error code for gws alloc API
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Aric Cyr [Thu, 16 May 2019 22:43:54 +0000 (18:43 -0400)]
drm/amd/display: program manual trigger only for bottom most pipe
[Why]
We only want to manual trigger end-of-frame when the bottom-most
pipe is flipped to prevent overlays from ending the frame too early.
[How]
Check that the manual trigger is only firing on bottom plane.
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Krunoslav Kovac [Thu, 16 May 2019 15:14:55 +0000 (11:14 -0400)]
drm/amd/display: CS_TFM_1D only applied post EOTF
[Why]
There's some unnecessary mem allocation for CS_TFM_ID. What's worse, it
depends on LUT size and since it's 4K for CS_TFM_1D, it is 16x bigger
than in regular case when it's actually needed. This leads to some
crashes in stress conditions.
[How]
Skip ramp combining designed for RGB256 and DXGI gamma with CS_TFM_1D.
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Reset planes for color management changes
[Why]
For commits with allow_modeset=false and CRTC degamma changes the planes
aren't reset. This results in incorrect rendering.
[How]
Reset the planes when color management has changed on the CRTC.
Technically this will include regamma changes as well, but it doesn't
really after legacy userspace since those commit with
allow_modeset=true.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eryk Brol [Wed, 15 May 2019 19:12:41 +0000 (15:12 -0400)]
drm/amd/display: Increase Backlight Gain Step Size
[Why]
Some backlight tests fail due to backlight settling
taking too long. This happens because the step
size used to change backlight levels is too small.
[How]
1. Change the size of the backlight gain step size
2. Change how DMCU firmware gets the step size value
so that it is passed in by driver during DMCU initn
Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Wed, 15 May 2019 20:39:23 +0000 (16:39 -0400)]
drm/amd/display: fix issues with bad AUX reply on some displays
[Why]
Some displays take some time to power up AUX CH once they are
put into D3 state via write to DPCD 600h=2.
Interestingly enough, some display may simply NACK, but some might
also ACK with a bunch of 0s, which can cause issues with receiver
cap retrieval. Note that not all DPCD address return 0s, but in
particular it has been observed on some higher DPCD address such
as DPCD 2200h, etc.
[How]
Based on spec, receiver will monitor differential signal while in D3 and
AUX CH is in low power mode. When detected, it may allow up to
1 ms to power up AUX CH and reply.
If we read Sink power state D3, we should add 1 ms delay to satisfy
this spec requirement.
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Wed, 8 May 2019 20:08:39 +0000 (16:08 -0400)]
drm/amd/display: Refactor DIO stream encoder
* Pull duplicate audio_clock_info struct to stream_encoder.h
* Generalize sec_gsp7* to sec_gsp_pps*
* Expose enc1 and enc2 stream encoder audio funcs
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Daniel He [Wed, 15 May 2019 03:38:37 +0000 (11:38 +0800)]
drm/amd/display: Modified AUX_DPHY_RX_CONTROL0
[Description] This is cause by failing to read link caps from driver.
Signed-off-by: Daniel He <daniel.he@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Adding writeback_config enum to vba_vars_st, replacing old flag.
Initialize to dm_normal.
Signed-off-by: Ilya Bakoulin <Ilya.Bakoulin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Wed, 8 May 2019 23:06:30 +0000 (19:06 -0400)]
drm/amd/display: Refactor clk_mgr functions
[Why]
Some HW specific implementations can be pulled out into clk_mgr.c.
[How]
* Pull get_active_display_cnt out to clk_mgr.
* Pull out shared logic in set_dispclk and set_dprefclk
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Wed, 10 Apr 2019 20:31:08 +0000 (16:31 -0400)]
drm/amd/display: Fix type of pp_smu_wm_set_range struct
[why]
Value read from SMU is 16 bits, not 32.
[How]
Fix type, and add wm_type enum in preparation for future interfaces.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Fri, 10 May 2019 18:57:48 +0000 (14:57 -0400)]
drm/amd/display: do not power on eDP power rail early
[Why]
Modern Standby may toggle display adapter state between D0
and D3 state unpredictably.
But events that cause transition to D0 are not always resulting
in a display light up scenario.
Modern eDP panels should be able to power on panel logic
quickly upon VDD going high. Based on spec, the T3 time
between VDD on and HPD high can be between 0 and 80 ms.
Doing any tricky sorts of optimization by powering on panel
VDD early during D0 transition on can negatively impact other
features due to unnecessary power drain and toggling when
final system state does not intend for the panel to be lit up.
We need OEMs to source higher end panels that have T3 time
close to 0 if they want quick S3/Modern Standby resume times.
[How]
Remove panel VDD power on in init_hw
Signed-off-by: Anthony Koo <Anthony.Koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Su Sung Chung [Fri, 10 May 2019 19:16:45 +0000 (15:16 -0400)]
drm/amd/display: fix crash on setmode when mode is close to bw limit
[why]
during It's possible to call dcn_validate_bandwidth with no plane.
In that case, as we are only intersted in if output timing is supported or not,
even if we cannot support native resolution, we still want to support lower
resolution if it is valid
[how]
if there exist no surface, make viewport/rec_out size at max 1080p. It is
already known that 1080p x 6(max # of pipes) is supported, so if we fail
validation, it is because of the stream
Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Su Sung Chung [Wed, 1 May 2019 20:54:56 +0000 (16:54 -0400)]
drm/amd/display: fix calculation of total_data_read_bandwidth
[why]
by adding fast_validate flag, we are skipping some portion of
dcn_validate_bandwidth code that is not necessary for mode validation.
However we have a bug where it does not calculate
v->total_data_read_bandwidth, which is one of the factors determines the
result of the validation, and therefore report false positive during
mode validation.
[how]
add calculation of v->total_data_read_bandwidth outside of the region
that is guarded by fast_validate flag
Signed-off-by: Su Sung Chung <Su.Chung@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chris Park [Fri, 10 May 2019 17:34:30 +0000 (13:34 -0400)]
drm/amd/display: Move link functions from dc to dc_link
[Why]
link-specific functions should reside in dc_link.c
[How]
Move them there.
Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jun Lei [Thu, 9 May 2019 19:32:27 +0000 (15:32 -0400)]
drm/amd/display: Add min_dcfclk_mhz field to bb overrides
Add min_dcfclk_mhz to bounding box overrides.
Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Tue, 7 May 2019 16:47:37 +0000 (12:47 -0400)]
drm/amd/display: move clk_mgr files to right place
[Why]
Better organization
[How]
Move clk_mgr files under dc/clk_mgr
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Paul Hsieh [Tue, 7 May 2019 09:58:58 +0000 (17:58 +0800)]
drm/amd/display: disable PSR/ABM before destroy DMCU struct
[Why]
1. DMCU is not running on some platform but driver still send ABM
command. It may cause assert due to DMCU is not alive.
2. To make sure PSR disable when driver disable
[How]
1. Add dmcu_is_running in ABM struct, driver can check this flag to
determine driver should send ABM command or not.
2. Send PSR disable command when destroy PSR
Signed-off-by: Paul Hsieh <paul.hsieh@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
In the previous implementation DRR event sometimes came
in during FP2 region which is a keep-out zone. This
would cause the frame not to latch until the next frame
which resulted in heavy flicker. To fix this we need
to make sure that it triggers in the BP.
[How]
1. Remove DRR programming during flip
2. Setup manual trigger for DRR event and trigger it
after surface programming is complete
Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Krunoslav Kovac [Fri, 15 Mar 2019 20:25:41 +0000 (16:25 -0400)]
drm/amd/display: Add GSL source select registers
GSL is a form of locking that can be used to synchronize pipes in a
pipe-split configurations when async flip is used. Add the registers
here.
Signed-off-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eryk Brol [Wed, 8 May 2019 13:08:03 +0000 (09:08 -0400)]
drm/amd/display: Disable audio stream only if it's currently enabled
[Why]
Previously there were 2 consecutive calls being made to disable
audio stream. The first one disabled the audio stream, and the second
one went through and also tried to disable the audio stream causing
BACO entry issues due to the ASIC appearing busy.
[How]
1. Add a status field to the audio struct which stores enabled/disabled
info
2. In the calls to enable/disable audio stream check if we're already
in the desired state before executing the function
Signed-off-by: Eryk Brol <eryk.brol@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Tue, 7 May 2019 19:18:44 +0000 (15:18 -0400)]
drm/amd/display: assign new stream id in dc_copy_stream
[why]
stream id should uniquely identify an instance of stream.
the copy constructor should be treated as a new
stream instance.
[how]
assign a new stream id in this copy constructor.
Signed-off-by: Wenjing Liu <Wenjing.Liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Tue, 7 May 2019 21:29:11 +0000 (17:29 -0400)]
drm/amd/display: Move CLK_BASE_INNER macro
This macro is specificly used by RV1. Move it to the appropriate
location.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Gary Kattan [Fri, 22 Feb 2019 20:51:18 +0000 (12:51 -0800)]
drm/amd/display: Implement CM dealpha and bias interfaces
Add vtable entries for de-alpha and bias color management interfaces.
Move piece-wise transfer function registers to a helper list for future
reuse.
Signed-off-by: Gary Kattan <gary.kattan@amd.com> Reviewed-by: Nevenko Stupar <Nevenko.Stupar@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hugo Hu [Fri, 3 May 2019 07:36:29 +0000 (15:36 +0800)]
drm/amd/display: Don't use ROM for output TF if GAMMA_CS_TFM_1D
We can’t use hardcoded SRGB ROM for output TF if we have GAMMA_CS_TFM_1D
(unless we know 1D LUT is identity), so we never want to return here early.
We apply the LUT part of ColorTransform3x4 only in apply_lut_1d() which is
called near the end of that function.
Signed-off-by: Hugo Hu <hugo.hu@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Mon, 22 Apr 2019 23:39:35 +0000 (19:39 -0400)]
drm/amd/display: make clk mgr soc specific
[Why]
First step of refactoring clk mgr to better handle different
ways of handling clock operations. Clock operation policies are
soc specific and not just DCN vesion specific. It is not a hw resource,
should not be in the resource pool.
[How]
Change clock manager creation to be based on HW internal ID, rename
clock manager members to be more clear. Move clock manager out of
resource.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Emily Deng [Wed, 29 May 2019 08:15:52 +0000 (16:15 +0800)]
drm/amdgpu:Fix the unpin warning about csb buffer
As it will destroy clear_state_obj, and also will unpin it in the
gfx_v9_0_sw_fini, so don't need to
call amdgpu_bo_free_kernel in gfx_v9_0_sw_fini, or it will have unpin warning.
Signed-off-by: Emily Deng <Emily.Deng@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
xinhui pan [Tue, 28 May 2019 06:47:31 +0000 (14:47 +0800)]
drm/amdgpu: ras injection use gpu address
injection need a valid gpu address.
Signed-off-by: xinhui pan <xinhui.pan@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jyri Sarha [Mon, 27 May 2019 13:47:57 +0000 (16:47 +0300)]
drm/bridge: sii902x: Implement HDMI audio support
Implement HDMI audio support by using ASoC HDMI codec. The commit
implements the necessary callbacks and configuration for the HDMI
codec and registers a virtual platform device for the codec to attach.
Jyri Sarha [Mon, 27 May 2019 13:47:54 +0000 (16:47 +0300)]
drm/bridge: sii902x: pixel clock unit is 10kHz instead of 1kHz
The pixel clock unit in the first two registers (0x00 and 0x01) of
sii9022 is 10kHz, not 1kHz as in struct drm_display_mode. Division by
10 fixes the issue.
Tomi Valkeinen [Tue, 28 May 2019 08:27:43 +0000 (11:27 +0300)]
drm/bridge: tc358767: copy the mode data, instead of storing the pointer
In tc_bridge_mode_set callback, we store the pointer to the given
drm_display_mode, and use the mode later. Storing a pointer in such a
way looks very suspicious to me, and I have observed odd issues where
the timings were apparently (at least mostly) zero.
Do a copy of the drm_display_mode instead to ensure we don't refer to
freed/modified data.
Tomi Valkeinen [Tue, 28 May 2019 08:27:41 +0000 (11:27 +0300)]
drm/bridge: tc358767: use bridge mode_valid
We have tc_connector_mode_valid() to filter out videomdoes that the
tc358767 cannot support. As it is a bridge limitation, change the code
to use drm_bridge_funcs's mode_valid instead.
Tomi Valkeinen [Tue, 28 May 2019 08:27:40 +0000 (11:27 +0300)]
drm/bridge: tc358767: remove check for video mode in link enable
tc_main_link_enable() checks if videomode has been set, and fails if
there's no videomode. As tc_main_link_enable() no longer depends on the
videomode, we can drop the check.
Also, while tc_stream_enable() does depend on the videomode, we can
expect that a mode has been set before drm_bridge_funcs.enable is
called, so we don't need the check there either.
Tomi Valkeinen [Tue, 28 May 2019 08:27:39 +0000 (11:27 +0300)]
drm/bridge: tc358767: clean-up link training
The current link training code does unnecessary retry-loops, and does
extra writes to the registers. It is easier to follow the flow and
ensure it's similar to Toshiba's documentation if we deal with LT inside
tc_main_link_enable() function.
This patch adds tc_wait_link_training() which handles waiting for the LT
phase to finish, and does the necessary LT register setups in
tc_main_link_enable, without extra loops.
Tomi Valkeinen [Tue, 28 May 2019 08:27:37 +0000 (11:27 +0300)]
drm/bridge: tc358767: use more reliable seq when finishing LT
At the end of the link training, two steps have to be taken: 1)
tc358767's LT mode is disabled by a write to DP0_SRCCTRL, and 2) Remove
LT flag in DPCD 0x102.
Toshiba's documentation tells to first write the DPCD, then modify
DP0_SRCCTRL. In my testing this often causes issues, and the link
disconnects right after those steps.
If I reverse the steps, it works every time. There's a chance that this
is DP sink specific, though, but as my testing shows this sequence to be
much more reliable, let's change it.
Tomi Valkeinen [Tue, 28 May 2019 08:27:36 +0000 (11:27 +0300)]
drm/bridge: tc358767: remove unnecessary msleep
For some reason the driver has a msleep(100) after writing to
DP_PHY_CTRL. Toshiba's documentation doesn't suggest any delay is
needed, and I have not seen any issues with the sleep removed.
Tomi Valkeinen [Tue, 28 May 2019 08:27:35 +0000 (11:27 +0300)]
drm/bridge: tc358767: ensure DP is disabled before LT
Link training will sometimes fail if the DP link is enabled when
tc_main_link_enable() is called. The driver makes sure the DP link is
disabled when the DP output is disabled, and we never enable the DP
without first disabling it, so this should never happen.
However, as the HW behavior seems to be somewhat random if DP link has
erroneously been left enabled, let's add a WARN_ON() for the case and
set DP0CTL to 0.
Tomi Valkeinen [Tue, 28 May 2019 08:27:34 +0000 (11:27 +0300)]
drm/bridge: tc358767: disable only video stream in tc_stream_disable
Currently the code writes 0 to DP0CTL in tc_stream_disable(), which
disables the whole DP link instead of just the video stream. We always
disable the link and the stream together from tc_bridge_disable(), so
this doesn't cause any issues.
Nevertheless, fix this by only clearing VID_EN in tc_stream_disable to
stop the video stream while keeping the link enabled.
Tomi Valkeinen [Tue, 28 May 2019 08:27:32 +0000 (11:27 +0300)]
drm/bridge: tc358767: move PXL PLL enable/disable to stream enable/disable
We set up the PXL PLL inside tc_main_link_setup. This is unnecessary,
and makes tc_main_link_setup depend on the video-mode, which should not
be the case. As PXL PLL is used only for the video stream (and only when
using the HW test pattern), let's move the PXL PLL setup into
tc_stream_enable.
Also, currently the PXL PLL is only disabled if the driver if removed.
Let's disable the PXL PLL when the stream is disabled.
Tomi Valkeinen [Tue, 28 May 2019 08:27:30 +0000 (11:27 +0300)]
drm/bridge: tc358767: move video stream setup to tc_main_link_stream
The driver currently sets the video stream registers in
tc_main_link_setup. One should be able to establish the DP link without
any video stream, so a more logical place is to configure the stream in
the tc_main_link_stream. So move them there.
Tomi Valkeinen [Tue, 28 May 2019 08:27:29 +0000 (11:27 +0300)]
drm/bridge: tc358767: cleanup aux_link_setup
The driver sets up AUX link at probe time, but, for some reason, also
sets the main link's number of lanes using tc->link.base.num_lanes. This
is not needed nor correct, as the number of lanes has not been decided
yet. The number of lanes will be set later during main link setup.
Modify aux_link_setup so that it does not use tc->link, and thus makes
aux setup independent of the link probing.
Tomi Valkeinen [Tue, 28 May 2019 08:27:26 +0000 (11:27 +0300)]
drm/bridge: tc358767: fix ansi 8b10b use
DP always uses ANSI 8B10B encoding. Some monitors (old?) may not have
the ANSI 8B10B bit set in DPCD, even if it should always be set.
The tc358767 driver currently respects that flag, and turns the encoding
off if the monitor does not have the bit set, which then results in the
monitor not working.
This patch makes the driver to always use ANSI 8B10B encoding, and drops
the 'coding8b10b' field which is no longer used.
tc_aux_get_status() does not report AUX_TIMEOUT correctly, as it only
checks the AUX_TIMEOUT if aux is still busy. Fix this by always checking
for AUX_TIMEOUT.
Dave Airlie [Thu, 30 May 2019 23:33:29 +0000 (09:33 +1000)]
Merge branch 'drm-next-5.3' of git://people.freedesktop.org/~agd5f/linux into drm-next
New stuff for 5.3:
- Add new thermal sensors for vega asics
- Various RAS fixes
- Add sysfs interface for memory interface utilization
- Use HMM rather than mmu notifier for user pages
- Expose xgmi topology via kfd
- SR-IOV fixes
- Fixes for manual driver reload
- Add unique identifier for vega asics
- Clean up user fence handling with UVD/VCE/VCN blocks
- Convert DC to use core bpc attribute rather than a custom one
- Add GWS support for KFD
- Vega powerplay improvements
- Add CRC support for DCE 12
- SR-IOV support for new security policy
- Various cleanups