Eric Yang [Wed, 12 Jul 2017 22:38:04 +0000 (18:38 -0400)]
drm/amd/display: fix mpo exit hang
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 12 Jul 2017 13:00:14 +0000 (09:00 -0400)]
drm/amd/display: ensure OTG is locked before proceeding
also remove tg lock at init_hw as not all OTG is running
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 12 Jul 2017 19:49:46 +0000 (15:49 -0400)]
drm/amd/display: fix 4k@30 with 10bit deep color and avi for BT2020
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 12 Jul 2017 15:54:10 +0000 (11:54 -0400)]
drm/amd/display: avoid disabling opp clk before hubp is blanked.
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 12 Jul 2017 13:02:54 +0000 (09:02 -0400)]
drm/amd/display: change order of HUBP and MPC disable according to HW guide
blank hubp first before disconnect MPC
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
John Wu [Wed, 12 Jul 2017 06:25:52 +0000 (14:25 +0800)]
drm/amd/display: Fix eDP power isn't off when lid close
Signed-off-by: John Wu <john.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Release dm_state->context when state is cleared.
Handling a use case of TEST_ONLY request from DRM where commit is
not goiing to be called. We need to release the allocated dc_validate_context
in this case.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Skip DC validation for flips and cursor.
Nothing to validate in DC in this case. Skip it.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Mon, 10 Jul 2017 18:04:21 +0000 (14:04 -0400)]
drm/amd/display: Flattening to dc_transfer_func
Flattening dc transfer functions in the following manner:
transfer_func > core_transfer_func > dc_transfer_func
References to deleted structs are updated as needed.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Attach surface to dm_plane_state.
Attach surface to state.
Remove Create surface from commit.
Propogate any surface creation and initialization error back to atomic_check caller.
clean outdated code in check and commit.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Thu, 6 Jul 2017 18:27:49 +0000 (14:27 -0400)]
drm/amd/display: Fix MPO visual confirm
1. Need to blend non-active area to show visual confirm borders
2. Set number of Visual Confirm lines based on pipe instance
3. Set Different colors representing surface format of bottom most plan
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Thu, 6 Jul 2017 18:20:25 +0000 (14:20 -0400)]
drm/amd/display: call pplib to update clocks
Allow pplib to update fclk and dcfclk for different voltage levels.
PPlib's values for dispclk and phyclk is not correct, so we are not
getting it from them. fclk is currently not used correctly, although
does not effect the actual fclk we request.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Wed, 5 Jul 2017 19:30:18 +0000 (15:30 -0400)]
drm/amd/display: Change how we disable pipe split
Before this change, pipe split was disabled by bumping up dpp clock
bounding box for DPM level 0 and 1, this allows validation to pass
without splitting at a lower DPM level. This change reverts this
and instead lowers display clock at DPM level 0, this forces
configurations that need pipe split at DPM level 0 to go to
DPM level 1, where they can be driven without split.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Tue, 27 Jun 2017 16:09:01 +0000 (12:09 -0400)]
drm/amd/display: block modes that require read bw greater than 30%
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Tue, 4 Jul 2017 18:13:25 +0000 (14:13 -0400)]
drm/amd/display: move number of memory channel calc out of pplib call
Move number of memory channel calculation out of dcn_bw_update_from_pplib
Fill in fabric_and_dram_bandwidth for single channel case.
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Sun, 4 Jun 2017 16:50:20 +0000 (12:50 -0400)]
drm/amd/display: update DPM bounding box
value based on STA target aligned to FCLK for SS corners with 10% margin
also
- group all latency together
- group all voltage state related together
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Remove acrtc->stream and move it into dm_crtc_state.
This allows to get rid of dm_atomic_state->dm_set.
Also reuse streams created in atomic_check during
commit.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 28 Jun 2017 17:23:04 +0000 (13:23 -0400)]
drm/amd/display: Use validate_context from atomic_check in commit
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Mar 2017 15:25:24 +0000 (11:25 -0400)]
drm/amd/display: Add validate_context to atomic_state
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Mon, 6 Mar 2017 14:43:30 +0000 (09:43 -0500)]
drm/amd/display: Commit validation set from state
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 3 Mar 2017 19:50:00 +0000 (14:50 -0500)]
drm/amd/display: Add correct retain/release
Needed by objs in dm_atomic_state
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 27 Jun 2017 18:35:17 +0000 (14:35 -0400)]
drm/amd/display: Hook dm private state into atomic_check
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 27 Jun 2017 15:55:43 +0000 (11:55 -0400)]
drm/amd/display: Create dm_atomic_state
We really want to use the new private_atomic_state but can't right now
as we have to maintain some backward compatibility to older kernels. For
now let's follow Intel's approach and extend the drm_atomic_state.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Mon, 26 Jun 2017 20:25:10 +0000 (16:25 -0400)]
drm/amd/display: set drr during program timing.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Set static screen register for stoney/carrizo
-Set CRTC_STATIC_SCREEN_EVENT for stoney/carrizo for FBC implementation
-Code is currently guarded with "ENABLE_FBC" compile time flag
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Fri, 30 Jun 2017 00:25:23 +0000 (20:25 -0400)]
drm/amd/display: Enabling VSR on 4K display causes black screen
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Wed, 28 Jun 2017 21:21:42 +0000 (17:21 -0400)]
drm/amd/display: Add DC interface for custom CSC matrix
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Vitaly Prosyak <Vitaly.Prosyak@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Add extra mode and clock info to DTN logs
Adds some additional information to logs in dc_commit_streams to
better match Dal2.
Also adds a new function, dc_raw_log, that has the same
functionality as dc_conn_log, but does not attach display specific
prefixes to the log output.
Finally, adds a new DC log type, LOG_DTN, that logs to
LogMinor_DispConnect_dtn in DM. This new log type and dc_raw_log
are used to generate clock info in the logs to match Dal2.
Signed-off-by: Corbin McElhanney <corbin.mcelhanney@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Connect DC resource to FBC compressor
- Connected DC resource to FBC compressor,
- Initial Implementation of FBC for Stoney/Carrizo
- Code is currently guarded with "ENABLE_FBC" compile time flag
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Tue, 27 Jun 2017 17:27:00 +0000 (13:27 -0400)]
drm/amd/display: add hyst frames for fixed refresh
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This change fixes dcn10 front end reset sequence. Previously we
would reset front end during flip which led to issues
in certain MPO and 4k/5k scenarios. We would also never properly
power gate our front end.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
- Removed uneeded FBC code.
- Initial placeholder for FBC implementation on stoney/carrizo
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Leo (Sunpeng) Li [Tue, 25 Jul 2017 22:00:44 +0000 (18:00 -0400)]
drm/amd/display: Move drm_get_vblank from legacy code
Previously, we assumed that allow_modeset=false => page flip. This
assumption breaks when an atomic commit is submitted with allow_modeset
set to false, since the legacy flip code is never called (the legacy
code grabs the vblank reference).
Fix: Move drm_vblank_get() from amdgpu_atomic_helper_page_flip() to
amdgpu_dm_commit_surfaces().
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fix misuse of plane state destroy helper
drm_plane_state is subclassed by dm_plane_state, so atomic driver should
use __drm_atomic_helper_plane_destroy_state() to destroy a state.
drm_atomic_helper_plane_destroy_state() frees drm_plane_state which is
allocated inside dm_plane_state, this is problematic.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 21 Jun 2017 20:48:06 +0000 (16:48 -0400)]
drm/amd/display: Don't program scaler if we have no surface
If we don't have a surface in dc_commit_streams scl_data won't get
populated in resource_build_scaling_params_for_context. In this case we
shouldn't attempt to program the scaler.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
IGT currently does not properly commit changes on planes with multiple
possible CRTC's. Set one valid CRTC for each plane for now, plus one
underlay plane on Carizzo and Stoney that is valid for all CRTCs.
Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
The compiler was warning about conditions that will never evaluate
to true. The problem was that the VBA translater didn't translate
the conditions correctly.
Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Remove check update type function.
Due to using dc_commit_surface_to_stream instead of build
stream and surface updates any surface commit today is
evlauted to full. Until we fix this and can corretly
evluate type of surface update, anything which is not page
flip or cursor update will be treted as full update chnage
and global lock will be aquired.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Anthony Koo [Wed, 14 Jun 2017 14:19:57 +0000 (10:19 -0400)]
drm/amd/display: fix issues with incorrectly detecting UPDATE_TYPE_FULL
This is due to how structures are being packed with padding added.
Structure field initialization doesn't clear the padding bytes, which cause
our memcmp to give incorrect result.
Move smaller structure parameters to end of structure.
Signed-off-by: Anthony Koo <anthony.koo@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Zeyu Fan [Tue, 13 Jun 2017 15:54:10 +0000 (11:54 -0400)]
drm/amd/display: Save hpd_src for dc_link
Signed-off-by: Zeyu Fan <Zeyu.Fan@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 9 Jun 2017 14:12:36 +0000 (10:12 -0400)]
drm/amd/display: Don't call DCN clk code for Vega
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
1) Always call flip ISR, for any surface comit, not only for page flip.
2) For events not signaled in flip ISR, handle them in end of commit_tail.
3)Fix race condition between subsequent atomic calls by removing
current state access AFTER drm_atomic_helper_commit_hw_done
was called. After this call a pending next commit will
swap in his own state into objects and proceed.
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com> Reviewed-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Shirish S [Thu, 8 Jun 2017 06:25:06 +0000 (11:55 +0530)]
drm/amd/display: remove get_position() of underlay
get_position() returns CRTC vertical/horizontal counters,
hence it is not applicable for underlay which is plane and not
attached to one crtc.
This patch hence removes the callback from dce110_tg_v_funcs
and hence fixes a bug in dc_debug.c where in
get_position() for underlay pipe is called un-conditionally.
Witout this patch get_position() is called in case one has
to update underlay plane's data,
since callback implmented with an ASSERT(),
the old_surface_count and new_surface_count mismatches; causing
only one plane update which is not right and also assert makes the
rendering slow.
Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <Harry.Wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>