Markos Chandras [Thu, 13 Aug 2015 07:56:35 +0000 (09:56 +0200)]
MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction
MIPS R6 introduced the following instruction:
Scalar Floating-Point Minimum and
Scalar Floating-Point argument with Minimum Absolute Value
MIN.fmt writes the minimum value of the inputs fs and ft to the
destination fd.
MINA.fmt takes input arguments fs and ft and writes the argument with
the minimum absolute value to the destination fd.
Markos Chandras [Thu, 13 Aug 2015 07:56:28 +0000 (09:56 +0200)]
MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction
Add support for emulating the new CMP.condn.fmt R6 instructions and
return SIGILL for the old C.cond.fmt if R2 emulation is not enabled
since it's not supported by R6.
The functionality of the new CMP.condn.fmt is the following one:
If the comparison specified by the condn field of the instruction
is true for the operand values, the result is true; otherwise, the
result is false. If no exception is taken, the result is written into
FPR fd; true is all 1s and false is all 0s repeated the operand width
of fmt. All other bits beyond the operand width fmt are UNPREDICTABLE.
Aaro Koskinen [Tue, 11 Aug 2015 07:56:28 +0000 (10:56 +0300)]
MIPS: Octeon: Fix management port MII address on Kontron S1901
Management port MII address is incorrect on Kontron S1901 resulting
in broken networking. Fix by providing definitions for the in-tree DT
pruning code.
Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10914/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Janne Huttunen [Thu, 13 Aug 2015 13:21:46 +0000 (16:21 +0300)]
STAGING: Octeon: Use common helpers for determining interface and port
Currently the Octeon Ethernet driver hardcodes the mapping between
interface/port and IPD port number. Since we have generic helpers for
the very same purpose, we might as well use them instead. This prevents
having the same information in multiple places.
Signed-off-by: Janne Huttunen <janne.huttunen@nokia.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: Janne Huttunen <janne.huttunen@nokia.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: devel@driverdev.osuosl.org
Patchwork: https://patchwork.linux-mips.org/patch/10975/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Janne Huttunen [Thu, 13 Aug 2015 13:21:43 +0000 (16:21 +0300)]
MIPS: Octeon: Initialize CN68XX PKO
CN68XX requires a different PKO configuration. This patch provides
just enough setup to get the XAUI interfaces on CN6880 working with
default parameters.
Signed-off-by: Janne Huttunen <janne.huttunen@nsn.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: Janne Huttunen <janne.huttunen@nokia.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: devel@driverdev.osuosl.org
Patchwork: https://patchwork.linux-mips.org/patch/10974/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Janne Huttunen [Thu, 13 Aug 2015 13:21:42 +0000 (16:21 +0300)]
STAGING: Octeon: Support CN68XX style WQE
CN68XX has a bit different WQE structure. This patch provides the new
definitions and converts the code to use the proper variant based on
the actual model.
Signed-off-by: Janne Huttunen <janne.huttunen@nokia.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: Janne Huttunen <janne.huttunen@nokia.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: devel@driverdev.osuosl.org
Patchwork: https://patchwork.linux-mips.org/patch/10973/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Janne Huttunen [Thu, 13 Aug 2015 13:21:38 +0000 (16:21 +0300)]
MIPS: Octeon: Add definitions for setting up SSO
Some Octeon II models have SSO instead of POW and use a different register
for setting the interrupt thresholds. Add the necessary definitions for
configuring the interrupts also on those models.
Signed-off-by: Janne Huttunen <janne.huttunen@nokia.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: Janne Huttunen <janne.huttunen@nokia.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: devel@driverdev.osuosl.org
Patchwork: https://patchwork.linux-mips.org/patch/10972/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Janne Huttunen [Thu, 13 Aug 2015 13:21:36 +0000 (16:21 +0300)]
MIPS: Octeon: Configure XAUI pkinds
Configure the pkinds of XAUI interfaces on Octeon models that have
them. This simple configuration uses 1:1 mapping between the PIP input
port number and the selected pkind.
Signed-off-by: Janne Huttunen <janne.huttunen@nokia.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: Janne Huttunen <janne.huttunen@nokia.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: devel@driverdev.osuosl.org
Patchwork: https://patchwork.linux-mips.org/patch/10971/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Janne Huttunen [Thu, 13 Aug 2015 13:21:33 +0000 (16:21 +0300)]
MIPS: Octeon: Fix CN6880 hang on XAUI init
Some CN68XX series Octeon II chips seem to hang if a reset is issued on
XAUI initialization. Avoid the hang by disabling the reset on affected
models. Tested on Cavium EBB6800 evaluation board and Kontron S1901 board.
Signed-off-by: Janne Huttunen <janne.huttunen@nokia.com> Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com> Acked-by: David Daney <david.daney@cavium.com> Cc: David Daney <ddaney.cavm@gmail.com> Cc: linux-mips@linux-mips.org Cc: Janne Huttunen <janne.huttunen@nokia.com> Cc: Aaro Koskinen <aaro.koskinen@nokia.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: devel@driverdev.osuosl.org
Patchwork: http://patchwork.linux-mips.org/patch/10970/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Ezequiel Garcia [Thu, 6 Aug 2015 11:22:43 +0000 (12:22 +0100)]
MIPS: pistachio: Allow to enable the external timer based clocksource
This commit introduces a new config, so the user can choose to enable
the General Purpose Timer based clocksource. This option is required
to have CPUFreq support.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: devicetree@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Govindraj Raja <Govindraj.Raja@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/10887/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The Pistachio SoC provides four general purpose timers, and allow
to implement a clocksource driver.
This driver can be used as a replacement for the MIPS GIC and MIPS R4K
clocksources and sched clocks, which are clocked from the CPU clock.
Given the general purpose timers are clocked from an independent clock,
this new clocksource driver will be useful to introduce CPUFreq support
for Pistachio machines.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Signed-off-by: Govindraj Raja <govindraj.raja@imgtec.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Cc: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10899/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
CLOCKSOURCE: mips-gic: Update clockevent frequency on clock rate changes
This commit introduces the clockevent frequency update, using
a clock notifier. It will be used to support CPUFreq on platforms
using MIPS GIC based clockevents.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Govindraj Raja <Govindraj.Raja@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Patchwork: https://patchwork.linux-mips.org/patch/10782/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
CLOCKSOURCE: mips-gic: Split clocksource and clockevent initialization
This is preparation work for the introduction of clockevent frequency
update with a clock notifier. This is only possible when the device
is passed a clk struct, so let's split the legacy and devicetree
initialization.
Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: Thomas Gleixner <tglx@linutronix.de> Cc: James Hartley <James.Hartley@imgtec.com> Cc: Govindraj Raja <Govindraj.Raja@imgtec.com> Cc: Damien Horsley <Damien.Horsley@imgtec.com> Cc: James Hogan <James.Hogan@imgtec.com> Cc: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Patchwork: https://patchwork.linux-mips.org/patch/10781/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 3 Aug 2015 15:49:30 +0000 (08:49 -0700)]
MIPS: Tidy up FPU context switching
Rather than saving the scalar FP or vector context in the assembly
resume function, reuse the existing C code we have in fpu.h to do
exactly that. This reduces duplication, results in a much easier to read
resume function & should allow the compiler to optimise out more MSA
code due to is_msa_enabled()/cpu_has_msa being known-zero at compile
time for kernels without MSA support.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10830/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Kamlakant Patel [Sat, 1 Aug 2015 12:14:20 +0000 (17:44 +0530)]
MIPS: Netlogic: Use chip_data for irq_chip methods
Update mips/netlogic/common/irq.c and mips/pci/msi-xlp.c to use chip_data
to store interrupt controller data pointer. It uses handler_data now,
and that causes errors when an API (like the GPIO subsystem) tries to
use the handler data.
Alban Bedel [Sun, 2 Aug 2015 16:30:11 +0000 (18:30 +0200)]
MIPS: Remove all the uses of custom gpio.h
Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS
machines, and each machine type provides its own gpio.h. However
only a handful really implement the GPIO API, most just forward
everythings to gpiolib.
The Alchemy machine is notable as it provides a system to allow
implementing the GPIO API at the board level. But it is not used by
any board currently supported, so it can also be removed.
For most machine types we can just remove the custom gpio.h, as well
as the custom wrappers if some exists. Some of the code found in
the wrappers must be moved to the respective GPIO driver.
A few more fixes are need in some drivers as they rely on linux/gpio.h
to provides some machine specific definitions, or used asm/gpio.h
instead of linux/gpio.h for the gpio API.
Alban Bedel [Fri, 3 Jul 2015 09:11:48 +0000 (11:11 +0200)]
MIPS: Ath79: Remove the unused GPIO function API
To prepare moving the GPIO driver to drivers/gpio remove the
platform specific pinmux API. As it is not used by any board,
and such functionality should better be implemented using the
pinmux subsystem just removing it seems to be the best option.
Paul Burton [Thu, 30 Jul 2015 15:16:10 +0000 (08:16 -0700)]
MIPS: Select CONFIG_ARCH_USE_CMPXCHG_LOCKREF for MIPS64
On MIPS64 we have spinlocks that are 32b in size and an efficient
cmpxchg64 implementation, so we qualify to make use of cmpxchg backed
lockrefs. Select the ARCH_USE_CMPXCHG_LOCKREF Kconfig symbol and provide
a trivial implementation of arch_spin_value_unlocked to satisfy the
lockref code.
Using Linus' simple testcase from
http://article.gmane.org/gmane.linux.file-systems/77466 on a dual core
system with an in-development MIPS64 CPU running on FPGA I see around an
8% gain:
Pre-patch:
Total loops: 252698
Total loops: 251482
Total loops: 250806
Total loops: 252885
Total loops: 251666
Post-patch:
Total loops: 273728
Total loops: 269932
Total loops: 269341
Total loops: 275004
Total loops: 270208
[ralf@linux-mips.org: Fixed conflict.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Maciej W. Rozycki <macro@codesourcery.com> Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10810/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
MIPS was using finish_arch_switch() as a hook to restore and initialize
CPU context for all threads, even newly created kernel and user threads.
This is however entirely solvable within switch_to() so get rid of
finish_arch_switch() which is in the way of scheduler cleanups.
Alex Smith [Fri, 24 Jul 2015 15:16:12 +0000 (16:16 +0100)]
MIPS: Use Ingenic-specific write combine attribute on all Ingenic platforms
The Ingenic-specific write combining cache attribute was defined based
on CONFIG_MACH_JZ4740 and therefore not used on JZ4780. Change this to
CONFIG_MACH_INGENIC so that it gets used on all Ingenic platforms.
Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10769/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Alex Smith [Thu, 30 Jul 2015 11:03:42 +0000 (12:03 +0100)]
MIPS: Add implementation of dma_map_ops.mmap()
The generic implementation of dma_map_ops.mmap(), dma_common_mmap(),
is not correct for non-coherent devices. It expects to be passed a
virtual address previously returned by dma_alloc_coherent(), which for
a non-coherent device will return a KSEG1 address. It then attempts to
convert that virtual address to a physical address using virt_to_page()
which will yield an incorrect address.
Also, dma_common_mmap() does not handle the DMA_ATTR_WRITE_COMBINE
attribute, and therefore dma_mmap_writecombine() will not actually set
the appropriate pgprot_t flags for write combining.
This patch adds an implementation of dma_map_ops.mmap() that correctly
handles KSEG1 addresses, and enables write combining when requested.
Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: Sadegh Abbasi <Sadegh.Abbasi@imgtec.com> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10808/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Alex Smith [Fri, 24 Jul 2015 15:16:10 +0000 (16:16 +0100)]
MIPS: Fix definition of pgprot_writecombine()
If pgprot_writecombine is not #defined, asm-generic/pgtable.h will try
to provide a default implementation by #defining it to pgprot_noncached.
However our implementation is an inline function rather than a #define,
so it was never actually used because of the #define in generic code.
Add "#define pgprot_writecombine pgprot_writecombine" to prevent generic
code from re-defining it.
Signed-off-by: Alex Smith <alex.smith@imgtec.com> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10767/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:27 +0000 (12:58 -0700)]
MIPS: Drop EXPERIMENTAL tag from O32+FP64 & MSA
CONFIG_MIPS_O32_FP64_SUPPORT and CONFIG_CPU_HAS_MSA are in pretty good
shape these days, and in much wider use than they once were. Stop
referring to them as EXPERIMENTAL.
Paul Burton [Mon, 27 Jul 2015 19:58:23 +0000 (12:58 -0700)]
MIPS: AT_HWCAP aux vector infrastructure
In order for userland to determine whether various features are safe to
use, it will need to know both that the hardware supports those features
and that the kernel is recent enough & configured appropriately to
support them. For example under the O32 modeless FP proposal the dynamic
linker & ifunc resolvers will need this information. The kernel is the
only thing in a position to know availability accurately, so the kernel
needs to provide the information to userland. This patch introduces the
infrastructure to provide the AT_HWCAP aux vector to userland in order
to provide that information. It also defines the 2 currently specified
flags, which indicate MIPSr6 & MSA support.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Kees Cook <keescook@chromium.org> Cc: Huacai Chen <chenhc@lemote.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: Alex Smith <alex@alex-smith.me.uk> Cc: linux-kernel@vger.kernel.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Ingo Molnar <mingo@kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/10797/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:22 +0000 (12:58 -0700)]
MIPS: Save MSA extended context around signals
It is desirable for signal handlers to be allowed to make use of MSA,
particularly if auto vectorisation is used when compiling a program.
The MSA context must therefore be saved & restored before & after
invoking the signal handler. Make use of the extended context structs
defined in the preceding patch to save MSA context after the sigframe
when appropriate.
[ralf@linux-mips.org: Fixed conflicts.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: James Hogan <james.hogan@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10796/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:21 +0000 (12:58 -0700)]
MIPS: Add definitions for extended context
The context introduced by MSA needs to be saved around signals. However,
we can't increase the size of struct sigcontext because that will change
the offset of the signal mask in struct sigframe or struct ucontext.
This patch instead places the new context immediately after the struct
sigframe for traditional signals, or similarly after struct ucontext for
RT signals. The layout of struct sigframe & struct ucontext is identical
from their sigcontext fields onwards, so the offset from the sigcontext
to the extended context will always be the same regardless of the type
of signal.
Userland will be able to search through the extended context by using
the magic values to detect which types of context are present. Any
unrecognised context can be skipped over using the size field of struct
extcontext. Once the magic value END_EXTCONTEXT_MAGIC is seen it is
known that there are no further extended context structures to examine.
This approach is somewhat similar to that taken by ARM to save VFP &
other context at the end of struct ucontext.
Userland can determine whether extended context is present by checking
for the USED_EXTCONTEXT bit in the sc_used_math field of struct
sigcontext. Whilst this could potentially change the historic semantics
of sc_used_math if further extended context which does not imply FP
context were to be introduced in the future, I have been unable to find
any userland code making use of sc_used_math at all. Using one of the
fields described as unused in struct sigcontext was considered, but the
kernel does not already write to those fields so there would be no
guarantee of the field being clear on older kernels. Other alternatives
would be to have userland check the kernel version, or to have a HWCAP
bit indicating presence of extended context. However there is a desire
to have the context & information required to decode it be self
contained such that, for example, debuggers could decode the saved
context easily.
[ralf@linux-mips.org: Fixed conflict.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Alex Smith <alex@alex-smith.me.uk> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Daniel Borkmann <dborkman@redhat.com> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10795/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:20 +0000 (12:58 -0700)]
MIPS: Indicate FP mode in sigcontext sc_used_math
The sc_used_math field of struct sigcontext & its variants has
traditionally been used as a boolean value indicating only whether or
not floating point context is saved within the sigcontext. With various
supported FP modes & the ability to switch between them this information
will no longer be enough to decode the meaning of the data stored in the
sc_fpregs fields of struct sigcontext.
To make that possible 3 bits are defined within sc_used_math:
- Bit 0 (USED_FP) represents whether FP was used, essentially
providing the boolean flag which sc_used_math as a whole provided
previously.
- Bit 1 (USED_FR1) provides the value of the Status.FR bit at the time
the FP context was saved.
- Bit 2 (USED_HYBRID_FPRS) indicates whether the FP context was saved
under the hybrid FPR scheme. Essentially, when set the odd singles
are located in bits 63:32 of the preceding even indexed sc_fpregs
element.
Any userland that tests whether the sc_used_math field is zero or
non-zero will continue to function as expected. Having said that, I
could not find any userland which uses the sc_used_math field at all.
[ralf@linux-mips.org: Fixed rejects.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10794/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:18 +0000 (12:58 -0700)]
MIPS: Use common FP sigcontext code for O32 compat
Make use of the common FP sigcontext code for O32 binaries running on
MIPS64 kernels now that it is taking appropriate offsets into struct
sigcontext(32) from struct mips_abi.
[ralf@linux-mips.org: Fixed reject.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: James Hogan <james.hogan@imgtec.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10792/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:17 +0000 (12:58 -0700)]
MIPS: Skip odd double FP registers when copying FP32 sigcontext
When a task uses 32 bit floating point, the odd indexed 32b register
values are stored in bits 63:32 of the preceding even indexed 64b
FP register field in saved context. Thus there is no point in
preserving the odd indexed 64b register fields since they hold no
valid context. This patch will cause them to be skipped, as is
already done in arch/mips/kernel/signal32.c.
[ralf@linux-mips.org: Fixed reject.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Maciej W. Rozycki <macro@codesourcery.com> Cc: Andrew Morton <akpm@linux-foundation.org>
Patchwork: https://patchwork.linux-mips.org/patch/10791/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:16 +0000 (12:58 -0700)]
MIPS: Move FP usage checks into protected_{save, restore}_fp_context
In preparation for sharing protected_{save,restore}_fp_context with
compat ABIs, move the FP usage checks into said functions. This will
both enable that code to be shared, and allow for extensions of it in
further patches to also be shared.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10790/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:15 +0000 (12:58 -0700)]
MIPS: Use struct mips_abi offsets to save FP context
When saving FP state to struct sigcontext, make use of the offsets
provided by struct mips_abi to obtain appropriate addresses for the
sc_fpregs & sc_fpc_csr fields of the sigcontext. This is done only for
the native struct sigcontext in this patch (ie. for O32 in CONFIG_32BIT
kernels or for N64 in CONFIG_64BIT kernels) but is done in preparation
for sharing this code with compat ABIs in further patches.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: James Hogan <james.hogan@imgtec.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10789/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:14 +0000 (12:58 -0700)]
MIPS: Add offsets to sigcontext FP fields to struct mips_abi
Add fields to struct mips_abi, which holds information regarding the
kernel-userland ABI regarding signals, to specify the offsets to the FP
related fields within the appropriate variant of struct sigcontext.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: James Hogan <james.hogan@imgtec.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10788/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 27 Jul 2015 19:58:13 +0000 (12:58 -0700)]
MIPS: Simplify EVA FP context handling code
The protected_{save,restore}_fp_context functions had effectively
different implementations for EVA. Simplify & unify the code somewhat
such that EVA configurations simply guarantee the FPU-not-owned path
through the standard code path.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Guenter Roeck <linux@roeck-us.net> Cc: Matthew Fortune <matthew.fortune@imgtec.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: linux-kernel@vger.kernel.org Cc: Richard Weinberger <richard@nod.at> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Maciej W. Rozycki <macro@codesourcery.com>
Patchwork: https://patchwork.linux-mips.org/patch/10787/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
James Hogan [Wed, 15 Jul 2015 15:17:47 +0000 (16:17 +0100)]
MIPS: Rearrange ENTRYLO field definitions
The generic field definitions (i.e. present before MIPS32/MIPS64) in
mipsregs.h are conventionally not prefixed with MIPS_, so rename the
recently added MIPS_ENTRYLO_* definitions for the G, V, D, and C fields
to ENTRYLO_*. Also rearrange to put the EntryLo and EntryHi definitions
in the right place in the file.
Fixes: 8ab6abcb6aa4 ("MIPS: mipsregs.h: Add EntryLo bit definitions") Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10725/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
James Hogan [Wed, 15 Jul 2015 15:17:46 +0000 (16:17 +0100)]
MIPS: dump_tlb: Dump FrameMask register if exists
The FrameMask register is relevant to the TLB so it should be dumped by
dump_tlb_regs(), however it is only present in certain cores (r10000,
r12000, r14000, r16000). Add dumping of it, conditional upon
current_cpu_type().
Suggested-by: Joshua Kinard <kumba@gentoo.org> Suggested-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10724/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
James Hogan [Wed, 15 Jul 2015 15:17:45 +0000 (16:17 +0100)]
MIPS: dump_tlb: Only dump PageGrain if interesting
The PageGrain register may not exist if certain architectural features
aren't present, therefore only print out its value when dumping the TLB
registers if it is expected to contain fields relevant to the TLB.
Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs") Reported-by: Joshua Kinard <kumba@gentoo.org> Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Joshua Kinard <kumba@gentoo.org> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10723/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
James Hogan [Wed, 15 Jul 2015 15:17:43 +0000 (16:17 +0100)]
MIPS: Refactor dumping of TLB registers for r3k/r4k
The TLB registers are dumped in a couble of places:
- sysrq_tlbdump_single() - when dumping TLB state.
- do_mcheck() - in response to a machine check error.
The main TLB registers also differ between r3k and r4k, but r4k appears
to be assumed.
Refactor this code into a dump_tlb_regs() function, implemented for both
r3k and r4k, and used by both of the above functions.
Fixes: d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all CPUs") Suggested-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10721/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Commit d1e9a4f54735 ("MIPS: Add SysRq operation to dump TLBs on all
CPUs") added the 'x' sysrq key for dumping MIPS TLB entries, but didn't
document it in Documentation/sysrq.txt.
Add mention of the MIPS use of the 'x' SysRq key.
Reported-by: Maciej W. Rozycki <macro@linux-mips.org> Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Jonathan Corbet <corbet@lwn.net> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Cc: linux-doc@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10720/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Commit c8a34581ec09 ("MIPS: Emulate the BC1{EQ,NE}Z FPU instructions")
added support for emulating the new R6 BC1{EQ,NE}Z branches but it missed
the case where the instruction that caused the exception was not on a DS.
MIPS: cp1emu: Fix closing bracket for the d_fmt case
The double format (d_fmt) case uses an opening bracket which then
closes at the end of the word format (w_fmt). This can be rather confusing
so add the closing bracket at the end of the d_fmt case and use another one
for the w_fmt one.
Chris Packham [Tue, 14 Jul 2015 22:44:30 +0000 (10:44 +1200)]
MIPS: Use unsigned int when reading CP0 registers
Update __read_32bit_c0_register() and __read_32bit_c0_ctrl_register() to
use "unsigned int res;" instead of "int res;". There is little reason to
treat these register values as signed. They are either counters (which
by definition are unsigned) or are made up of various bit fields to be
interpreted as per the CPU datasheet.
This has come up via u-boot[1] which sync's asm/mipsregs.h with the
kernel. In u-boots case the value read from read_c0_count() is assigned
to an unsigned long [2] which triggers a sign extension and causes a
bug.
U-boot should probably be more explicit about the types used for the
timer_read_counter() API but that aside is there any reason to treat
these values as signed integers? A quick grep around the arch/mips makes
me thing that there may be some bugs lurking when read_c0_count() starts
to yield a negative value but I haven't really explored any of them.
Signed-off-by: Chris Packham <judge.packham@gmail.com> Cc: linux-mips@linux-mips.org Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Chris Packham <judge.packham@gmail.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10718/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Fri, 10 Jul 2015 15:52:39 +0000 (16:52 +0100)]
MIPS: malta: Use generic platform_maar_init
The default implementation of platform_maar_init is sufficient for Malta
boards where we want to allow speculation in the regions of memory
corresponding to DDR & disallow it elsewhere. Drop the custom
implementation such that the default is used, reducing the duplication
of information provided by the Malta platform code.
Paul Burton [Fri, 10 Jul 2015 15:52:38 +0000 (16:52 +0100)]
MIPS: mm: default platform_maar_init using bootmem data
Introduce a default weak implementation of platform_maar_init which
makes use of the data that platforms already provide to the bootmem
allocator. This should hopefully cover the most common configurations,
reduce the duplication of information provided by platforms & leaves
platforms with the option of providing a custom implementation if
required.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Patchwork: https://patchwork.linux-mips.org/patch/10676/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Leonid Yegoshin [Mon, 22 Jun 2015 11:21:00 +0000 (12:21 +0100)]
MIPS: MSA unaligned memory access support
The MSA architecture specification allows for hardware to not implement
unaligned vector memory accesses in some or all cases. A typical example
of this is the I6400 core which does not implement unaligned vector
memory access when the memory crosses a page boundary. The architecture
also requires that such memory accesses complete successfully as far as
userland is concerned, so the kernel is required to emulate them.
This patch implements support for emulating unaligned MSA ld & st
instructions by copying between the user memory & the tasks FP context
in struct thread_struct, updating hardware registers from there as
appropriate in order to avoid saving & restoring the entire vector
context for each unaligned memory access.
Tested both using an I6400 CPU and with a QEMU build hacked to produce
AdEL exceptions for unaligned vector memory accesses.
[paul.burton@imgtec.com:
- Remove #ifdef's
- Move msa_op into enum major_op rather than #define
- Replace msa_{to,from}_wd with {read,write}_msa_wr_{b,h,w,l} and the
format-agnostic wrappers, removing the custom endian mangling for
big endian systems.
- Restructure the msa_op case in emulate_load_store_insn to share
more code between the load & store cases.
- Avoid the need for a temporary union fpureg on the stack by simply
reusing the already suitably aligned context in struct
thread_struct.
- Use sizeof(*fpr) rather than hardcoding 16 as the size for user
memory checks & copies.
- Stop recalculating the address of the unaligned vector memory access
and rely upon the value read from BadVAddr as we do for other
unaligned memory access instructions.
- Drop the now unused val8 & val16 fields in union fpureg.
- Rewrite commit message.
- General formatting cleanups.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-kernel@vger.kernel.org Cc: Jie Chen <chenj@lemote.com> Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/10573/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Paul Burton [Mon, 22 Jun 2015 11:20:59 +0000 (12:20 +0100)]
MIPS: Introduce accessors for MSA vector registers
Introduce accessor functions allowing the kernel to access arbitrary
vector registers using an arbitrary data format. The accessors are
implemented in assembly, using macros to avoid massive duplication, in
order to make use of the existing support for MSA with & without
toolchain support. The accessors will be used in a later patch.
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: James Hogan <james.hogan@imgtec.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Manuel Lauss <manuel.lauss@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10572/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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