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17 months agotarget/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs
Richard Purdie [Wed, 10 May 2023 11:19:13 +0000 (12:19 +0100)]
target/ppc: Fix fallback to MFSS for MFFS* instructions on pre 3.0 ISAs

The following commits changed the code such that the fallback to MFSS for MFFSCRN,
MFFSCRNI, MFFSCE and MFFSL on pre 3.0 ISAs was removed and became an illegal instruction:

  bf8adfd88b547680aa857c46098f3a1e94373160 - target/ppc: Move mffscrn[i] to decodetree
  394c2e2fda70da722f20fb60412d6c0ca4bfaa03 - target/ppc: Move mffsce to decodetree
  3e5bce70efe6bd1f684efbb21fd2a316cbf0657e - target/ppc: Move mffsl to decodetree

The hardware will handle them as a MFFS instruction as the code did previously.
This means applications that were segfaulting under qemu when encountering these
instructions which is used in glibc libm functions for example.

The fallback for MFFSCDRN and MFFSCDRNI added in a later patch was also missing.

This patch restores the fallback to MFSS for these instructions on pre 3.0s ISAs
as the hardware decoder would, fixing the segfaulting libm code. It doesn't have
the fallback for 3.0 onwards to match hardware behaviour.

Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Reviewed-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230510111913.1718734-1-richard.purdie@linuxfoundation.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
17 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Richard Henderson [Fri, 26 May 2023 21:40:55 +0000 (14:40 -0700)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* build system fixes and cleanups
* use subproject() for the dtc and keycodemapdb submodules
* fix virtio memory leak
* update slirp.wrap to latest commit in the master branch

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# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  configure: ignore --make
  meson: use subproject for keycodemapdb
  meson: use subproject for internal libfdt
  meson: simplify logic for -Dfdt
  virtio: qmp: fix memory leak
  slirp: update wrap to latest master
  meson: Add static glib dependency for initrd-stress.img
  meson: Remove leftover comment
  configure: unset harmful environment variables
  Makefile: remove $(TESTS_PYTHON)
  tests/vm: fix and simplify HOST_ARCH definition
  tests/docker: simplify HOST_ARCH definition

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoMerge tag 'pull-hex-20230526' of https://github.com/quic/qemu into staging
Richard Henderson [Fri, 26 May 2023 16:25:42 +0000 (09:25 -0700)]
Merge tag 'pull-hex-20230526' of https://github.com/quic/qemu into staging

Hexagon update

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# gpg:                using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422

* tag 'pull-hex-20230526' of https://github.com/quic/qemu:
  Hexagon (target/hexagon) Change Hexagon maintainer
  Hexagon: fix outdated `hex_new_*` comments
  target/hexagon/*.py: clean up used 'toss' and 'numregs' vars
  Hexagon (target/hexagon) Fix assignment to tmp registers
  Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoMerge tag 'pull-loongarch-20230526' of https://gitlab.com/gaosong/qemu into staging
Richard Henderson [Fri, 26 May 2023 14:14:23 +0000 (07:14 -0700)]
Merge tag 'pull-loongarch-20230526' of https://gitlab.com/gaosong/qemu into staging

pull-loongarch-20230526

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# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C  6C2C 40A2 FFF2 3926 3EDF

* tag 'pull-loongarch-20230526' of https://gitlab.com/gaosong/qemu:
  target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump
  target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoMerge tag 'pull-request-2023-05-26' of https://gitlab.com/thuth/qemu into staging
Richard Henderson [Fri, 26 May 2023 14:13:27 +0000 (07:13 -0700)]
Merge tag 'pull-request-2023-05-26' of https://gitlab.com/thuth/qemu into staging

* Use MachineClass->default_nic in more machines to allow running them
  without "--nodefaults" in builds that used "--without-default-devices"
* Improve qtests for such builds
* Add up-/downsampling qtest
* Avoid crash if default RAM backend name has been stolen
* Fix reentrant DMA problem in the lsi53c895a device (CVE-2023-0330)

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# gpg: Signature made Fri 26 May 2023 02:06:51 AM PDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [undefined]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
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* tag 'pull-request-2023-05-26' of https://gitlab.com/thuth/qemu:
  hw/scsi/lsi53c895a: Fix reentrancy issues in the LSI controller (CVE-2023-0330)
  lsi53c895a: disable reentrancy detection for MMIO region, too
  machine: do not crash if default RAM backend name has been stolen
  tests/qtest/ac97-test: add up-/downsampling tests
  tests/qtest/usb-hcd-ehci-test: Check for EHCI and UHCI HCDs before using them
  tests/qtest/rtl8139-test: Check whether the rtl8139 device is available
  tests/qtest: Check for virtio-blk before using -cdrom with the arm virt machine
  tests/qtest/usb-hcd-uhci-test: Check whether "usb-storage" is available
  hw/mips: Use MachineClass->default_nic in the virt machine
  hw/arm: Use MachineClass->default_nic in the sbsa-ref machine
  hw/xtensa: Use MachineClass->default_nic in the virt machine
  hw/loongarch64: Use MachineClass->default_nic in the virt machine
  hw/arm: Use MachineClass->default_nic in the virt machine
  hw/alpha: Use MachineClass->default_nic in the alpha machine
  hw/hppa: Use MachineClass->default_nic in the hppa machine

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoHexagon (target/hexagon) Change Hexagon maintainer
Taylor Simpson [Wed, 24 May 2023 16:11:26 +0000 (09:11 -0700)]
Hexagon (target/hexagon) Change Hexagon maintainer

Change Hexagon maintainer from Taylor Simpson to Brian Cain
Put Taylor's gmail address in .mailmap

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org
Message-Id: <20230524165355.3157700-2-tsimpson@quicinc.com>

17 months agoHexagon: fix outdated `hex_new_*` comments
Matheus Tavares Bernardino [Wed, 24 May 2023 14:41:48 +0000 (11:41 -0300)]
Hexagon: fix outdated `hex_new_*` comments

Some code comments refer to hex_new_value and hex_new_pred_value, which
have been transferred to DisasContext and, in the case of hex_new_value,
should now be accessed through get_result_gpr().

In order to fix this outdated comments and also avoid having to tweak
them whenever we make a variable name change in the future, let's
replace them with pseudocode.

Suggested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <8e1689e28dd7b1318369b55127cf47b82ab75921.1684939078.git.quic_mathbern@quicinc.com>

17 months agotarget/hexagon/*.py: clean up used 'toss' and 'numregs' vars
Matheus Tavares Bernardino [Wed, 24 May 2023 14:41:47 +0000 (11:41 -0300)]
target/hexagon/*.py: clean up used 'toss' and 'numregs' vars

Many Hexagon python scripts call hex_common.get_tagregs(), but only one
call site use the full reg structure given by this function. To make the
code cleaner, let's make get_tagregs() filter out the unused fields
(i.e. 'toss' and 'numregs'), properly removed the unused variables at
the call sites. The hex_common.bad_register() function is also adjusted
to work exclusively with 'regtype' and 'regid' args. For the single call
site that does use toss/numregs, we provide an optional parameter to
get_tagregs() which will restore the old full behavior.

Suggested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Message-Id: <3ffd4ccb972879f57f499705c624e8eaba7f8b52.1684939078.git.quic_mathbern@quicinc.com>

17 months agoHexagon (target/hexagon) Fix assignment to tmp registers
Marco Liebel [Mon, 22 May 2023 17:47:08 +0000 (10:47 -0700)]
Hexagon (target/hexagon) Fix assignment to tmp registers

The order in which instructions are generated by gen_insn() influences
assignment to tmp registers. During generation, tmp instructions (e.g.
generate_V6_vassign_tmp) use vreg_src_off() to determine what kind of
register to use as source. If some instruction (e.g.
generate_V6_vmpyowh_64_acc) uses a tmp register but is generated prior
to the corresponding tmp instruction, the vregs_updated_tmp bit map
isn't updated in time.

Exmple:
    { v14.tmp = v16; v25 = v14 } This works properly because
    generate_V6_vassign_tmp is generated before generate_V6_vassign
    and the bit map is updated.

    { v15:14.tmp = vcombine(v21, v16); v25:24 += vmpyo(v18.w,v14.h) }
    This does not work properly because vmpyo is generated before
    vcombine and therefore the bit map does not yet know that there's
    a tmp register.

The parentheses in the decoding function were in the wrong place.
Moving them to the correct location makes shuffling of .tmp vector
registers work as expected.

Signed-off-by: Marco Liebel <quic_mliebel@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Brian Cain <bcain@quicinc.com>
Message-Id: <20230522174708.464197-1-quic_mliebel@quicinc.com>

17 months agoHexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests
Taylor Simpson [Fri, 19 May 2023 16:05:59 +0000 (09:05 -0700)]
Hexagon (tests/tcg/hexagon) Clean up Hexagon check-tcg tests

Move test infra to header file
    check functions (always print line number on error)
    USR manipulation
    Useful floating point values
Use stdint.h types
Use stdbool.h bool where appropriate
Use trip counts local to for loop

Suggested-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Tested-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230522174341.1805460-1-tsimpson@quicinc.com>

17 months agoconfigure: ignore --make
Paolo Bonzini [Tue, 7 Jun 2022 10:48:49 +0000 (12:48 +0200)]
configure: ignore --make

Setting the MAKE variable to a GNU Make executable does not really have
any effect: if a non-GNU Make is used, the QEMU Makefile will fail to
parse.  Just remove everything related to --make and $make as dead code.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: use subproject for keycodemapdb
Paolo Bonzini [Thu, 18 May 2023 12:07:22 +0000 (12:07 +0000)]
meson: use subproject for keycodemapdb

By using a subproject, our own meson.build can use variables from
the subproject instead of hard-coded paths.  This is also the first step
towards managing downloads with .wrap files instead of submodule.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: use subproject for internal libfdt
Paolo Bonzini [Thu, 18 May 2023 12:07:22 +0000 (12:07 +0000)]
meson: use subproject for internal libfdt

Recent dtc/libfdt can use either Make or meson as the build system.
By using a subproject, our own meson.build can remove the hard
coded list of source files.

This is also the first step towards managing downloads with .wrap
files instead of submodule.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: simplify logic for -Dfdt
Paolo Bonzini [Thu, 18 May 2023 15:29:04 +0000 (17:29 +0200)]
meson: simplify logic for -Dfdt

fdt_opt == 'disabled' is going to give an error if libfdt is required
by any target, so catch that immediately.  For fdt_opt == 'enabled',
instead, do not check immediately whether the internal libfdt is present.
Instead do the check after ascertaining that libfdt is absent or too old.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agovirtio: qmp: fix memory leak
Paolo Bonzini [Mon, 15 May 2023 13:26:04 +0000 (15:26 +0200)]
virtio: qmp: fix memory leak

The VirtioInfoList is already allocated by QAPI_LIST_PREPEND and
need not be allocated by the caller.

Fixes Coverity CID 1508724.

Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agoslirp: update wrap to latest master
Paolo Bonzini [Tue, 23 May 2023 07:04:45 +0000 (09:04 +0200)]
slirp: update wrap to latest master

It is recommended to use SSIZE_T for ssize_t on win32, but the commit
that is being used for slirp.wrap uses int.  Update to include the fix
as well as the other bugfix commit "ip: Enforce strict aliasing".

Reported-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: Add static glib dependency for initrd-stress.img
Fabiano Rosas [Thu, 25 May 2023 21:20:44 +0000 (18:20 -0300)]
meson: Add static glib dependency for initrd-stress.img

We recently moved glib detection code to meson but this changes the
linker command line from -lglib-2.0 to using a path to libglib-2.0.so.
This does not work for static linking, which is used by stress.c:

 $ make V=1 tests/migration/initrd-stress.img
 cc -m64 -mcx16 -o tests/migration/stress ... -static -Wl,--start-group
 /usr/lib64/libglib-2.0.so -Wl,--end-group
 ...
 bin/ld: attempted static link of dynamic object `/usr/lib64/libglib-2.0.so'

Add a specific dependency for stress.c, which is linked statically.
The compiler command line is now:

 cc -m64 -mcx16 -o tests/migration/stress ... -static -pthread
 -Wl,--start-group -lm /usr/lib64/libpcre.a -lglib-2.0 -Wl,--end-group

Fixes: fc9a809e0d ("build: move glib detection and workarounds to meson")
Signed-off-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20230525212044.30222-3-farosas@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: Remove leftover comment
Fabiano Rosas [Thu, 25 May 2023 21:20:43 +0000 (18:20 -0300)]
meson: Remove leftover comment

Commit d2e6f9272d ("fuzz: remove fork-fuzzing scaffolding") removed
the linker script and forgot to remove the comment.

Signed-off-by: Fabiano Rosas <farosas@suse.de>
Message-Id: <20230525212044.30222-2-farosas@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agotarget/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump
Song Gao [Thu, 25 May 2023 12:00:05 +0000 (20:00 +0800)]
target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump

The vinsgr2vr/vpickve2gr instructions need use get_src/get_dst to get
gpr registers value, not cpu_gpr[]. The $zero register does not
have cpu_gpr[0] allocated.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1662

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230525120005.2223413-1-gaosong@loongson.cn>

17 months agotarget/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV
Song Gao [Mon, 15 May 2023 13:00:42 +0000 (21:00 +0800)]
target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV

1.helper_asrtle_d/helper_asrtgt_d need use GETPC() to get PC;
2 LD/ST{LE/GT} need set CSR_BADV = gpr[rj];
3 ASRTLE.D/ASRTGT.D also write CSR_BADV, but this value is random
  and has no reference value.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230515130042.2719712-1-gaosong@loongson.cn>

17 months agoconfigure: unset harmful environment variables
Paolo Bonzini [Thu, 25 May 2023 15:46:07 +0000 (17:46 +0200)]
configure: unset harmful environment variables

Apart from CLICOLOR_FORCE and GREP_OPTIONS, there are other variables
that are listed in the Autoconf manual.  While Autoconf neutralizes them
very early, and assumes it does not (yet) run in a shell that has "unset",
QEMU assumes that the user invoked configure under a POSIX shell, and
therefore can simply use "unset" to clear them.

CDPATH is particularly nasty because it messes up "cd ... && pwd".

Reported-by: Juan Quintela <quintela@redhat.com>
Cc: qemu-stable@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agoMakefile: remove $(TESTS_PYTHON)
Paolo Bonzini [Thu, 25 May 2023 09:56:13 +0000 (11:56 +0200)]
Makefile: remove $(TESTS_PYTHON)

It is now the same as $(PYTHON), since the latter always points at pyvenv/bin/python3.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agotests/vm: fix and simplify HOST_ARCH definition
Paolo Bonzini [Thu, 25 May 2023 09:52:49 +0000 (11:52 +0200)]
tests/vm: fix and simplify HOST_ARCH definition

ARCH is always empty, so just define HOST_ARCH as the result of uname.
The incorrect definition was not being used because the "ifeq" statement
is wrong; replace it with the same idiom based on $(realpath) that the
main Makefile uses.

With this change, vm-build-netbsd in a configured tree will not use
the PYTHONPATH hack.

Reported-by: John Snow <jsnow@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agotests/docker: simplify HOST_ARCH definition
Paolo Bonzini [Thu, 25 May 2023 09:51:45 +0000 (11:51 +0200)]
tests/docker: simplify HOST_ARCH definition

ARCH is always empty, so just define HOST_ARCH as the result of uname.

Acked-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agohw/scsi/lsi53c895a: Fix reentrancy issues in the LSI controller (CVE-2023-0330)
Thomas Huth [Mon, 22 May 2023 09:10:11 +0000 (11:10 +0200)]
hw/scsi/lsi53c895a: Fix reentrancy issues in the LSI controller (CVE-2023-0330)

We cannot use the generic reentrancy guard in the LSI code, so
we have to manually prevent endless reentrancy here. The problematic
lsi_execute_script() function has already a way to detect whether
too many instructions have been executed - we just have to slightly
change the logic here that it also takes into account if the function
has been called too often in a reentrant way.

The code in fuzz-lsi53c895a-test.c has been taken from an earlier
patch by Mauro Matteo Cascella.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1563
Message-Id: <20230522091011.1082574-1-thuth@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agolsi53c895a: disable reentrancy detection for MMIO region, too
Thomas Huth [Tue, 16 May 2023 09:05:56 +0000 (11:05 +0200)]
lsi53c895a: disable reentrancy detection for MMIO region, too

While trying to use a SCSI disk on the LSI controller with an
older version of Fedora (25), I'm getting:

 qemu: warning: Blocked re-entrant IO on MemoryRegion: lsi-mmio at addr: 0x34

and the SCSI controller is not usable. Seems like we have to
disable the reentrancy checker for the MMIO region, too, to
get this working again.

The problem could be reproduced it like this:

./qemu-system-x86_64 -accel kvm -m 2G -machine q35 \
 -device lsi53c810,id=lsi1 -device scsi-hd,drive=d0 \
 -drive if=none,id=d0,file=.../somedisk.qcow2 \
 -cdrom Fedora-Everything-netinst-i386-25-1.3.iso

Where somedisk.qcow2 is an image that contains already some partitions
and file systems.

In the boot menu of Fedora, go to
"Troubleshooting" -> "Rescue a Fedora system" -> "3) Skip to shell"

Then check "dmesg | grep -i 53c" for failure messages, and try to mount
a partition from somedisk.qcow2.

Message-Id: <20230516090556.553813-1-thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agomachine: do not crash if default RAM backend name has been stolen
Igor Mammedov [Mon, 22 May 2023 13:17:17 +0000 (15:17 +0200)]
machine: do not crash if default RAM backend name has been stolen

QEMU aborts when default RAM backend should be used (i.e. no
explicit '-machine memory-backend=' specified) but user
has created an object which 'id' equals to default RAM backend
name used by board.

 $QEMU -machine pc \
       -object memory-backend-ram,id=pc.ram,size=4294967296

 Actual results:
 QEMU 7.2.0 monitor - type 'help' for more information
 (qemu) Unexpected error in object_property_try_add() at ../qom/object.c:1239:
 qemu-kvm: attempt to add duplicate property 'pc.ram' to object (type 'container')
 Aborted (core dumped)

Instead of abort, check for the conflicting 'id' and exit with
an error, suggesting how to remedy the issue.

Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2207886
Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Message-Id: <20230522131717.3780533-1-imammedo@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agotests/qtest/ac97-test: add up-/downsampling tests
Volker Rümelin [Sat, 20 May 2023 11:33:13 +0000 (13:33 +0200)]
tests/qtest/ac97-test: add up-/downsampling tests

Test if the audio subsystem can handle extreme up- and down-
sampling ratios like 44100/1 and 1/44100. For some time these
used to trigger QEMU aborts. The test was taken from
https://gitlab.com/qemu-project/qemu/-/issues/71 where it was
used to demonstrate a very different issue.

Suggested-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Volker Rümelin <vr_qemu@t-online.de>
Message-Id: <20230520113313.5177-1-vr_qemu@t-online.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agotests/qtest/usb-hcd-ehci-test: Check for EHCI and UHCI HCDs before using them
Thomas Huth [Thu, 25 May 2023 08:10:16 +0000 (10:10 +0200)]
tests/qtest/usb-hcd-ehci-test: Check for EHCI and UHCI HCDs before using them

The devices might not be available in the binary (e.g. when compiling
with "--without-default-devices"), so we have to check before we can
use them.

Message-Id: <20230525081016.1870364-5-thuth@redhat.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agotests/qtest/rtl8139-test: Check whether the rtl8139 device is available
Thomas Huth [Thu, 25 May 2023 08:10:15 +0000 (10:10 +0200)]
tests/qtest/rtl8139-test: Check whether the rtl8139 device is available

Though we are already using CONFIG_RTL8139_PCI in the meson.build file
for testing whether the rtl8139 device is available or not, this is not
enough: The CONFIG switch might have been selected by another target
(e.g. the mips fuloong2e machine has the rtl8139 chip soldered on the
board), so CONFIG_RTL8139_PCI ends up in config_all_devices and the
test then gets executed on x86. We need an additional run-time check
to be on the safe side to make this test also work when configure has
been run with "--without-default-devices".

Message-Id: <20230525081016.1870364-4-thuth@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agotests/qtest: Check for virtio-blk before using -cdrom with the arm virt machine
Thomas Huth [Thu, 25 May 2023 08:10:14 +0000 (10:10 +0200)]
tests/qtest: Check for virtio-blk before using -cdrom with the arm virt machine

The arm "virt" machine needs "virtio-blk-pci" for devices that get attached
via the "-cdrom" option. Since this is an optional device that might not
be available in the binary, we should check for the availability of this
device first before using it.

Message-Id: <20230525081016.1870364-3-thuth@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agotests/qtest/usb-hcd-uhci-test: Check whether "usb-storage" is available
Thomas Huth [Thu, 25 May 2023 08:10:13 +0000 (10:10 +0200)]
tests/qtest/usb-hcd-uhci-test: Check whether "usb-storage" is available

The "usb-storage" device might not have been compiled into the binary
(e.g. when compiling with "--without-default-devices"), so we have to
check first before using it.

Message-Id: <20230525081016.1870364-2-thuth@redhat.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/mips: Use MachineClass->default_nic in the virt machine
Philippe Mathieu-Daudé [Wed, 24 May 2023 12:25:59 +0000 (14:25 +0200)]
hw/mips: Use MachineClass->default_nic in the virt machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Inspired-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230524122559.28863-1-philmd@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/arm: Use MachineClass->default_nic in the sbsa-ref machine
Thomas Huth [Tue, 23 May 2023 14:41:56 +0000 (16:41 +0200)]
hw/arm: Use MachineClass->default_nic in the sbsa-ref machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Message-Id: <20230524082037.1620952-1-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/xtensa: Use MachineClass->default_nic in the virt machine
Thomas Huth [Tue, 23 May 2023 11:04:35 +0000 (13:04 +0200)]
hw/xtensa: Use MachineClass->default_nic in the virt machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Message-Id: <20230523110435.1375774-6-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/loongarch64: Use MachineClass->default_nic in the virt machine
Thomas Huth [Tue, 23 May 2023 11:04:34 +0000 (13:04 +0200)]
hw/loongarch64: Use MachineClass->default_nic in the virt machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Message-Id: <20230523110435.1375774-5-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Tested-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/arm: Use MachineClass->default_nic in the virt machine
Thomas Huth [Tue, 23 May 2023 11:04:33 +0000 (13:04 +0200)]
hw/arm: Use MachineClass->default_nic in the virt machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Message-Id: <20230523110435.1375774-4-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/alpha: Use MachineClass->default_nic in the alpha machine
Thomas Huth [Tue, 23 May 2023 11:04:32 +0000 (13:04 +0200)]
hw/alpha: Use MachineClass->default_nic in the alpha machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Message-Id: <20230523110435.1375774-3-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agohw/hppa: Use MachineClass->default_nic in the hppa machine
Thomas Huth [Tue, 23 May 2023 11:04:31 +0000 (13:04 +0200)]
hw/hppa: Use MachineClass->default_nic in the hppa machine

Mark the default NIC via the new MachineClass->default_nic setting
so that the machine-defaults code in vl.c can decide whether the
default NIC is usable or not (for example when compiling with the
"--without-default-devices" configure switch).

Message-Id: <20230523110435.1375774-2-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
17 months agoMerge tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu into staging
Richard Henderson [Thu, 25 May 2023 18:11:52 +0000 (11:11 -0700)]
Merge tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu into staging

tcg/mips:
  - Constant formation improvements
  - Replace MIPS_BE with HOST_BIG_ENDIAN
  - General cleanups
tcg/riscv:
  - Improve setcond
  - Support movcond
  - Support Zbb, Zba

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# gpg: Signature made Thu 25 May 2023 11:07:21 AM PDT
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# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]

* tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu: (23 commits)
  tcg/riscv: Support CTZ, CLZ from Zbb
  tcg/riscv: Implement movcond
  tcg/riscv: Improve setcond expansion
  tcg/riscv: Support CPOP from Zbb
  tcg/riscv: Support REV8 from Zbb
  tcg/riscv: Support rotates from Zbb
  tcg/riscv: Use ADD.UW for guest address generation
  tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb
  tcg/riscv: Support ANDN, ORN, XNOR from Zbb
  tcg/riscv: Probe for Zba, Zbb, Zicond extensions
  disas/riscv: Decode czero.{eqz,nez}
  tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN
  tcg/mips: Use qemu_build_not_reached for LO/HI_OFF
  tcg/mips: Try three insns with shift and add in tcg_out_movi
  tcg/mips: Try tb-relative addresses in tcg_out_movi
  tcg/mips: Aggressively use the constant pool for n64 calls
  tcg/mips: Use the constant pool for 64-bit constants
  tcg/mips: Split out tcg_out_movi_two
  tcg/mips: Split out tcg_out_movi_one
  tcg/mips: Create and use TCG_REG_TB
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Richard Henderson [Thu, 25 May 2023 15:36:10 +0000 (08:36 -0700)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* hot-unplug fixes for ioport
* purge qatomic_mb_read/set from monitor
* build system fixes
* OHCI fix from gitlab
* provide EPYC-Rome CPU model not susceptible to XSAVES erratum

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmRvGpEUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroOa/Af/WS5/tmIlEYgH7UOPERQXNqf7+Jwj
# bA2wgqv3ZoQwcgp5f4EVjfA8ABfpGxLZy6xIdUSbWANb8lDJNuh/nPd/em3rWUAU
# LnJGGdo1vF31gfsVQnlzb7hJi3ur+e2f8JqkRVskDCk3a7YY44OCN42JdKWLrN9u
# CFf2zYqxMqXHjrYrY0Kx2oTkfGDZrfwUlx0vM4dHb8IEoxaplfDd8lJXQzjO4htr
# 3nPBPjQ+h08EeC7mObH4XoJE0omzovR10GkBo8K4q952xGOQ041Y/2YY7JwLfx0D
# na7IanVo+ZAmvTJZoJFSBwNnXkTMHvDH5+Hc45NSTsDBtz0YJhRxPw/z/A==
# =A5Lp
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 25 May 2023 01:21:37 AM PDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
  monitor: do not use mb_read/mb_set
  monitor: extract request dequeuing to a new function
  monitor: introduce qmp_dispatcher_co_wake
  monitor: cleanup fetching of QMP requests
  monitor: cleanup detection of qmp_dispatcher_co shutting down
  monitor: do not use mb_read/mb_set for suspend_cnt
  monitor: add more *_locked() functions
  monitor: allow calling monitor_resume under mon_lock
  monitor: use QEMU_LOCK_GUARD a bit more
  softmmu/ioport.c: make MemoryRegionPortioList owner of portio_list MemoryRegions
  softmmu/ioport.c: QOMify MemoryRegionPortioList
  softmmu/ioport.c: allocate MemoryRegionPortioList ports on the heap
  usb/ohci: Set pad to 0 after frame update
  meson: move -no-pie from linker to compiler
  meson: fix rule for qemu-ga installer
  meson.build: Fix glib -Wno-unused-function workaround
  target/i386: EPYC-Rome model without XSAVES

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Support CTZ, CLZ from Zbb
Richard Henderson [Wed, 26 Apr 2023 13:21:55 +0000 (14:21 +0100)]
tcg/riscv: Support CTZ, CLZ from Zbb

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Implement movcond
Richard Henderson [Wed, 26 Apr 2023 10:59:55 +0000 (11:59 +0100)]
tcg/riscv: Implement movcond

Implement with and without Zicond.  Without Zicond, we were letting
the middle-end expand to a 5 insn sequence; better to use a branch
over a single insn.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Improve setcond expansion
Richard Henderson [Wed, 26 Apr 2023 08:38:32 +0000 (09:38 +0100)]
tcg/riscv: Improve setcond expansion

Split out a helper function, tcg_out_setcond_int, which does not
always produce the complete boolean result, but returns a set of
flags to do so.

Based on 21af16198425, the same improvement for loongarch64.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Support CPOP from Zbb
Richard Henderson [Wed, 26 Apr 2023 08:16:11 +0000 (09:16 +0100)]
tcg/riscv: Support CPOP from Zbb

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Support REV8 from Zbb
Richard Henderson [Tue, 25 Apr 2023 16:04:53 +0000 (17:04 +0100)]
tcg/riscv: Support REV8 from Zbb

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Support rotates from Zbb
Richard Henderson [Tue, 25 Apr 2023 15:34:07 +0000 (16:34 +0100)]
tcg/riscv: Support rotates from Zbb

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Use ADD.UW for guest address generation
Richard Henderson [Tue, 25 Apr 2023 15:19:44 +0000 (16:19 +0100)]
tcg/riscv: Use ADD.UW for guest address generation

The instruction is a combined zero-extend and add.
Use it for exactly that.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb
Richard Henderson [Tue, 25 Apr 2023 15:04:16 +0000 (16:04 +0100)]
tcg/riscv: Support ADD.UW, SEXT.B, SEXT.H, ZEXT.H from Zba+Zbb

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Support ANDN, ORN, XNOR from Zbb
Richard Henderson [Tue, 25 Apr 2023 14:47:34 +0000 (15:47 +0100)]
tcg/riscv: Support ANDN, ORN, XNOR from Zbb

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/riscv: Probe for Zba, Zbb, Zicond extensions
Richard Henderson [Tue, 25 Apr 2023 14:29:03 +0000 (15:29 +0100)]
tcg/riscv: Probe for Zba, Zbb, Zicond extensions

Define a useful subset of the extensions.  Probe for them
via compiler pre-processor feature macros and SIGILL.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agodisas/riscv: Decode czero.{eqz,nez}
Richard Henderson [Wed, 26 Apr 2023 12:33:05 +0000 (13:33 +0100)]
disas/riscv: Decode czero.{eqz,nez}

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN
Richard Henderson [Wed, 17 May 2023 13:56:44 +0000 (06:56 -0700)]
tcg/mips: Replace MIPS_BE with HOST_BIG_ENDIAN

Since e03b56863d2b, which replaced HOST_WORDS_BIGENDIAN
with HOST_BIG_ENDIAN, there is no need to define a second
symbol which is [0,1].

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Use qemu_build_not_reached for LO/HI_OFF
Richard Henderson [Mon, 28 Nov 2022 20:31:56 +0000 (12:31 -0800)]
tcg/mips: Use qemu_build_not_reached for LO/HI_OFF

The new(ish) macro produces a compile-time error instead
of a link-time error.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Try three insns with shift and add in tcg_out_movi
Richard Henderson [Fri, 6 Aug 2021 21:18:25 +0000 (11:18 -1000)]
tcg/mips: Try three insns with shift and add in tcg_out_movi

These sequences are inexpensive to test.  Maxing out at three insns
results in the same space as a load plus the constant pool entry.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Try tb-relative addresses in tcg_out_movi
Richard Henderson [Fri, 6 Aug 2021 21:30:35 +0000 (11:30 -1000)]
tcg/mips: Try tb-relative addresses in tcg_out_movi

These addresses are often loaded by the qemu_ld/st slow path,
for loading the retaddr value.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Aggressively use the constant pool for n64 calls
Richard Henderson [Fri, 6 Aug 2021 23:17:20 +0000 (13:17 -1000)]
tcg/mips: Aggressively use the constant pool for n64 calls

Repeated calls to a single helper are common -- especially
the ones for softmmu memory access.  Prefer the constant pool
to longer sequences to increase sharing.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Use the constant pool for 64-bit constants
Richard Henderson [Fri, 6 Aug 2021 23:07:41 +0000 (13:07 -1000)]
tcg/mips: Use the constant pool for 64-bit constants

During normal processing, the constant pool is accessible via
TCG_REG_TB.  During the prologue, it is accessible via TCG_REG_T9.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Split out tcg_out_movi_two
Richard Henderson [Fri, 6 Aug 2021 22:14:53 +0000 (12:14 -1000)]
tcg/mips: Split out tcg_out_movi_two

Emit all 32-bit signed constants, which can be loaded in two insns.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Split out tcg_out_movi_one
Richard Henderson [Fri, 6 Aug 2021 22:02:59 +0000 (12:02 -1000)]
tcg/mips: Split out tcg_out_movi_one

Emit all constants that can be loaded in exactly one insn.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Create and use TCG_REG_TB
Richard Henderson [Fri, 6 Aug 2021 19:28:31 +0000 (09:28 -1000)]
tcg/mips: Create and use TCG_REG_TB

This vastly reduces the size of code generated for 64-bit addresses.
The code for exit_tb, for instance, where we load a (tagged) pointer
to the current TB, goes from

0x400aa9725c:  li       v0,64
0x400aa97260:  dsll     v0,v0,0x10
0x400aa97264:  ori      v0,v0,0xaa9
0x400aa97268:  dsll     v0,v0,0x10
0x400aa9726c:  j        0x400aa9703c
0x400aa97270:  ori      v0,v0,0x7083

to

0x400aa97240:  j        0x400aa97040
0x400aa97244:  daddiu   v0,s6,-189

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Unify TCG_GUEST_BASE_REG tests
Richard Henderson [Fri, 6 Aug 2021 17:13:46 +0000 (07:13 -1000)]
tcg/mips: Unify TCG_GUEST_BASE_REG tests

In tcg_out_qemu_ld/st, we already check for guest_base matching int16_t.
Mirror that when setting up TCG_GUEST_BASE_REG in the prologue.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Move TCG_GUEST_BASE_REG to S7
Richard Henderson [Fri, 6 Aug 2021 17:10:57 +0000 (07:10 -1000)]
tcg/mips: Move TCG_GUEST_BASE_REG to S7

No functional change; just moving the saved reserved regs to the end.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg/mips: Move TCG_AREG0 to S8
Richard Henderson [Fri, 6 Aug 2021 17:08:54 +0000 (07:08 -1000)]
tcg/mips: Move TCG_AREG0 to S8

No functional change; just moving the saved reserved regs to the end.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agomonitor: do not use mb_read/mb_set
Paolo Bonzini [Wed, 15 Mar 2023 11:34:01 +0000 (12:34 +0100)]
monitor: do not use mb_read/mb_set

Instead of relying on magic memory barriers, document the pattern that
is being used.  It is the one based on Dekker's algorithm, and in this
case it is embodied as follows:

    enqueue request;              sleeping = true;
    smp_mb();                     smp_mb();
    if (sleeping) kick();         if (!have a request) yield();

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: extract request dequeuing to a new function
Paolo Bonzini [Fri, 3 Mar 2023 12:51:58 +0000 (13:51 +0100)]
monitor: extract request dequeuing to a new function

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: introduce qmp_dispatcher_co_wake
Paolo Bonzini [Fri, 3 Mar 2023 12:51:44 +0000 (13:51 +0100)]
monitor: introduce qmp_dispatcher_co_wake

This makes it possible to turn qmp_dispatcher_co_busy into a static
variable.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: cleanup fetching of QMP requests
Paolo Bonzini [Fri, 3 Mar 2023 11:51:33 +0000 (12:51 +0100)]
monitor: cleanup fetching of QMP requests

Use a continue statement so that "after going to sleep" is treated the same
way as "after processing a request".  Pull the monitor_lock critical
section out of monitor_qmp_requests_pop_any_with_lock() and protect
qmp_dispatcher_co_shutdown with the monitor_lock.

The two changes are complex to separate because monitor_qmp_dispatcher_co()
previously had a complicated logic to check for shutdown both before
and after going to sleep.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: cleanup detection of qmp_dispatcher_co shutting down
Paolo Bonzini [Fri, 3 Mar 2023 11:45:29 +0000 (12:45 +0100)]
monitor: cleanup detection of qmp_dispatcher_co shutting down

Instead of overloading qmp_dispatcher_co_busy, make the coroutine
pointer NULL.  This will make things break spectacularly if somebody
tries to start a request after monitor_cleanup().

AIO_WAIT_WHILE_UNLOCKED() does not need qatomic_mb_read(), because
the macro contains all the necessary memory barriers.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: do not use mb_read/mb_set for suspend_cnt
Paolo Bonzini [Fri, 3 Mar 2023 12:32:13 +0000 (13:32 +0100)]
monitor: do not use mb_read/mb_set for suspend_cnt

Clean up monitor_event to just use monitor_suspend/monitor_resume,
using mon->mux_out to protect against incorrect nesting (especially
on startup).

The only remaining case of reading suspend_cnt is in the can_read
callback, which is just advisory and can use qatomic_read.

As an extra benefit, mux_out is now simply protected by mon_lock.
Also, moving the prompt to the beginning of the main loop removes
it from the output in some error cases where QEMU does not actually
start successfully.  It is not a full fix and it would be nice to
also remove the monitor heading, but this is already a small (though
unintentional) improvement.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: add more *_locked() functions
Paolo Bonzini [Wed, 17 May 2023 12:46:49 +0000 (14:46 +0200)]
monitor: add more *_locked() functions

Allow flushing and printing to the monitor while mon->mon_lock is
held.  This will help cleaning up the locking of mon->mux_out and
mon->suspend_cnt.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: allow calling monitor_resume under mon_lock
Paolo Bonzini [Wed, 17 May 2023 15:19:03 +0000 (17:19 +0200)]
monitor: allow calling monitor_resume under mon_lock

Move monitor_resume()'s call to readline_show_prompt() outside the
potentially locked section.  Reuse the existing monitor_accept_input()
bottom half for this purpose.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomonitor: use QEMU_LOCK_GUARD a bit more
Paolo Bonzini [Wed, 17 May 2023 12:47:55 +0000 (14:47 +0200)]
monitor: use QEMU_LOCK_GUARD a bit more

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agosoftmmu/ioport.c: make MemoryRegionPortioList owner of portio_list MemoryRegions
Mark Cave-Ayland [Wed, 19 Apr 2023 15:16:52 +0000 (16:16 +0100)]
softmmu/ioport.c: make MemoryRegionPortioList owner of portio_list MemoryRegions

Currently when portio_list MemoryRegions are freed using portio_list_destroy() the RCU
thread segfaults generating a backtrace similar to that below:

    #0 0x5555599a34b6 in phys_section_destroy ../softmmu/physmem.c:996
    #1 0x5555599a37a3 in phys_sections_free ../softmmu/physmem.c:1011
    #2 0x5555599b24aa in address_space_dispatch_free ../softmmu/physmem.c:2430
    #3 0x55555996a283 in flatview_destroy ../softmmu/memory.c:292
    #4 0x55555a2cb9fb in call_rcu_thread ../util/rcu.c:284
    #5 0x55555a29b71d in qemu_thread_start ../util/qemu-thread-posix.c:541
    #6 0x7ffff4a0cea6 in start_thread nptl/pthread_create.c:477
    #7 0x7ffff492ca2e in __clone (/lib/x86_64-linux-gnu/libc.so.6+0xfca2e)

The problem here is that portio_list_destroy() unparents the portio_list
MemoryRegions causing them to be freed immediately, however the flatview
still has a reference to the MemoryRegion and so causes a use-after-free
segfault when the RCU thread next updates the flatview.

Solve the lifetime issue by making MemoryRegionPortioList the owner of the
portio_list MemoryRegions, and then reparenting them to the portio_list
owner. This ensures that they can be accessed as QOM children via the
portio_list owner, yet the MemoryRegionPortioList owns the refcount.

Update portio_list_destroy() to unparent the MemoryRegion from the
portio_list owner (while keeping mrpio->mr live until finalization of the
MemoryRegionPortioList), so that the portio_list MemoryRegions remain
allocated until flatview_destroy() removes the final refcount upon the
next flatview update.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230419151652.362717-4-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agosoftmmu/ioport.c: QOMify MemoryRegionPortioList
Mark Cave-Ayland [Wed, 19 Apr 2023 15:16:51 +0000 (16:16 +0100)]
softmmu/ioport.c: QOMify MemoryRegionPortioList

The aim of QOMification is so that the lifetime of the MemoryRegionPortioList
structure can be managed using QOM's in-built refcounting instead of having to
handle this manually.

Due to the use of an opaque pointer it isn't possible to model the new
TYPE_MEMORY_REGION_PORTIO_LIST directly using QOM properties, however since
use of the new object is restricted to the portio API we can simply set the
opaque pointer (and the heap-allocated port list) internally.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230419151652.362717-3-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agosoftmmu/ioport.c: allocate MemoryRegionPortioList ports on the heap
Mark Cave-Ayland [Wed, 19 Apr 2023 15:16:50 +0000 (16:16 +0100)]
softmmu/ioport.c: allocate MemoryRegionPortioList ports on the heap

In order to facilitate a conversion of MemoryRegionPortioList to a QOM object
move the allocation of MemoryRegionPortioList ports to the heap instead of
using a variable-length member at the end of the MemoryRegionPortioList
structure.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230419151652.362717-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agousb/ohci: Set pad to 0 after frame update
Paolo Bonzini [Tue, 23 May 2023 15:58:40 +0000 (17:58 +0200)]
usb/ohci: Set pad to 0 after frame update

When the OHCI controller's framenumber is incremented, HccaPad1 register
should be set to zero (Ref OHCI Spec 4.4)

ReactOS uses hccaPad1 to determine if the OHCI hardware is running,
consequently it fails this check in current qemu master.

Signed-off-by: Ryan Wendland <wendland@live.com.au>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1048
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: move -no-pie from linker to compiler
Paolo Bonzini [Mon, 22 May 2023 08:05:33 +0000 (10:05 +0200)]
meson: move -no-pie from linker to compiler

The large comment in the patch says it all; the -no-pie flag is broken and
this is why it was not included in QEMU_LDFLAGS before commit a988b4c5614
("build: move remaining compiler flag tests to meson", 2023-05-18).  And
some distros made things even worse, so we have to add it to the compiler
command line.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1664
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson: fix rule for qemu-ga installer
Paolo Bonzini [Mon, 22 May 2023 07:19:03 +0000 (09:19 +0200)]
meson: fix rule for qemu-ga installer

The bindir variable is not available in the "glib" variable, which is an internal
dependency (created with "declare_dependency").  Use glib_pc instead, which contains
the variable as it is instantiated from glib-2.0.pc.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agomeson.build: Fix glib -Wno-unused-function workaround
Nicolas Saenz Julienne [Wed, 24 May 2023 17:31:23 +0000 (17:31 +0000)]
meson.build: Fix glib -Wno-unused-function workaround

We want to only enable '-Wno-unused-function' if glib's version is
smaller than '2.57.2' and has a G_DEFINE_AUTOPTR_CLEANUP_FUNC()
implementation that doesn't take into account unused functions. But the
compilation test isn't working as intended as '-Wunused-function' isn't
enabled while running it.

Let's enable it.

Fixes: fc9a809e0d28 ("build: move glib detection and workarounds to meson")
Signed-off-by: Nicolas Saenz Julienne <nsaenz@amazon.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230524173123.66483-1-nsaenz@amazon.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agotarget/i386: EPYC-Rome model without XSAVES
Maksim Davydov [Wed, 24 May 2023 21:37:48 +0000 (00:37 +0300)]
target/i386: EPYC-Rome model without XSAVES

Based on the kernel commit "b0563468ee x86/CPU/AMD: Disable XSAVES on
AMD family 0x17", host system with EPYC-Rome can clear XSAVES capability
bit. In another words, EPYC-Rome host without XSAVES can occur. Thus, we
need an EPYC-Rome cpu model (without this feature) that matches the
solution of fixing this erratum

Signed-off-by: Maksim Davydov <davydov-max@yandex-team.ru>
Message-Id: <20230524213748.8918-1-davydov-max@yandex-team.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
17 months agoMerge tag 'pull-vfio-20230524' of https://github.com/legoater/qemu into staging
Richard Henderson [Wed, 24 May 2023 21:23:41 +0000 (14:23 -0700)]
Merge tag 'pull-vfio-20230524' of https://github.com/legoater/qemu into staging

vfio queue:

* Fix for a memory corruption due to an extra free
* Fix for a compile breakage

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# gpg: Signature made Wed 24 May 2023 01:17:34 AM PDT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* tag 'pull-vfio-20230524' of https://github.com/legoater/qemu:
  util/vfio-helpers: Use g_file_read_link()
  vfio/pci: Fix a use-after-free issue

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoAdd Kubernetes runner configuration
Camilla Conte [Mon, 22 May 2023 17:41:54 +0000 (18:41 +0100)]
Add Kubernetes runner configuration

Custom values for the gitlab-runner Helm chart.
See https://wiki.qemu.org/Testing/CI/KubernetesRunners.

Signed-off-by: Camilla Conte <cconte@redhat.com>
Message-Id: <20230522174153.46801-6-cconte@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoAdd CI variable RUNNER_TAG
Camilla Conte [Mon, 22 May 2023 17:41:53 +0000 (18:41 +0100)]
Add CI variable RUNNER_TAG

This allows to set a job tag dynamically.
We need this to be able to select the Kubernetes runner.
See https://wiki.qemu.org/Testing/CI/KubernetesRunners.

Signed-off-by: Camilla Conte <cconte@redhat.com>
Message-Id: <20230522174153.46801-5-cconte@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoAdd loop over docker info
Camilla Conte [Mon, 22 May 2023 17:41:52 +0000 (18:41 +0100)]
Add loop over docker info

Wait for docker info to return successfuly to ensure that
the docker server (daemon) started.
This is needed for jobs running on Kubernetes.
See https://wiki.qemu.org/Testing/CI/KubernetesRunners.

Signed-off-by: Camilla Conte <cconte@redhat.com>
Message-Id: <20230522174153.46801-4-cconte@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoUse docker "stable" tag
Camilla Conte [Mon, 22 May 2023 17:41:51 +0000 (18:41 +0100)]
Use docker "stable" tag

Use the same tag in all jobs.

Signed-off-by: Camilla Conte <cconte@redhat.com>
Message-Id: <20230522174153.46801-3-cconte@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoRemove redundant CI variables
Camilla Conte [Mon, 22 May 2023 17:41:50 +0000 (18:41 +0100)]
Remove redundant CI variables

These are not needed when using gitlab.com shared runners.

Signed-off-by: Camilla Conte <cconte@redhat.com>
Message-Id: <20230522174153.46801-2-cconte@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoutil/vfio-helpers: Use g_file_read_link()
Akihiko Odaki [Tue, 23 May 2023 02:39:12 +0000 (11:39 +0900)]
util/vfio-helpers: Use g_file_read_link()

When _FORTIFY_SOURCE=2, glibc version is 2.35, and GCC version is
12.1.0, the compiler complains as follows:

In file included from /usr/include/features.h:490,
                 from /usr/include/bits/libc-header-start.h:33,
                 from /usr/include/stdint.h:26,
                 from /usr/lib/gcc/aarch64-unknown-linux-gnu/12.1.0/include/stdint.h:9,
                 from /home/alarm/q/var/qemu/include/qemu/osdep.h:94,
                 from ../util/vfio-helpers.c:13:
In function 'readlink',
    inlined from 'sysfs_find_group_file' at ../util/vfio-helpers.c:116:9,
    inlined from 'qemu_vfio_init_pci' at ../util/vfio-helpers.c:326:18,
    inlined from 'qemu_vfio_open_pci' at ../util/vfio-helpers.c:517:9:
/usr/include/bits/unistd.h:119:10: error: argument 2 is null but the corresponding size argument 3 value is 4095 [-Werror=nonnull]
  119 |   return __glibc_fortify (readlink, __len, sizeof (char),
      |          ^~~~~~~~~~~~~~~

This error implies the allocated buffer can be NULL. Use
g_file_read_link(), which allocates buffer automatically to avoid the
error.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
17 months agovfio/pci: Fix a use-after-free issue
Zhenzhong Duan [Wed, 17 May 2023 02:46:51 +0000 (10:46 +0800)]
vfio/pci: Fix a use-after-free issue

vbasedev->name is freed wrongly which leads to garbage VFIO trace log.
Fix it by allocating a dup of vbasedev->name and then free the dup.

Fixes: 2dca1b37a760 ("vfio/pci: add support for VF token")
Suggested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
17 months agoMerge tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu into staging
Richard Henderson [Wed, 24 May 2023 01:57:46 +0000 (18:57 -0700)]
Merge tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu into staging

util: Host cpu detection for x86 and aa64
util: Use cpu detection for bufferiszero
migration: Use cpu detection for xbzrle
tcg: Replace and remove cpu_atomic_{ld,st}o*
host/include: Split qemu/atomic128.h
tcg: Remove DEBUG_DISAS
tcg: Remove USE_TCG_OPTIMIZATIONS

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* tag 'pull-tcg-20230523-3' of https://gitlab.com/rth7680/qemu: (28 commits)
  tcg: Remove USE_TCG_OPTIMIZATIONS
  tcg: Remove DEBUG_DISAS
  qemu/atomic128: Add runtime test for FEAT_LSE2
  qemu/atomic128: Improve cmpxchg fallback for atomic16_set
  tcg: Split out tcg/debug-assert.h
  accel/tcg: Correctly use atomic128.h in ldst_atomicity.c.inc
  qemu/atomic128: Split atomic16_read
  accel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128
  accel/tcg: Remove prot argument to atomic_mmu_lookup
  accel/tcg: Remove cpu_atomic_{ld,st}o_*_mmu
  target/s390x: Always use cpu_atomic_cmpxchgl_be_mmu in do_csst
  target/s390x: Use cpu_{ld,st}*_mmu in do_csst
  accel/tcg: Unify cpu_{ld,st}*_{be,le}_mmu
  target/s390x: Use tcg_gen_qemu_{ld,st}_i128 for LPQ, STPQ
  target/ppc: Use tcg_gen_qemu_{ld,st}_i128 for LQARX, LQ, STQ
  include/qemu: Move CONFIG_ATOMIC128_OPT handling to atomic128.h
  meson: Fix detect atomic128 support with optimization
  include/host: Split out atomic128-ldst.h
  include/host: Split out atomic128-cas.h
  util: Add cpuinfo-aarch64.c
  ...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg: Remove USE_TCG_OPTIMIZATIONS
Richard Henderson [Sat, 1 Apr 2023 23:08:38 +0000 (16:08 -0700)]
tcg: Remove USE_TCG_OPTIMIZATIONS

This is always defined, and the optimization pass is
essential to producing reasonable code.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg: Remove DEBUG_DISAS
Richard Henderson [Sat, 1 Apr 2023 23:06:47 +0000 (16:06 -0700)]
tcg: Remove DEBUG_DISAS

This had been set since the beginning, is never undefined,
and it would seem to be harmful to debugging to do so.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoqemu/atomic128: Add runtime test for FEAT_LSE2
Richard Henderson [Sat, 20 May 2023 02:22:25 +0000 (19:22 -0700)]
qemu/atomic128: Add runtime test for FEAT_LSE2

With FEAT_LSE2, load and store of int128 is directly supported.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoqemu/atomic128: Improve cmpxchg fallback for atomic16_set
Richard Henderson [Sat, 20 May 2023 03:53:16 +0000 (20:53 -0700)]
qemu/atomic128: Improve cmpxchg fallback for atomic16_set

Use __sync_bool_compare_and_swap_16 to control the loop,
rather than a separate comparison.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agotcg: Split out tcg/debug-assert.h
Richard Henderson [Tue, 28 Mar 2023 01:02:33 +0000 (18:02 -0700)]
tcg: Split out tcg/debug-assert.h

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoaccel/tcg: Correctly use atomic128.h in ldst_atomicity.c.inc
Richard Henderson [Sat, 20 May 2023 01:32:44 +0000 (18:32 -0700)]
accel/tcg: Correctly use atomic128.h in ldst_atomicity.c.inc

Remove the locally defined load_atomic16 and store_atomic16,
along with HAVE_al16 and HAVE_al16_fast in favor of the
routines defined in atomic128.h.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoqemu/atomic128: Split atomic16_read
Richard Henderson [Sat, 20 May 2023 01:30:28 +0000 (18:30 -0700)]
qemu/atomic128: Split atomic16_read

Create both atomic16_read_ro and atomic16_read_rw.
Previously we pretended that we had atomic16_read in system mode,
because we "know" that all ram is always writable to the host.
Now, expose read-only and read-write versions all of the time.

For aarch64, do not fall back to __atomic_read_16 even if
supported by the compiler, to work around a clang bug.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoaccel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128
Richard Henderson [Sat, 20 May 2023 01:02:19 +0000 (18:02 -0700)]
accel/tcg: Eliminate #if on HAVE_ATOMIC128 and HAVE_CMPXCHG128

These symbols will shortly become dynamic runtime tests and
therefore not appropriate for the preprocessor.  Use the
matching CONFIG_* symbols for that purpose.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoaccel/tcg: Remove prot argument to atomic_mmu_lookup
Richard Henderson [Sat, 20 May 2023 00:54:18 +0000 (17:54 -0700)]
accel/tcg: Remove prot argument to atomic_mmu_lookup

Now that load/store are gone, we're always passing
PAGE_READ | PAGE_WRITE for RMW atomic operations.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
17 months agoaccel/tcg: Remove cpu_atomic_{ld,st}o_*_mmu
Richard Henderson [Sat, 20 May 2023 00:45:47 +0000 (17:45 -0700)]
accel/tcg: Remove cpu_atomic_{ld,st}o_*_mmu

Atomic load/store of 128-byte quantities is now handled
by cpu_{ld,st}16_mmu.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>