Alex Deucher [Tue, 3 Jan 2012 14:48:38 +0000 (09:48 -0500)]
drm/radeon/kms: disable writeback on pre-R300 asics
We often end up missing fences on older asics with
writeback enabled which leads to delays in the userspace
accel code, so just disable it by default on those asics.
Reported-by: Helge Deller <deller@gmx.de> Reported-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
Rob Clark [Wed, 14 Dec 2011 02:19:36 +0000 (20:19 -0600)]
drm: add support for private planes
In cases where the scanout hw is sufficiently similar between "overlay"
and traditional crtc layers, it might be convenient to allow the driver
to create internal drm_plane helper objects used by the drm_crtc
implementation, rather than duplicate code between the plane and crtc.
A private plane is not exposed to userspace.
Signed-off-by: Rob Clark <rob@ti.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Daniel Vetter [Wed, 14 Dec 2011 12:56:59 +0000 (13:56 +0100)]
drm/i915: don't bail out of intel_wait_ring_buffer too early
In the pre-gem days with non-existing hangcheck and gpu reset code,
this timeout of 3 seconds was pretty important to avoid stuck
processes.
But now we have the hangcheck code in gem that goes to great length
to ensure that the gpu is really dead before declaring it wedged.
So there's no need for this timeout anymore. Actually it's even harmful
because we can bail out too early (e.g. with xscreensaver slip)
when running giant batchbuffers. And our code isn't robust enough
to properly unroll any state-changes, we pretty much rely on the gpu
reset code cleaning up the mess (like cache tracking, fencing state,
active list/request tracking, ...).
With this change intel_begin_ring can only fail when the gpu is
wedged, and it will return -EAGAIN (like wait_request in case the
gpu reset is still outstanding).
v2: Chris Wilson noted that on resume timers aren't running and hence
we won't ever get kicked out of this loop by the hangcheck code. Use
an insanely large timeout instead for the HAS_GEM case to prevent
resume bugs from totally hanging the machine.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
Daniel Vetter [Wed, 14 Dec 2011 12:56:58 +0000 (13:56 +0100)]
drm/i915: kicking rings stuck on semaphores considered harmful
If our semaphore logic gets confused and we have a ring stuck waiting
for one, there's a decent chance it'll just execute garbage when being
kicked. Also, kicking the ring obscures the place where the error
first occured, making error_state decoding much harder.
So drop this an let gpu reset handle this mess in a clean fashion.
In contrast, kicking rings stuck on MI_WAIT is rather harmless, at
worst there'll be a bit of screen-flickering. There's also old
broken userspace out there which needs this as a work-around.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@hchris-wilson.co.uk> Reviewed-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Keith Packard <keithp@keithp.com>
Eric Anholt [Tue, 3 Jan 2012 17:23:29 +0000 (09:23 -0800)]
drm/i915: Add support for resetting the SO write pointers on gen7.
These registers are automatically incremented by the hardware during
transform feedback to track where the next streamed vertex output
should go. Unlike the previous generation, which had a packet for
setting the corresponding registers to a defined value, gen7 only has
MI_LOAD_REGISTER_IMM to do so. That's a secure packet (since it loads
an arbitrary register), so we need to do it from the kernel, and it
needs to be settable atomically with the batchbuffer execution so that
two clients doing transform feedback don't stomp on each others'
state.
Instead of building a more complicated interface involcing setting the
registers to a specific value, just set them to 0 when asked and
userland can tweak its pointers accordingly.
Signed-off-by: Eric Anholt <eric@anholt.net> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Eric Anholt [Thu, 22 Dec 2011 22:55:01 +0000 (14:55 -0800)]
drm/i915: Make the fallback IRQ wait not sleep.
The waits we do here are generally so short that sleeping is a bad
idea unless we have an IRQ to wake us up. Improves regression test
performance from 18 minutes to 3.5 minutes on gen7, which is now
consistent with the previous generation.
Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Eric Anholt [Thu, 22 Dec 2011 22:55:00 +0000 (14:55 -0800)]
drm/i915: Work around gen7 BLT ring synchronization issues.
Previous to this commit, testing easily reproduced a failure where the
seqno would apparently arrive after the IRQ associated with it, with test programs as simple as:
for (;;) {
glCopyPixels(0, 0, 1, 1);
glFinish();
}
Various workarounds we've seen for previous generations didn't work to
fix this issue, so until new information comes in, replace the IRQ
waits on the BLT ring with polling.
Signed-off-by: Eric Anholt <eric@anholt.net> Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Acked-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Jesse Barnes [Tue, 3 Jan 2012 16:05:39 +0000 (08:05 -0800)]
drm/i915: add color key support v4
Add new ioctls for getting and setting the current destination color
key. This allows for simple overlay display control by matching a color
key value in the primary plane before blending the overlay on top.
v2: remove unnecessary mutex acquire/release around reg accesses
v3: add support for full color key management
v4: fix copy & paste bug in snb_get_colorkey
don't bother checking min/max values against docs as the docs are likely
wrong (how could we handle 10bpc surface formats?)
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Jesse Barnes [Tue, 13 Dec 2011 21:19:39 +0000 (13:19 -0800)]
drm/i915: track sprite coverage and disable primary plane if possible
To save power when the sprite is full screen, we can disable the primary
plane on the same pipe. Track the sprite status and enable/disable the
primary opportunistically.
Jesse Barnes [Tue, 13 Dec 2011 21:19:38 +0000 (13:19 -0800)]
drm/i915: add SNB and IVB video sprite support v6
The video sprites support various video surface formats natively and can
handle scaling as well. So add support for them using the new DRM core
sprite support functions.
v2: use drm specific fourcc header and defines
v3: address Daniel's comments:
- don't take struct mutex around register access (only needed for
regs in the GT power well)
- don't hold struct mutex across vblank waits
- fix up update_plane API (pass obj instead of GTT offset)
- add interlaced defines for sprite regs
- drop unnecessary 'reg' variables
- comment double buffered reg flushing
Also fix w/h confusion when writing the scaling reg.
v4: more fixes, address more comments from Daniel, and include Hai's fix
- prevent divide by zero in scaling calculation (Hai Lan)
- update to Ville's new DRM_FORMAT_* types
- fix sprite watermark handling (calc based on CRTC size, separate
from normal display wm)
- remove private refcounts now that the fb cleanups handles things
v5: add linear surface support
v6: remove color key clearing & setting from update_plane
For this version, I tested DPMS since it came up in the last review;
DPMS off/on works ok when a video player is working under X, but for
power saving we'll probably want to do something smarter. I'll leave
that for a separate patch on top. Likewise with the refcounting/fb
layer handling, which are really separate cleanups.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Keith Packard [Fri, 9 Dec 2011 19:33:00 +0000 (11:33 -0800)]
drm/i915: Clean up multi-threaded forcewake patch
We learned that the ECOBUS register was inside the GT power well, and
so *did* need force wake to be read, so it gets removed from the list
of 'doesn't need force wake' registers.
That means the code reading ECOBUS after forcing the mt_force_wake
function to be called needs to use I915_READ_NOTRACE; it doesn't need
to do more force wake fun as it's already done it manually.
This also adds a comment explaining why the MT forcewake testing code
only needs to call mt_forcewake_get/put and not disable RC6 manually
-- the ECOBUS read will return 0 if the device is in RC6 and isn't
using MT forcewake, causing the test to work correctly.
Signed-off-by: Keith Packard <keithp@keithp.com> Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Ben Widawsky [Tue, 13 Dec 2011 03:34:16 +0000 (19:34 -0800)]
drm/i915: drpc debugfs update for gen6
Many of the old fields from Ironlake have gone away. Strip all those
fields, and try to update to fields people care about. RC information
isn't exactly ideal anymore. All we can guarantee when we read the
register is that we're not using forcewake, ie. the software isn't
forcing the hardware to stay awake. The downside is that in doing this
we may wait a while and that causes an unnaturally idle state on the
GPU.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=42578 Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
Ben Widawsky [Tue, 13 Dec 2011 03:21:58 +0000 (19:21 -0800)]
drm/i915: Force sync command ordering (Gen6+)
The docs say this is required for Gen7, and since the bit was added for
Gen6, we are also setting it there pit pf paranoia. Particularly as
Chris points out, if PIPE_CONTROL counts as a 3d state packet.
This was found through doc inspection by Ken and applies to Gen6+;
Reported-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Keith Packard <keithp@keithp.com>
Ben Widawsky [Tue, 13 Dec 2011 03:21:57 +0000 (19:21 -0800)]
drm/i915: relative_constants_mode race fix
dev_priv keeps track of the current addressing mode that gets set at
execbuffer time. Unfortunately the existing code was doing this before
acquiring struct_mutex which leaves a race with another thread also
doing an execbuffer. If that wasn't bad enough, relocate_slow drops
struct_mutex which opens a much more likely error where another thread
comes in and modifies the state while relocate_slow is being slow.
The solution here is to just defer setting this state until we
absolutely need it, and we know we'll have struct_mutex for the
remainder of our code path.
v2: Keith noticed a bug in the original patch.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
Dave Airlie [Tue, 3 Jan 2012 09:43:28 +0000 (09:43 +0000)]
Merge branch 'drm-radeon-testing' of ../drm-radeon-next into drm-core-next
This merges the evergreen HDMI audio support.
* 'drm-radeon-testing' of ../drm-radeon-next:
drm/radeon/kms: define TMDS/LVTM HDMI enabling bits
drm/radeon/kms: workaround invalid AVI infoframe checksum issue
drm/radeon/kms: setup HDMI mode on Evergreen encoders
drm/radeon/kms: support for audio on Evergreen
drm/radeon/kms: minor HDMI audio cleanups
drm/radeon/kms: do not force DVI mode on DCE4 if audio is on
ridge
Rafał Miłecki [Fri, 23 Dec 2011 19:32:18 +0000 (20:32 +0100)]
drm/radeon/kms: workaround invalid AVI infoframe checksum issue
This change was verified to fix both issues with no video I've
investigated. I've also checked checksum calculation with fglrx on:
RV620, HD54xx, HD5450, HD6310, HD6320.
Cc: stable@vger.kernel.org Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 3 Jan 2012 09:34:43 +0000 (09:34 +0000)]
Merge branch 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux into drm-core-next
* 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux:
drm/i915: check ACTHD of all rings
drm/i915: DisplayPort hot remove notification to audio driver
drm/i915: HDMI hot remove notification to audio driver
drm/i915: dont trigger hotplug events on unchanged ELD
drm/i915: rename audio ELD registers
drm/i915: fix ELD writing for SandyBridge
Alan Cox [Thu, 29 Dec 2011 14:38:07 +0000 (14:38 +0000)]
gma500: remove no_fb bits
This doesn't work and isn't of any use. It was inherited from the older
driver code and can go away. Kill it off before it becomes part of mainstream
as we don't want to support it in future.
Signed-off-by: Alan Cox <alan@linux.intel.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Dave Airlie [Tue, 3 Jan 2012 09:25:18 +0000 (09:25 +0000)]
Merge branch 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung into drm-core-next
these patch sets include the following features:
- add Samsung SoC Exynos based HDMI support.
- add pm feature for fimd driver.
- add multi buffer plane pixel formats to drm/drm_fourcc.h.
multi buffer plane pixel format has seperated memory spaces for each
plane. for exampme, NV12M has Y plane and CbCr plane and these are in
non-continuous memory region. compared with NV12, NV12M's memory shape
is like following.
NV12 : ______(Y)(CbCr)_______
NV12M : __(Y)_ ..... _(CbCr)__
- bug fix to vblank.
- code clean to exynos gem framework.
* 'exynos-drm-next' of git://git.infradead.org/users/kmpark/linux-samsung:
drm/exynos: added hdmi display support
drm/exynos: added mutex lock and code clean.
drm/exynos: extend vblank off delay time.
drm/exynos: change driver name.
drm/exynos: Support multi buffers
drm: Add multi buffer plane pixel formats
drm/exynos: added pm support.
drm/exynos: remove buffer creation of fbdev from drm framebuffer creation
drm/exynos: Split creation of gem object and gem handle
drm/exynos: Fix a fake mmap offset creation
drm/exynos: gem code cleanup
Seung-Woo Kim [Wed, 21 Dec 2011 08:39:39 +0000 (17:39 +0900)]
drm/exynos: added hdmi display support
This patch is hdmi display support for exynos drm driver.
There is already v4l2 based exynos hdmi driver in drivers/media/video/s5p-tv
and some low level code is already in s5p-tv and even headers for register
define are almost same. but in this patch, we decide not to consider separated
common code with s5p-tv.
Exynos HDMI is composed of 5 blocks, mixer, vp, hdmi, hdmiphy and ddc.
1. mixer. The piece of hardware responsible for mixing and blending multiple
data inputs before passing it to an output device. The mixer is capable of
handling up to three image layers. One is the output of VP. Other two are
images in RGB format. The blending factor, and layers' priority are controlled
by mixer's registers. The output is passed to HDMI.
2. vp (video processor). It is used for processing of NV12/NV21 data. An image
stored in RAM is accessed by DMA. The output in YCbCr444 format is send to
mixer.
3. hdmi. The piece of HW responsible for generation of HDMI packets. It takes
pixel data from mixer and transforms it into data frames. The output is send
to HDMIPHY interface.
4. hdmiphy. Physical interface for HDMI. Its duties are sending HDMI packets to
HDMI connector. Basically, it contains a PLL that produces source clock for
mixer, vp and hdmi.
5. ddc (display data channel). It is dedicated i2c channel to exchange display
information as edid with display monitor.
With plane support, exynos hdmi driver fully supports two mixer layes and vp
layer. Also vp layer supports multi buffer plane pixel formats having non
contigus memory spaces.
In exynos drm driver, common drm_hdmi driver to interface with drm framework
has opertion pointers for mixer and hdmi. this drm_hdmi driver is registered as
sub driver of exynos_drm. hdmi has hdmiphy and ddc i2c clients and controls
them. mixer controls all overlay layers in both mixer and vp.
Vblank interrupts for hdmi are handled by mixer internally because drm
framework cannot support multiple irq id. And pipe number is used to check
which display device irq happens.
History
v2: this version
- drm plane feature support to handle overlay layers.
- multi buffer plane pixel format support for vp layer.
- vp layer support
RFCv1: original
- at https://lkml.org/lkml/2011/11/4/164
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Inki Dae [Fri, 16 Dec 2011 12:31:12 +0000 (21:31 +0900)]
drm/exynos: extend vblank off delay time.
some platform could be entering to sleep after short time once lcd panel off
but before that vblank could be off by vblank off delay feature. at that time,
vblank doesn't have the pair between vblank_get/put. so this path makes vblank
off delay to have enough.
Seung-Woo Kim [Thu, 15 Dec 2011 05:36:22 +0000 (14:36 +0900)]
drm/exynos: Support multi buffers
These formats(NV12M, NV12MT and YUV420M) have non contiguous multi
planes, so each plane uses different buffer. The exynos drm should
support multi buffer for them.
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Seung-Woo Kim [Thu, 15 Dec 2011 06:40:55 +0000 (15:40 +0900)]
drm: Add multi buffer plane pixel formats
Multi buffer plane pixel format has seperated memory spaces for each
plane. For example, NV12M has Y plane and CbCr plane and these are in
non contiguous memory region. Compared with NV12, NV12M's memory shape
is like following.
NV12 : ______(Y)(CbCr)_______
NV12M : __(Y)_ ..... _(CbCr)__
Signed-off-by: Seung-Woo Kim <sw0312.kim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Joonyoung Shim [Tue, 13 Dec 2011 05:46:57 +0000 (14:46 +0900)]
drm/exynos: remove buffer creation of fbdev from drm framebuffer creation
The fbdev fb and the user fb is created from same function -
exynos_drm_fb_create, but this function creates not only drm framebuffer
but buffer of fbdev. Remove it because it complicates codes and use
exynos_drm_gem_create() than exynos_drm_buf_create() to create buffer of
fbdev, it give better consistency of codes and more clear
implementation.
Daniel Vetter [Sun, 30 Oct 2011 11:44:56 +0000 (12:44 +0100)]
drm/i810: don't acces hw regs in lastclose
i810 uses a userspace provided mmio map using the drm core map
infrastructure. By the time we reach lastclose, this is all gone
and our mmio_map pointer points at freed memory. Depending upon
luck that still works, most often it just oopses.
Aside: drm maps aren't refcounted, so userspace can essentially oops
the kernel any time it wants to. Who cares.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Tue, 25 Oct 2011 21:51:24 +0000 (23:51 +0200)]
drm/i810: cleanup reclaim_buffers
My dear old i815 always hits the deadlocked on reclaim_buffers
warning. Switch over to the idlelock duct-tape on hope that
works better. I've fired up my i815 and now closing glxgears doesn't
take 5 seconds anymore. \o/
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Dave Airlie [Thu, 22 Dec 2011 11:02:06 +0000 (11:02 +0000)]
Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-core-next
* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (102 commits)
drm/nouveau/ttm: fix crash as a result of a recent ttm change
drm/nouveau: Fix notifier blocks over the 4GB mark.
drm/nouveau: Fix pushbufs over the 4GB mark.
drm/nvc0/pm: initial engine reclocking
drm/nouveau: move hpd enable/disable to common code
drm/nv40/disp: implement support for hotplug irq
drm/nouveau/gpio: reimplement as nouveau_gpio.c, fixing a number of issues
drm/nouveau: just pass gpio line to pwm_*, not entire gpio struct
drm/nouveau/hwsq: remove some magic, give proper opcode names
drm/nv50/pm: introduce hwsq-based memory reclocking
drm/nv04/disp: handle dual-link spwg panels without needing quirks
drm/nouveau/dp: remove broken display depth function, use the improved one
drm/nouveau/mxm: implement ROM shadow method
drm/nouveau/mxm: implement _DSM shadow method
drm/nouveau/mxm: implement wmi shadow method
drm/nouveau/mxm: initial implementation of dcb sanitisation
drm/nouveau/disp: parse connector info directly in nouveau_connector.c
drm/nouveau/i2c: handle bit-banging ourselves
drm/nouveau/i2c: fix debug message
drm/nouveau/i2c: tidy up bit-bang helpers, also fixing nv50 setsda bug
...
Ben Skeggs [Thu, 22 Dec 2011 05:20:21 +0000 (15:20 +1000)]
drm/nouveau/ttm: fix crash as a result of a recent ttm change
"drm/ttm: callback move_notify any time bo placement change v4" failed to
avoid a NULL pointer dereference in nouveau caused by move_notify being
expected to handle that case now.
Daniel Vetter [Wed, 26 Oct 2011 20:21:13 +0000 (22:21 +0200)]
drm/via: use drm_mm instead of drm_sman
To make the transition in a piece-wise and bisectable way possible,
I've hijacked the ->owner_list from drm_sman. While transitioning, the
list_add was done by the driver, while the list_del was still done by
the dying sman code.
Now that we are in full control of ->owner_list, do the list_del
ourselves.
v2: Better explain the list_del trickery as suggested by Chris Wilson.
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Daniel Vetter [Wed, 26 Oct 2011 20:28:07 +0000 (22:28 +0200)]
drm/sman: rip out owner tracking
In contrast to kms drivers, sis/via _always_ associated a buffer with
a drm fd. So by the time we reach lastclose, all open drm fds are gone
and with them their associated objects.
So when sis/via call drm_sman_cleanup in their lastclose funcs, that
will free 0 objects.
The owner tracking now serves no purpose at all, hence rip it ou. We
can't kill the corresponding fields in struct drm_memblock_item yet
because we hijack these in the new driver private owner tracking. But
now that drm_sman.c doesn't touch ->owner_list anymore, we need to
kill the list_move hack and properly add the item to the file_priv
list.
Also leave the list_del(&obj->owner_list) in drm_sman_free for the
moment, it will move to the drivers when sman disappears completely.
v2: Remove the redundant INIT_LIST_HEAD as noted by Chris Wilson
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Ben Skeggs [Mon, 21 Nov 2011 06:41:48 +0000 (16:41 +1000)]
drm/nouveau/gpio: reimplement as nouveau_gpio.c, fixing a number of issues
- moves out of nouveau_bios.c and demagics the logical state definitions
- simplifies chipset-specific driver interface
- makes most of gpio irq handling common, will use for nv4x hpd later
- api extended to allow both direct gpio access, and access using the
logical function states
- api extended to allow for future use of gpio extender chips
- pre-nv50 was handled very badly, the main issue being that all GPIOs
were being treated as output-only.
- fixes nvd0 so gpio changes actually stick, magic reg needs bashing
More work needs to be done on supporting the different memory types.
v2 (Ben Skeggs):
- fixed up conflicts from not having pausing patch first
- restructured code somewhat to fit with how all the other code works
- fixed bug where incorrect mpll_ctrl could get set sometimes
- removed stuff that's cargo-culted from the binary driver
- merged nv92+ display disable into hwsq
- fixed incorrect opcode 0x5f magic at end of ucode
Signed-off-by: Martin Peres <martin.peres@ensi-bourges.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs [Wed, 12 Oct 2011 06:36:42 +0000 (16:36 +1000)]
drm/nouveau/mxm: initial implementation of dcb sanitisation
The DCB table provided by the VBIOS on most MXM chips has a number of
entries which either need to be disabled, or modified according to the
MXM-SIS Output Device Descriptors.
The x86 vbios code usually takes care of this for us, however, with the
large number of laptops now with switchable graphics or optimus, a lot
of the time nouveau is responsible for POSTing the card instead - leaving
some fun situations like, plugging in a monitor and having nouveau decide
3 connectors actually just got plugged in..
Ben Skeggs [Fri, 18 Nov 2011 00:23:59 +0000 (10:23 +1000)]
drm/nouveau/disp: parse connector info directly in nouveau_connector.c
Another case where we parsed vbios data to some structs, then again use
that info once to construct another set of data. Skip the intermediate
step.
This is also slightly improved in that we can now use DCB 3.x connector
table info, which will allow NV4x to gain hotplug support, and to make
quirks for SPWG LVDS panels unnecessary.
Ben Skeggs [Wed, 21 Dec 2011 08:09:12 +0000 (18:09 +1000)]
drm/nouveau/i2c: handle bit-banging ourselves
i2c-algo-bit doesn't actually work very well on one card I have access to
(NVS 300), random single-bit errors occur most of the time - what we're
doing now is closer to what xf86i2c.c does.
The original plan was to figure out why i2c-algo-bit fails on the NVS 300,
and fix it. However, while investigating I discovered i2c-algo-bit calls
cond_resched(), which makes it a bad idea for us to be using as we execute
VBIOS scripts from a tasklet, and there may very well be i2c transfers as
a result.
So, since I already wrote this code in userspace to track down the NVS 300
bug, and it's not really much code - lets use it.
Ben Skeggs [Thu, 17 Nov 2011 03:56:14 +0000 (13:56 +1000)]
drm/nouveau/i2c: tidy up bit-bang helpers, also fixing nv50 setsda bug
Was using nv_mask, which is bad. Reading the reg senses the current line
states, which aren't necessarily the states we're trying to drive the
lines to.
Fixed to store SCL driver state just as we already do for SDA.
Ben Skeggs [Fri, 11 Nov 2011 00:22:19 +0000 (10:22 +1000)]
drm/nouveau/i2c: do parsing of i2c-related vbios info in nouveau_i2c.c
Not much point parsing the vbios data into a struct which is only used once
to parse the data into another struct, go directly from vbios to
nouveau_i2c_chan.
Ben Skeggs [Thu, 10 Nov 2011 05:42:55 +0000 (15:42 +1000)]
drm/nouveau/bios: start refactoring dcb routines
This primary reason for this was mostly to avoid duplication of some of
this stuff by the MXM-SIS parser. However, some other cleanups will also
follow this as a result.