Colin Ian King [Fri, 15 Dec 2017 10:53:43 +0000 (10:53 +0000)]
drm/amd/display: remove redundant null check of array 'data'
The null check on aconnector->base.edid_blob_ptr->data is redundant
since data is an array and can never be null. Remove it.
Detected by CoverityScan, CID#1460369 ("Array compared against 0")
Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
With introduction of amdgpu_gpu_recovery we don't need any more
to rely on amdgpu_lockup_timeout == 0 for disabling GPU reset.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add new parameter to control GPU recovery procedure.
v2:
Add auto logic where reset is disabled for bare metal and enabled
for SR-IOV.
Allow forced reset from debugfs.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger He [Fri, 8 Dec 2017 12:19:32 +0000 (20:19 +0800)]
drm/ttm: use an ttm operation ctx for ttm_bo_move_xxx
include ttm_bo_move_memcpy and ttm_bo_move_ttm
Signed-off-by: Roger He <Hongbo.He@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger He [Wed, 6 Dec 2017 06:16:09 +0000 (14:16 +0800)]
drm/ttm: enable eviction for Per-VM-BO
allow eviction of BOs reserved by the caller when they are
not part of the current working set.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger He [Fri, 8 Dec 2017 05:31:52 +0000 (13:31 +0800)]
drm/amdgpu: set allow_reserved_eviction and resv when bo allocation and cs
enable eviction of other per VM BOs during allocation and allows
reaping of deleted BOs during CS.
Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger He [Fri, 8 Dec 2017 03:36:46 +0000 (11:36 +0800)]
drm/ttm: add allow_reserved_eviction and resv into ttm_operation_ctx
allow_reserved_eviction: Allow eviction of reserved BOs
resv: Reservation object to allow reserved evictions with
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Roger He <Hongbo.He@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Wed, 13 Dec 2017 06:22:54 +0000 (14:22 +0800)]
drm/amdgpu: add enumerate for PDB/PTB v3
v2:
remove SUBPTB member
v3:
remove last_level, use AMDGPU_VM_PTB directly instead.
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Tue, 28 Nov 2017 15:10:48 +0000 (10:10 -0500)]
drm/amd/display: dal 3.1.25
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 23 Nov 2017 15:37:29 +0000 (10:37 -0500)]
drm/amd/display: Add TODO item to remove vector.c
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 23 Nov 2017 15:31:50 +0000 (10:31 -0500)]
drm/amd/display: Remove grph_object_id.c and move function to bios_parser
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 23 Nov 2017 02:05:55 +0000 (21:05 -0500)]
drm/amd/display: Remove redundant NULL check in DCE11 HWSS
We already check this a couple lines earlier.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Jordan Lazare <Jordan.Lazare@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Tue, 28 Nov 2017 17:05:08 +0000 (12:05 -0500)]
drm/amd/display: remove format_control from set_cursor_attributes
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 24 Nov 2017 21:31:03 +0000 (16:31 -0500)]
drm/amd/display: Move wait for hpd ready out from edp power control.
It may take over 200ms for wait hpd ready. To optimize the resume time,
we can power on eDP in init_hw, wait for hpd ready when doing link
training.
also create separate eDP enable function to make sure eDP is powered up
before doing and DPCD access, as HPD low will result in DPDC transaction
failure.
After optimization,
setpowerstate 145ms -> 9.8ms,
DPMS 387ms -> 18.9ms
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Yang [Fri, 10 Nov 2017 15:44:24 +0000 (10:44 -0500)]
drm/amd/display: fix missing pixel clock adjustment for dongle
Signed-off-by: Eric Yang <Eric.Yang2@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Andrew Jiang <Andrew.Jiang@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Fri, 24 Nov 2017 22:51:34 +0000 (17:51 -0500)]
drm/amd/display: Move OPP mpc tree initialization to hw_init
Move OPP initialization of mpc tree parameters to hw_init function.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Mon, 27 Nov 2017 15:55:52 +0000 (10:55 -0500)]
drm/amd/display: use REG_UPDATE for MPC mux
Use REG_UPDATE instead of REG_SET for programming MPC out mux.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Vitaly Prosyak [Fri, 24 Nov 2017 21:52:33 +0000 (15:52 -0600)]
drm/amd/display: Correct fixed point calculation.
When convert from fixed31_32 to other fixed point
format use math operation round instead of floor.
Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Wed, 22 Nov 2017 21:48:35 +0000 (16:48 -0500)]
drm/amd/display: OPTC cleanup/implementation
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Thu, 23 Nov 2017 16:32:18 +0000 (11:32 -0500)]
drm/amd/display: dpp clean up
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Tue, 21 Nov 2017 18:19:32 +0000 (13:19 -0500)]
drm/amd/display: Print DC_VER at DC init
This has proven helpful on other OSes to give a quick state of the
DC driver when a bug is reported.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 22 Nov 2017 16:51:30 +0000 (11:51 -0500)]
drm/amd/display: really fix time out in init sequence
REG_UPDATE_2 return the reg value it write out through MMIO
we need to do a REG_READ to confirm the value is written out
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Nov 2017 15:28:29 +0000 (10:28 -0500)]
drm/amd/display: Add disclaimer to BW and DML code provided by HW
This code can sometimes look troubling but we trust it as it comes from
HW teams with a guarantee of correctness. Add a note to these files to
explain this.
v2: thing -> things
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 29 Nov 2017 15:16:51 +0000 (10:16 -0500)]
drm/amd/display: Use macro for isnan check
In code provided by HW teams we do a NaN check on floats
by comparing the number against itself. This confuses most
people including myself. Macro it out to make it self-explanatory.
Don't do a NaN check for int.
v2: parantheses around 'number' expression
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Wed, 22 Nov 2017 02:40:34 +0000 (21:40 -0500)]
drm/amd/display: dal 3.1.24
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Tue, 21 Nov 2017 22:51:50 +0000 (17:51 -0500)]
drm/amd/display: Set mpcc_disconnect_pending during MPC reset
This prevents an issue where the MPCC will not go to idle due to us not
waiting for it to become idle during disable plane.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrew Jiang [Tue, 21 Nov 2017 20:59:42 +0000 (15:59 -0500)]
drm/amd/display: Refine update flags usage in update_dchubp_dpp
- Only update DPP clock if it's a full update.
- Program viewport on position change. This caused SLS regressions.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 21 Nov 2017 21:12:23 +0000 (16:12 -0500)]
drm/amd/display: Cache cursor position.
When programming cursor position after front end programmed,
if position is already set previously, it doesn't make sense
to program position with all 0.
Cache position and use the parameter after front end programming.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 21 Nov 2017 20:42:17 +0000 (15:42 -0500)]
drm/amd/display: Program cursor regs after context swapped.
Cursor is abnormal after pipe_ctx is changed in context.
Cause: cursor attributes is programmed right after front end
programming, but it use old pipe_ctx to program which is not
updated yet.
Solution:
Program cursor regs after context swapped.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Tue, 21 Nov 2017 18:45:51 +0000 (13:45 -0500)]
drm/amd/display: fix recout_skip calculation when rotating 180 or 270
Fixed fliped landscape and fliped portrait hard hang.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Fri, 17 Nov 2017 22:21:26 +0000 (17:21 -0500)]
drm/amd/display: OPP DPG test pattern
Create opp_set_test_pattern function with similar interface
and implementation as timing generator test pattern.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Thu, 16 Nov 2017 20:34:50 +0000 (15:34 -0500)]
drm/amd/display: Reset MPCC muxes during init
During HW initialization, instead of assuming or
detecting the existing MPCC mux configuration and
then removing existing planes, reset all the MPCC
muxes.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yue Hin Lau [Tue, 14 Nov 2017 17:13:27 +0000 (12:13 -0500)]
drm/amd/display: CNVC pseudocode review follow up
Signed-off-by: Yue Hin Lau <Yuehin.Lau@amd.com> Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Fri, 17 Nov 2017 15:44:15 +0000 (10:44 -0500)]
drm/amd/display: Disable plane right after disconnected
HDR display playing video underflow is observed when switching
to full screen due to program a lower watermark right after unlock otg.
Instead of disable plane in next flip coming, if there is a
plane disconnected, after otg unlock wait for mpcc idle and disable
the plane, then program watermark. So there is enough warter mark to make
sure current frame data pass through.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Fri, 17 Nov 2017 04:37:10 +0000 (23:37 -0500)]
drm/amd/display: dal 3.1.23
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Thu, 16 Nov 2017 00:27:37 +0000 (19:27 -0500)]
drm/amd/display: Clean up os_types.h a bit
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Regression:
drm/amd/display: Remove extra arr_points element
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 16 Nov 2017 23:03:52 +0000 (18:03 -0500)]
drm/amd/display: dal 3.1.22
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrew Jiang [Thu, 16 Nov 2017 22:08:44 +0000 (17:08 -0500)]
drm/amd/display: Add dcc_change surface update flag
Program the DCC registers when dcc_change is true.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Wed, 15 Nov 2017 21:21:34 +0000 (16:21 -0500)]
drm/amd/display: Implement work around for optc underflow.
Work around for a hw bug causing optc underflow if blank data
double buffer disable and remove mpcc.
Checking optc status after otg unlock, after wait mpcc idle
check status again, if optc underflow just happens after wait
mpcc idle, clear underflow status and enable blank data double
buffer.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Andrew Jiang [Thu, 16 Nov 2017 20:51:21 +0000 (15:51 -0500)]
drm/amd/display: Change optimized_required logic
Rather than setting it every time there's a full update with surface
count > 0, set it when we need to do plane_atomic_disconnect. Also make
sure that we unset the flag in plane_atomic_disable, so that in the
event we run through a sequence where we do disconnect followed by an
immediate disable, we do not do unnecessarily request a passive flip to
do the optimization.
Signed-off-by: Andrew Jiang <Andrew.Jiang@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Wed, 22 Nov 2017 20:59:39 +0000 (15:59 -0500)]
drm/amd/display: Add optimized_required flag
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Leo (Sunpeng) Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Wed, 15 Nov 2017 21:12:19 +0000 (16:12 -0500)]
drm/amd/display: Use same wait mpcc idle function.
There is already wait mpcc idle function. It is better
to use the same function for all wait mpcc idle.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Thu, 16 Nov 2017 19:29:10 +0000 (14:29 -0500)]
drm/amd/display: MPC updates
Fix update_mpcc logic to only call assert_mpcc_idle_before_connect
if mpcc is not already being used (and required removal).
Update set_out_rate_control to include optional flow control parameter.
In init_mpcc_from_hw check for case where bot_sel is same as mpcc_id.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Yongqiang Sun [Thu, 16 Nov 2017 17:43:59 +0000 (12:43 -0500)]
drm/amd/display: Fixed read wrong reg to get bot_sel.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Sat, 11 Nov 2017 01:17:03 +0000 (20:17 -0500)]
drm/amd/display: Fix potential mem leak in DC construct
Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dc_ctx'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dc_vbios'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dcn_ip'
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc.c:506 construct() warn:
possible memory leak of 'dcn_soc'
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 10 Nov 2017 17:08:13 +0000 (12:08 -0500)]
drm/amd/display: Remove redundant checks in set_default_colors
pipe_ctx->stream and pipe_ctx->plane_state are never NULL
Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2111
set_default_colors() error: we previously assumed 'pipe_ctx->stream'
could be null (see line 2101)
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Fri, 10 Nov 2017 17:00:41 +0000 (12:00 -0500)]
drm/amd/display: Remove plane_res.mi check in dce110_apply_ctx_for_surface
plane_res.mi (memory interface) can never be NULL for DCE110
Found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/dce110/dce110_hw_sequencer.c:2881
dce110_apply_ctx_for_surface() error: we previously assumed
'pipe_ctx->plane_res.mi' could be null (see line 2873)
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Harry Wentland [Sat, 11 Nov 2017 01:01:38 +0000 (20:01 -0500)]
drm/amd/display: Remove PSR functions in Linux
NULL check issue found by smatch:
drivers/gpu/drm/amd/amdgpu/../display/dc/core/dc_link.c:1976
dc_link_setup_psr() warn: variable dereferenced before check 'link' (see
line 1970)
We don't use these functions so might as well remove them.
Signed-off-by: Harry Wentland <harry.wentland@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Eric Bernstein [Mon, 6 Nov 2017 21:38:55 +0000 (16:38 -0500)]
drm/amd/display: Integrating MPC pseudocode
Integrating MPC pseudocode to support new blending cases
with secondary MPCC list.
This includes a design change to MPC data structures and
interfaces.
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tony Cheng [Thu, 16 Nov 2017 04:58:20 +0000 (23:58 -0500)]
drm/amd/display: dal 3.1.21
Signed-off-by: Tony Cheng <tony.cheng@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Charlene Liu [Wed, 15 Nov 2017 23:55:57 +0000 (18:55 -0500)]
drm/amd/display: try to find matching audio inst for enc inst first
[Description]
in eDP+ HDMI/DP clone or extended configuration, audio inst changed from inst 1 to inst0.
No failure related this though, just playback device endpoint inst changed.
Also remove one addition register read.
Signed-off-by: Charlene Liu <charlene.liu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Before power gate plane, mpcc idle wait is processed,
no need to wait another time.
Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Roger He [Thu, 7 Dec 2017 04:51:19 +0000 (12:51 +0800)]
drm/ttm: init locked again to prevent incorrect unlock
Signed-off-by: Roger He <Hongbo.He@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Rex Zhu [Tue, 12 Dec 2017 07:06:10 +0000 (15:06 +0800)]
drm/amd/pp: implement dpm_get_sclk/mclk for RV
RV implementation was missing these callbacks. Used
to fetch the clock values for other components.
Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chunming Zhou [Mon, 11 Dec 2017 07:55:03 +0000 (15:55 +0800)]
drm/amdgpu: fix huge page setting for ATS case
Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 12 Dec 2017 20:26:10 +0000 (15:26 -0500)]
drm/amdgpu: drop amdgpu_atombios_scratch_regs_save/restore
No longer used.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 12 Dec 2017 20:22:56 +0000 (15:22 -0500)]
drm/amdgpu: drop scratch regs save and restore from GPU reset handling
The expectation is that the base driver doesn't mess with these.
Some components interact with these directly so let the components
handle these directly.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Tue, 12 Dec 2017 20:20:22 +0000 (15:20 -0500)]
drm/amdgpu: drop scratch regs save and restore from S3/S4 handling
The expectation is that the base driver doesn't mess with these.
Some components interact with these directly so let the components
handle these directly.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Frank Min [Mon, 6 Nov 2017 07:34:55 +0000 (15:34 +0800)]
drm/amdgpu: correct vce fw data and stack size
this fix the VCE world switch hang issue
Signed-off-by: Frank Min <Frank.Min@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Thu, 23 Nov 2017 10:38:59 +0000 (18:38 +0800)]
drm/amdgpu: fix MAP_QUEUES paramter
Should be 0.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 4 Dec 2017 12:46:17 +0000 (20:46 +0800)]
drm/amdgpu: no need with INT for fence polling
We are polling so no need for INT.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Wed, 22 Nov 2017 11:21:43 +0000 (19:21 +0800)]
drm/amdgpu: no need to evict VRAM in device_fini
this VRAM evict is not needed and also cost 2seconds
to finish because the IRQ is software side disabled
before it.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 1 Dec 2017 10:23:56 +0000 (18:23 +0800)]
drm/ttm: max_cpages is in unit of native page
fix calculation.
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Fri, 1 Dec 2017 10:21:34 +0000 (18:21 +0800)]
drm/ttm: fix incorrect calculate on shrink_pages
shrink_pages is in unit of Order after ttm_page_pool_free,
but it is used by nr_free in next round so need change
it into native page unit
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Roger He <Hongbo.He@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Wed, 29 Nov 2017 12:27:26 +0000 (13:27 +0100)]
drm/amdgpu: allow get_vm_pde to change flags as well
And also provide the level for which we need a PDE.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 30 Nov 2017 18:08:05 +0000 (19:08 +0100)]
drm/amdgpu: batch PDE updates again
Now instead of one submission for each PDE batch them together over all
PDs who need an update.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 30 Nov 2017 14:41:28 +0000 (15:41 +0100)]
drm/amdgpu: remove keeping the addr of the VM PDs
No more double house keeping.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Thu, 30 Nov 2017 14:28:03 +0000 (15:28 +0100)]
drm/amdgpu: remove last_entry_used from the VM code
Not needed any more.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Christian König [Fri, 1 Dec 2017 12:28:46 +0000 (13:28 +0100)]
drm/amdgpu: avoid the modulo in amdgpu_vm_get_entry
We can do this with a simple mask as well.
Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Chunming Zhou <david1.zhou@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Pixel Ding [Mon, 11 Dec 2017 08:48:33 +0000 (16:48 +0800)]
drm/amdgpu: use polling mem to set SDMA3 wptr for VF
On Tonga VF, there're 2 sources updating wptr registers for
sdma3: 1) polling mem and 2) doorbell. When doorbell and polling
mem are both enabled on sdma3, there will be collision hit in
occasion between those two sources when ucode and h/w are doing
the updating on wptr register in parallel. Issue doesn't happen
on CP GFX/Compute since CP drops all doorbell writes when VF is
inactive. So enable polling mem and don't use doorbell for SDMA3.
Signed-off-by: Pixel Ding <Pixel.Ding@amd.com> Reviewed-by: Monk Liu <monk.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
projects / mirror_ubuntu-eoan-kernel.git / log