drm/amd/display: Fix CSC remap matrix not being applied on dcn30
[Why]
DCN3 has two gamut remap matrices. When using CSC adjustment the CM
remap is set to bypass and MPCC remap is used. However to bypass CM
some state in the context is modified and not restored correctly
resulting in subsequent calls to disable MPCC remap as well.
[How]
Fix logic for save/restore of remap enable flag when programming MPCC
remap matrix.
Signed-off-by: Aric Cyr <aric.cyr@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Use VUPDATE_NO_LOCK instead of VUPDATE for dcn30
[Why]
Soft hangs occur when FreeSync is engaged since we utilize VUPDATE
(which doesn't fire when holding the pipe lock) to send back vblank
events when FreeSync is active.
[How]
The alternative (working) interrupt source for this mechanism is
VUPDATE_NO_LOCK. We already use this all other DCN revisions so align
dcn30 with those as well.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Marek Olšák [Mon, 6 Jul 2020 22:23:17 +0000 (18:23 -0400)]
drm/amdgpu: don't do soft recovery if gpu_recovery=0
It's impossible to debug shader hangs with soft recovery.
Signed-off-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tom Rix [Mon, 6 Jul 2020 12:28:57 +0000 (05:28 -0700)]
drm/radeon: fix double free
clang static analysis flags this error
drivers/gpu/drm/radeon/ci_dpm.c:5652:9: warning: Use of memory after it is freed [unix.Malloc]
kfree(rdev->pm.dpm.ps[i].ps_priv);
^~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/gpu/drm/radeon/ci_dpm.c:5654:2: warning: Attempt to free released memory [unix.Malloc]
kfree(rdev->pm.dpm.ps);
^~~~~~~~~~~~~~~~~~~~~~
problem is reported in ci_dpm_fini, with these code blocks.
for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
kfree(rdev->pm.dpm.ps[i].ps_priv);
}
kfree(rdev->pm.dpm.ps);
The first free happens in ci_parse_power_table where it cleans up locally
on a failure. ci_dpm_fini also does a cleanup.
ret = ci_parse_power_table(rdev);
if (ret) {
ci_dpm_fini(rdev);
return ret;
}
So remove the cleanup in ci_parse_power_table and
move the num_ps calculation to inside the loop so ci_dpm_fini
will know how many array elements to free.
Fixes: cc8dbbb4f62a ("drm/radeon: add dpm support for CI dGPUs (v2)") Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Tiezhu Yang [Thu, 2 Jul 2020 02:27:43 +0000 (10:27 +0800)]
gpu/drm: Remove debug info about CPU address
When I update the latest kernel, I see the following "____ptrval____" boot
messages.
[ 1.872600] radeon 0000:01:05.0: fence driver on ring 0 use gpu addr 0x0000000048000c00 and cpu addr 0x(____ptrval____)
[ 1.879095] radeon 0000:01:05.0: fence driver on ring 5 use gpu addr 0x0000000040056038 and cpu addr 0x(____ptrval____)
Both radeon_fence_driver_start_ring() and amdgpu_fence_driver_start_ring()
have the similar issue, there exists the following two methods to solve it:
(1) Use "%pK" instead of "%p" so that the CPU address can be printed when
the kptr_restrict sysctl is set to 1.
(2) Just completely drop the CPU address suggested by Christian, because
the CPU address was useful in the past, but isn't any more. We now have a
debugfs file to read the current fence values.
Since the CPU address is not much useful, just remove the debug info about
CPU address.
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: add register distance members into vmhub structure
This patch is to abstract register distances between two continuous
context domains and invalidation engines. In different ip headers, these
distances may be differences.
Signed-off-by: Huang Rui <ray.huang@amd.com> Tested-by: AnZhong Huang <anzhong.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
kfd_pasid.c isn't using the kfd2kgd interface any more. Remove redundant
code trying to look up a device for finding that interface.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Joshua Aberback [Fri, 26 Jun 2020 07:57:57 +0000 (03:57 -0400)]
drm/amd/display: Request PHYCLK adjustment on PHY enable/disable
[Why]
Currently we don't explicitly send a request for a minimum PHYCLK, and
we hope that the dependencies other clocks have will raise PHYCLK when
needed.
[How]
- new clk_mgr function to keep track of PHYCLK requirements
- request maximum requirement across all links
- remove PHYCLK from clock state comparator, as it doesn't come from DML
Signed-off-by: Joshua Aberback <joshua.aberback@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jaehyun Chung [Tue, 23 Jun 2020 22:30:28 +0000 (18:30 -0400)]
drm/amd/display: Send VSIF on unsupported modes on DAL
[Why]
Current DAL behaviour is to not send VSIF if mode does not support VRR
(ie. FS range is < 10Hz). However, we should still set FS Native Color
Active bit in some unsupported mode cases.
[How]
Remove check for if VRR is supported before building infopacket.
Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdgpu: use RREG32_KIQ to read register when get cg state
Use RREG32_KIQ to read gfx register when try to get gfx/sdma
clockgating state instead of RREG32, as it will result
to system hard hang when GPU is enter into GFXOFF state.
Huang Rui [Tue, 30 Jun 2020 04:32:57 +0000 (12:32 +0800)]
drm/amdgpu: add TMR destory function for psp
TMR is required to be destoried with GFX_CMD_ID_DESTROY_TMR while the
system goes to suspend. Otherwise, PSP may return the failure state
(0xFFFF007) on Gfx-2-PSP command GFX_CMD_ID_SETUP_TMR after do multiple
times suspend/resume.
Signed-off-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Wed, 1 Jul 2020 14:59:05 +0000 (15:59 +0100)]
drm/amd/display: remove redundant initialization of variable result
The variable result is being initialized with a value that is never read
and it is being updated later with a new value. The initialization is
redundant and can be removed.
Addresses-Coverity: ("Unused value") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Deucher [Thu, 25 Jun 2020 21:55:57 +0000 (17:55 -0400)]
drm/amdgpu/atomfirmware: fix vram_info fetching for renoir
Renoir uses integrated_system_info table v12. The table
has the same layout as v11 with respect to this data. Just
reuse the existing code for v12 for stable.
Fixes incorrectly reported vram info in the driver output.
Acked-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Evan Quan [Sun, 28 Jun 2020 11:12:42 +0000 (19:12 +0800)]
drm/amd/powerplay: fix compile error with ARCH=arc
Fix the compile error below:
drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c: In function 'smu_v11_0_init_microcode':
>> arch/arc/include/asm/bug.h:22:2: error: implicit declaration of function 'pr_warn'; did you mean 'pci_warn'? [-Werror=implicit-function-declaration]
22 | pr_warn("BUG: failure at %s:%d/%s()!\n", __FILE__, __LINE__, __func__); \
| ^~~~~~~
drivers/gpu/drm/amd/amdgpu/../powerplay/smu_v11_0.c:176:3: note: in expansion of macro 'BUG'
176 | BUG();
Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Only revalidate bandwidth on medium and fast updates
[Why]
Changes that are fast don't require updating DLG parameters making
this call unnecessary. Considering this is an expensive call it should
not be done on every flip.
DML touches clocks, p-state support, DLG params and a few other DC
internal flags and these aren't expected during fast. A hang has been
reported with this change when called on every flip which suggests that
modifying these fields is not recommended behavior on fast updates.
[How]
Guard the validation to only happen if update type isn't FAST.
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1191 Fixes: a24eaa5c51255b ("drm/amd/display: Revalidate bandwidth before commiting DC updates") Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Roman Li <Roman.Li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
It's otherwise properly supported, just needs exposing to userspace.
Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Pierre-Loup A. Griffais <pgriffais@valvesoftware.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Add support for GWS in Arcturus, which needs MEC2 firmware #48
or above. Fix the MEC2 version check for Vega 10 GWS support,
since Vega 10 firmware adds 0x8000 to the actual firmware
revision. We were previously declaring support where it did not
exist.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by:Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Monk Liu [Mon, 29 Jun 2020 09:32:16 +0000 (17:32 +0800)]
drm/amdgpu: make IB test synchronize with init for SRIOV(v2)
issue:
originally we kickoff IB test asynchronously with driver's
init, thus
the IB test may still running when the driver loading
done (modprobe amdgpu done).
if we shutdown VM immediately after amdgpu driver
loaded then GPU may
hang because the IB test is still running
fix:
flush the delayed_init routine at the bottom of device_init
to avoid driver loading done prior to the IB test completes
Signed-off-by: Monk Liu <Monk.Liu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amdkfd: Update hardware scheduling time quanta
Update PROCESS_QUANTUM, the time the hardware scheduler allows
processes to run before switching to other processes when it becomes
over-subscribed. Increase this to 10ms, to allow processes to better
amortize their task switch times.
Update HQD Quantum, the amount of time that an active queue stays
attached to the CP before we forcibly switch it for another active
queue for fairness.
Setting these so that HQD < PROCESS makes it easier to ensure that
we get fairness when we have multiple active queues on the device.
Otherwise we may start process-swapping before we get to all the
queues in a CP.
Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Jaehyun Chung [Thu, 18 Jun 2020 19:27:35 +0000 (15:27 -0400)]
drm/amd/display: Fix incorrect rounding for 10Hz refresh range
[Why]
In cases where refresh range is slightly below 10, FreeSync is not
active or supported. Need to round values before checking refresh range
in order to have FreeSync supported in these cases.
[How]
Remove redundant values and round values before checking valid refresh range.
Signed-off-by: Jaehyun Chung <jaehyun.chung@amd.com> Reviewed-by: Aric Cyr <Aric.Cyr@amd.com> Acked-by: Anthony Koo <Anthony.Koo@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
jinlong zhang [Wed, 17 Jun 2020 15:20:56 +0000 (23:20 +0800)]
drm/amd/display: check dpcd read status of DP_DOWNSTREAM_PORT_0
[Why]
For special DP convert VGA dongle, core_link_read_dpcd for
DP_DOWNSTREAM_PORT_0 always return fail, then dongle_type will be set to
DISPLAY_DONGLE_NONE, which will cause desktop resolution abnormal.
[How]
If dpcd for DP_DOWNSTREAM_PORT_0 read fail, skip set dongle_type =
DISPLAY_DONGLE_NONE.
Signed-off-by: jinlong zhang <jinlong.zhang@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Eryk Brol <eryk.brol@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenhui Sheng [Mon, 29 Jun 2020 05:38:58 +0000 (13:38 +0800)]
drm/amdgpu: correct discovery_tmr_size init val
The legacy way to initialize discovery_tmr_size
is using DISCOVERY_TMR_SIZE, while after we reduce
DISCOVERY_TMR_SIZE from 64KB to 4KB, variable
discovery_tmr_size is also reduced to 4KB, this is not
correct, it still should be 64KB, discovery_tmr_size
will be used to calculate ip_discovery reserved mem's
start address and size.
Using DISCOVERY_TMR_OFFSET to init discovery_tmr_size instead.
Evan Quan [Wed, 17 Jun 2020 03:54:31 +0000 (11:54 +0800)]
drm/amd/powerplay: drop unnecessary "@" on OD sysfs output
To follow conventional style. And this unnecessary "@" confuses
our userspace tool.
Signed-off-by: Evan Quan <evan.quan@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenhui Sheng [Tue, 23 Jun 2020 05:43:49 +0000 (13:43 +0800)]
drm/amdgpu: invoke req full access early enough
From SIENNA_CICHLID, HW introduce a new protection
feature which can control the FB, doorbell and MMIO
write access for VF, so guest driver should request
full access before ip discovery, or we couldn't access
ip discovery data in FB.
Wenhui Sheng [Tue, 23 Jun 2020 05:42:58 +0000 (13:42 +0800)]
drm/amdgpu: move reg base init forward for soc15
Init soc15 reg base early enough so we can touch
mailbox related registers in request full access
for sriov before set_ip_blocks, vi&nv arch doesn't
use reg base in virt ops.
Felix Kuehling [Thu, 25 Jun 2020 03:08:46 +0000 (23:08 -0400)]
drm/amdgpu: Let KFD use more VMIDs on Arcturus
When there is no graphics support, KFD can use more of the VMIDs. Graphics
VMIDs are only used for video decoding/encoding and post processing. With
two VCE engines, there is no reason to reserve more than 2 VMIDs for that.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Felix Kuehling [Thu, 25 Jun 2020 03:05:44 +0000 (23:05 -0400)]
drm/amdgpu: Clean up KFD VMID assignment
The KFD VMID assignment was hard-coded in a few places. Consolidate that in
a single variable adev->vm_manager.first_kfd_vmid. The value is still
assigned in gmc-ip-version-specific code.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Jivin [Wed, 24 Jun 2020 17:37:20 +0000 (13:37 -0400)]
drm/amdgpu: SI support for UVD and VCE power managment
Port functionality from the Radeon driver to support
UVD and VCE power management.
Signed-off-by: Alex Jivin <alex.jivin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Jivin [Wed, 24 Jun 2020 16:41:14 +0000 (12:41 -0400)]
drm/amdgpu: SI support for VCE clock control
Port functionality from the Radeon driver to support
VCE clock control.
Signed-off-by: Alex Jivin <alex.jivin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Alex Jivin [Wed, 24 Jun 2020 15:45:36 +0000 (11:45 -0400)]
drm/amdgpu: SI support for UVD clock control
Port functionality from the Radeon driver to support
UVD clock control.
Signed-off-by: Alex Jivin <alex.jivin@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Dave Airlie [Thu, 2 Jul 2020 05:17:31 +0000 (15:17 +1000)]
Merge tag 'amd-drm-next-5.9-2020-07-01' of git://people.freedesktop.org/~agd5f/linux into drm-next
amd-drm-next-5.9-2020-07-01:
amdgpu:
- DC DMUB updates
- HDCP fixes
- Thermal interrupt fixes
- Add initial support for Sienna Cichlid GPU
- Add support for unique id on Arcturus
- Major swSMU code cleanup
- Skip BAR resizing if the bios already did id
- Fixes for DCN bandwidth calculations
- Runtime PM reference count fixes
- Add initial UVD support for SI
- Add support for ASSR on eDP links
- Lots of misc fixes and cleanups
- Enable runtime PM on vega10 boards that support BACO
- RAS fixes
- SR-IOV fixes
- Use IP discovery table on renoir
- DC stream synchronization fixes
amdkfd:
- Track SDMA usage per process
- Fix GCC10 compiler warnings
- Locking fix
radeon:
- Default to on chip GART for AGP boards on all arches
- Runtime PM reference count fixes
Error appears when some i2c device driver tries to probe for devices
using adapter registered by `smu_v11_0_i2c_eeprom_control_init()`.
Code supporting this adapter requires `adev->psp.ras.ras` to be not
NULL, which is true only when `amdgpu_ras_init()` detects HW support by
calling `amdgpu_ras_check_supported()`.
Fix simply adds HW support check (ras == NULL => no support) before
calling `smu_v11_0_i2c_eeprom_control_{init,fini}()`.
Please note that there is a chance that similar fix is also required for
CHIP_ARCTURUS. I do not know whether any actual Arcturus hardware without
RAS exist, and whether calling `smu_i2c_eeprom_init()` makes any sense
when there is no HW support.
Cc: stable@vger.kernel.org Fixes: 9015d60c9ee1 ("drm/amdgpu: Move EEPROM I2C adapter to amdgpu_device") Signed-off-by: Ivan Mironov <mironov.ivan@gmail.com> Tested-by: Bjorn Nostvold <bjorn.nostvold@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Thu, 25 Jun 2020 13:35:07 +0000 (15:35 +0200)]
drm/amdgpu: call release_firmware() without a NULL check
The release_firmware() function is NULL tolerant so we do not need
to check for NULL param before calling it.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit fixes the warning by ensuring get_user() is not called
while reading SDMA stats with dqm_lock held as get_user() could cause a
page fault which leads to the circular locking scenario.
Signed-off-by: Mukul Joshi <mukul.joshi@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Wed, 24 Jun 2020 12:07:10 +0000 (13:07 +0100)]
drm/radeon: fix array out-of-bounds read and write issues
There is an off-by-one bounds check on the index into arrays
table->mc_reg_address and table->mc_reg_table_entry[k].mc_data[j] that
can lead to reads and writes outside of arrays. Fix the bound checking
off-by-one error.
Addresses-Coverity: ("Out-of-bounds read/write") Fixes: cc8dbbb4f62a ("drm/radeon: add dpm support for CI dGPUs (v2)") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Colin Ian King [Wed, 24 Jun 2020 14:54:18 +0000 (15:54 +0100)]
drm/amdgpu: ensure 0 is returned for success in jpeg_v2_5_wait_for_idle
In the cases where adev->jpeg.num_jpeg_inst is zero or the condition
adev->jpeg.harvest_config & (1 << i) is always non-zero the variable
ret is never set to an error condition and the function returns
an uninitialized value in ret. Since the only exit condition at
the end if the function is a success then explicitly return
0 rather than a potentially uninitialized value in ret.
Addresses-Coverity: ("Uninitialized scalar variable") Fixes: 14f43e8f88c5 ("drm/amdgpu: move JPEG2.5 out from VCN2.5") Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Bernard Zhao [Sat, 20 Jun 2020 09:11:52 +0000 (17:11 +0800)]
drm/amd: fix potential memleak in err branch
The function kobject_init_and_add alloc memory like:
kobject_init_and_add->kobject_add_varg->kobject_set_name_vargs
->kvasprintf_const->kstrdup_const->kstrdup->kmalloc_track_caller
->kmalloc_slab, in err branch this memory not free. If use
kmemleak, this path maybe catched.
These changes are to add kobject_put in kobject_init_and_add
failed branch, fix potential memleak.
Signed-off-by: Bernard Zhao <bernard@vivo.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Tue, 23 Jun 2020 09:34:51 +0000 (11:34 +0200)]
drm/amd/powerplay: return current DCEFCLK on sysfs read (v2)
This fixes incorrect output when reading pp_dpm_dcefclk sysfs.
Output before this patch:
cat /sys/devices/pci0000:<snip>/pp_dpm_dcefclk
0: 506Mhz
1: 42949671Mhz *
2: 1266Mhz
v2: squash in arcturus fix
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Nirmoy Das [Mon, 22 Jun 2020 19:50:40 +0000 (21:50 +0200)]
drm/powerplay: fix compilation warning
If (smu)->ppt_funcs->intf is not initialized then
smu_send_smc_msg(smu, SMU_MSG_ReadSerialNumBottom32, &bottom32) and
smu_send_smc_msg(smu, SMU_MSG_ReadSerialNumTop32, &top32) will not
touch bottom32 and top32.
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Stylon Wang [Fri, 12 Jun 2020 11:04:18 +0000 (19:04 +0800)]
drm/amd/display: Fix ineffective setting of max bpc property
[Why]
Regression was introduced where setting max bpc property has no effect
on the atomic check and final commit. It has the same effect as max bpc
being stuck at 8.
[How]
Correctly propagate max bpc with the new connector state.
Signed-off-by: Stylon Wang <stylon.wang@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Mon, 1 Jun 2020 16:17:44 +0000 (12:17 -0400)]
drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update
[why]
DP link layer CTS specs updated to change the test parameters in test
4.2.1.1.
Before it requires source to delay 400us on aux no reply.
With the specs updates Errata5, it requires source to delay 3.2ms
(based on LTTPR aux timeout)
This causes our test to fail after updating with the latest test
equipment firmware.
[how]
the change is to allow LTTPR 3.2ms aux timeout delay by default.
And set back to 400us if LTTPR feature is not enabled.
We will set 3.2ms and always enable LTTPR non transparent mode
if LTTPR feature is enabled and LTTPR is present.
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Wenjing Liu [Mon, 8 Jun 2020 19:16:00 +0000 (15:16 -0400)]
drm/amd/display: allow query ddc data over aux to be read only operation
[why]
Two issues:
1. Add read only operation support for query ddc data over aux.
2. Fix a bug where if read size is multiple of 16,
mot of the last read transaction will not be set to 0.
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
David Galiffi [Thu, 11 Jun 2020 21:36:14 +0000 (17:36 -0400)]
drm/amd/display: Compare v_front_porch when checking if streams are synchronizable
[Why]
If the front porch of the two timings differ, then there may not be
enough time while both streams are in vertical blank to perform a memory
clock change. This can hang the system.
[How]
Check the each streams timing.v_front_porch when determining if the two
streams are synchronizable.
Signed-off-by: David Galiffi <David.Galiffi@amd.com> Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Chris Park [Wed, 10 Jun 2020 03:51:36 +0000 (23:51 -0400)]
drm/amd/display: Allow 4 split on 10K 420 modes
[Why]
10K YCbCr420 does not need ODM 4:1, but it requires MPC 4 split
indicated on the flags.
[How]
Make pixel encoding and resolution size specific workaround to enable
ODM combine on YCbCr420 high resolution modes.
Signed-off-by: Chris Park <Chris.Park@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Derek Lai [Thu, 4 Jun 2020 08:29:39 +0000 (16:29 +0800)]
drm/amd/display: VSC SDP supported for SST
[why]
If a typeC to HDMI dongle supports YCbCr420 pass through and VSC
colorimetry and pixel encoding formats in the Extended Receiver
Capability, we shall allow VSC SDP to be used.
[How]
The Extended Receiver Capability field shall check the
EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT bit in the
TRAINING_AUX_RD_INTERVAL register. Removed DPCD rev checking for VSC
SDP.
Signed-off-by: Derek Lai <Derek.Lai@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drm/amd/display: Fill in dmub_srv fw_version from firmware metadata
[Why]
DMCUB firmware version is now available from firmware metadata block.
We should be passing this into dmub_srv so we can know when to apply
firmware version specific functionality like using CW4 only instead
of the REGION4.
[How]
We don't have the helpers for DM to actually extract out firmware
metadata block themselves.
We could add that and add helpers in DM to grab this, but not every
creation sequence has firmware instruction before dmub_srv_create.
Easiest way to handle this is to fill this in automatically per DM in
the place we do have it - when calculating the region parameters. But
only fill it in if DM already hasn't in case we need to override with
a specific version.
We aren't do anything firmware version specific in dmub_srv_create
today that does require fw_version, so while it's a little unituitive
to do it when calculating region parameters it works for now.
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>