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6 years agodrm/amd/powerplay: init vega20 uvd/vce powergate status on dpm setup
Evan Quan [Fri, 4 May 2018 07:20:15 +0000 (15:20 +0800)]
drm/amd/powerplay: init vega20 uvd/vce powergate status on dpm setup

This is essentially necessary when uvd/vce dpm is not enabled yet.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: support workload profile query and setup for vega20
Evan Quan [Fri, 6 Jul 2018 19:00:37 +0000 (14:00 -0500)]
drm/amd/powerplay: support workload profile query and setup for vega20

Support the power profile API.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add the hw manager for vega20 (v3)
Evan Quan [Thu, 2 Aug 2018 20:55:33 +0000 (15:55 -0500)]
drm/amd/powerplay: add the hw manager for vega20 (v3)

hwmgr is the interface for the driver to setup state
structures which are used by the smu for managing the
power state.

v2: squash in fixes:
- update set_watermarks_for_clocks_ranges to use common code
- drop unsupported apis
- correct MAX_REGULAR_DPM_NUMBER value
- multimonitor fixes
- add check for vbios pptable version
- revise dpm table setup
- init fclk dpm state
- Remove unused definition in vega20_hwmgr
- support power limit setup
- enable vega20 to honour DAL clock limits
- comment out dump_table debugging
v3: switch to SOC15 register access macros

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: new interfaces for ActivityMonitor table with SMU
Evan Quan [Fri, 11 May 2018 02:56:25 +0000 (10:56 +0800)]
drm/amd/powerplay: new interfaces for ActivityMonitor table with SMU

Vega20 has a new activity monitor table that is stored in memory.  Add
API to get and set the new table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add the smu manager for vega20 (v2)
Evan Quan [Thu, 2 Aug 2018 20:52:41 +0000 (15:52 -0500)]
drm/amd/powerplay: add the smu manager for vega20 (v2)

The SMU manager handles the driver interaction with the SMU
which handles clock and voltage controls.

v2: switch to SOC15 register access macros
    reserve space for ActivityMonitor table
    enable SMU fw loading
    Drop dead code from bringup

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add vega20_pptable.h (v2)
Evan Quan [Wed, 21 Mar 2018 08:36:08 +0000 (16:36 +0800)]
drm/amd/powerplay: add vega20_pptable.h (v2)

v2: squash in table size fixes

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add vega20_ppsmc.h (v2)
Evan Quan [Wed, 21 Mar 2018 08:21:51 +0000 (16:21 +0800)]
drm/amd/powerplay: add vega20_ppsmc.h (v2)

v2: update to latest.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add smu11_driver_if.h (v4)
Evan Quan [Wed, 21 Mar 2018 08:16:41 +0000 (16:16 +0800)]
drm/amd/powerplay: add smu11_driver_if.h (v4)

v2: cleanup
v3: fit the latest 40.6 smc fw
v4: update to latest.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/powerplay: add vega20_inc.h (v2)
Evan Quan [Wed, 21 Mar 2018 06:10:21 +0000 (14:10 +0800)]
drm/amd/powerplay: add vega20_inc.h (v2)

v2: use thm 11.0.2 headers

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: update atomfirmware.h
Evan Quan [Wed, 2 May 2018 07:50:10 +0000 (15:50 +0800)]
drm/amdgpu: update atomfirmware.h

Add struct atom_smc_dpm_info_v4_3

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add nbio 7.4 support for vega20 (v3)
Feifei Xu [Fri, 23 Mar 2018 19:44:28 +0000 (14:44 -0500)]
drm/amdgpu: Add nbio 7.4 support for vega20 (v3)

Some register offset in nbio v7.4 are different with v7.0.
We need a seperate nbio_v7_4.c for vega20.

v2: fix doorbell range for sdma (Alex)
v3: squash in static fix (kbuild test robot)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoRevert "drm/amdgpu: Add nbio support for vega20 (v2)"
Alex Deucher [Tue, 3 Apr 2018 20:49:56 +0000 (15:49 -0500)]
Revert "drm/amdgpu: Add nbio support for vega20 (v2)"

Revert this to add proper nbio 7.4 support.

This reverts commit f5b2e1fa321eff20a9418ebd497d8a466f024a85.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/include: Add mp 11.0 header files. (v2)
Feifei Xu [Thu, 10 May 2018 13:23:58 +0000 (21:23 +0800)]
drm/amdgpu/include: Add mp 11.0 header files. (v2)

Add the system management controller v11.0 header files.

v2: cleanup

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/include: add thm 11.0.2 headers
Evan Quan [Mon, 26 Mar 2018 07:29:48 +0000 (15:29 +0800)]
drm/amdgpu/include: add thm 11.0.2 headers

Headers for thermal controller.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/include: Add sdma0/1 4.2 register headerfiles. (v3)
Feifei Xu [Wed, 17 Jan 2018 11:42:33 +0000 (19:42 +0800)]
drm/amdgpu/include: Add sdma0/1 4.2 register headerfiles. (v3)

These are the System DMA register headers for vega20.

v2: cleanups (Alex)
v3: add missing licenses (Alex)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/include: Add nbio 7.4 header files (v4)
Feifei Xu [Wed, 17 Jan 2018 12:05:19 +0000 (20:05 +0800)]
drm/amdgpu/include: Add nbio 7.4 header files (v4)

v2: Cleanups (Alex)
v3: More updates (Alex)
v4: more cleanups (Alex)

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/radeon: enable ABGR and XBGR formats (v2)
Mauro Rossi [Sun, 12 Aug 2018 19:43:03 +0000 (21:43 +0200)]
drm/radeon: enable ABGR and XBGR formats (v2)

Add support for DRM_FORMAT_{A,X}BGR8888 in atombios_crtc
Swapping of red and blue channels is implemented for radeon chipsets:
DCE2/R6xx and later - crossbar registers defined where needed and used
DCE1/R5xx - AVIVO_D1GRPH_SWAP_RB bit is used

(v2) Set AVIVO_D1GRPH_SWAP_RB bit in fb_format, using bitwise OR for DCE1 path
     Use bitwise OR where required for big endian settings in fb_swap
     Use existing code style CHIP_R600 condition, fix typo in R600 blue crossbar

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: enable ABGR and XBGR formats (v2)
Mauro Rossi [Sun, 12 Aug 2018 19:43:02 +0000 (21:43 +0200)]
drm/amdgpu: enable ABGR and XBGR formats (v2)

Add support for DRM_FORMAT_{A,X}BGR8888 in amdgpu with amd dc disabled

(v2) Crossbar registers are defined and used to swap red and blue channels,
     keeping the existing coding style in each of the dce modules.
     After setting crossbar bits in fb_swap, use bitwise OR for big endian
     where required in DCE6 and DCE8 which do not rely on REG_SET_FIELD()

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: enable ABGR and XBGR formats (v4)
Mauro Rossi [Sun, 12 Aug 2018 19:43:01 +0000 (21:43 +0200)]
drm/amd/display: enable ABGR and XBGR formats (v4)

SURFACE_PIXEL_FORMAT_GRPH_ABGR8888 is supported in amd/display/dc/dc_hw_types.h
and the necessary crossbars register controls to swap red and blue channels
are already implemented in drm/amd/display/dc/dce/dce_mem_input.c

(v4) Logic to handle new formats is added only in amdgpu_dm module.

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay/vega10: enable AVFS control via ppfeaturemask
Alex Deucher [Fri, 10 Aug 2018 18:21:09 +0000 (13:21 -0500)]
drm/amdgpu/powerplay/vega10: enable AVFS control via ppfeaturemask

Allow the user to disable AFVS via ppfeaturemask for debugging.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay/smu7: enable AVFS control via ppfeaturemask
Alex Deucher [Fri, 10 Aug 2018 18:19:26 +0000 (13:19 -0500)]
drm/amdgpu/powerplay/smu7: enable AVFS control via ppfeaturemask

Allow the user to disable AFVS via ppfeaturemask for debugging.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add AVFS control to PP_FEATURE_MASK
Alex Deucher [Fri, 10 Aug 2018 18:09:43 +0000 (13:09 -0500)]
drm/amdgpu: add AVFS control to PP_FEATURE_MASK

Add a ppfeaturemask flag to disable AVFS control.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dc 3.1.62
Tony Cheng [Thu, 19 Jul 2018 00:29:13 +0000 (20:29 -0400)]
drm/amd/display: dc 3.1.62

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Steven Chiu <Steven.Chiu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Remove redundant non-zero and overflow check
Leo (Sunpeng) Li [Wed, 1 Aug 2018 14:20:53 +0000 (10:20 -0400)]
drm/amd/display: Remove redundant non-zero and overflow check

[Why]
Unsigned int is guaranteed to be >= 0, and read_channel_reply checks for
overflows. read_channel_reply also returns -1 on error, which is what
dc_link_aux_transfer is expected to return on error.

[How]
Remove the if-statement. Return result of read_channel_reply directly.

Signed-off-by: Leo (Sunpeng) Li <sunpeng.li@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: add retimer log for HWQ tuning use.
Charlene Liu [Wed, 1 Aug 2018 00:14:26 +0000 (20:14 -0400)]
drm/amd/display: add retimer log for HWQ tuning use.

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix dml handling of mono8/16 pixel formats
Dmytro Laktyushkin [Tue, 17 Jul 2018 21:15:48 +0000 (17:15 -0400)]
drm/amd/display: fix dml handling of mono8/16 pixel formats

mono formats are treated exactly the same as equivallent bpp
444 formats. Dml validation however lacks 444 8 bit format
while dml perf param calculation lacks mono format support

This change makes them equivallent as far as the enum is concerned
to avoid having to update dml

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add dprefclk value to dce_dccg
Dmytro Laktyushkin [Mon, 30 Jul 2018 18:41:01 +0000 (14:41 -0400)]
drm/amd/display: Add dprefclk value to dce_dccg

This allows us to avoid any vbios bugs when initializing clocks

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: fix PIP bugs on Dal3
Gloria Li [Thu, 26 Jul 2018 15:32:14 +0000 (11:32 -0400)]
drm/amd/display: fix PIP bugs on Dal3

[Why]
There are outstanding bugs for PIP in Dal3:
-Crash when toggling PIP visibility
-Global Alpha is not working, Adjusting global alpha
 doesn’t have an effect
-Cursor is not working with pip plane and pipe splits
-One flash occurs when cursor enters PIP plane from
 top/bottom
-Crash when moving PIP plane off the screen

[How]
Resolve divide by 0 error
Implement global alpha
Program cursor on all pipes
Add dst rects' x and y offests into cursor position
Disable cursor when it is beyond bottom/top edge

Signed-off-by: Gloria Li <geling.li@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dc 3.1.61
Tony Cheng [Thu, 19 Jul 2018 00:28:54 +0000 (20:28 -0400)]
drm/amd/display: dc 3.1.61

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Steven Chiu <Steven.Chiu@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Cancel gfx off delay work when driver fini/suspend
Rex Zhu [Thu, 9 Aug 2018 07:26:06 +0000 (15:26 +0800)]
drm/amdgpu: Cancel gfx off delay work when driver fini/suspend

there may be gfx off delay work pending when suspend/driver
unload, need to cancel them first.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/powerplay: check vrefresh when when changing displays
Alex Deucher [Thu, 9 Aug 2018 19:24:08 +0000 (14:24 -0500)]
drm/amdgpu/powerplay: check vrefresh when when changing displays

Compare the current vrefresh in addition to the number of displays
when determining whether or not the smu needs updates when changing
modes. The SMU needs to be updated if the vbi timeout changes due
to a different refresh rate.  Fixes flickering around mode changes
in some cases on polaris parts.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix emit frame size and comments for jpeg
Boyuan Zhang [Wed, 18 Jul 2018 20:29:29 +0000 (16:29 -0400)]
drm/amdgpu: fix emit frame size and comments for jpeg

Fix vcn jpeg ring emit fence size in dword, and fix the naming in comments.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add emit trap for vcn jpeg
Boyuan Zhang [Wed, 18 Jul 2018 20:26:28 +0000 (16:26 -0400)]
drm/amdgpu: add emit trap for vcn jpeg

Add emit trap command in jpeg emit fence call.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: enable system interrupt for jrbc
Boyuan Zhang [Wed, 18 Jul 2018 20:25:42 +0000 (16:25 -0400)]
drm/amdgpu: enable system interrupt for jrbc

Enable system interrupt for jrbc during engine starting time.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add system interrupt mask for jrbc
Boyuan Zhang [Wed, 18 Jul 2018 20:24:18 +0000 (16:24 -0400)]
drm/amdgpu: add system interrupt mask for jrbc

Add new mask for enabling system interrupt for jrbc.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add system interrupt register offset header
Boyuan Zhang [Wed, 18 Jul 2018 20:13:29 +0000 (16:13 -0400)]
drm/amdgpu: add system interrupt register offset header

Add new register offset for enabling system interrupt.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: add emit reg write reg wait for vcn jpeg
Boyuan Zhang [Wed, 11 Jul 2018 18:40:18 +0000 (14:40 -0400)]
drm/amdgpu: add emit reg write reg wait for vcn jpeg

The emit_reg_write_reg_wait function was not assigned for vcn jpeg.
This patch adds it back.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu at amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pp: endian fixes for processpptables.c
Alex Deucher [Tue, 7 Aug 2018 21:30:50 +0000 (16:30 -0500)]
drm/amdgpu/pp: endian fixes for processpptables.c

Properly swap when reading from the vbios.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/pp: endian fixes for process_pptables_v1_0.c
Alex Deucher [Tue, 7 Aug 2018 20:17:09 +0000 (15:17 -0500)]
drm/amdgpu/pp: endian fixes for process_pptables_v1_0.c

Properly swap when reading from the vbios.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: change entities rq even earlier
Christian König [Wed, 8 Aug 2018 11:07:11 +0000 (13:07 +0200)]
drm/scheduler: change entities rq even earlier

Looks like for correct debugging we need to know the scheduler even
earlier. So move picking a rq for an entity into job creation.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: fix last_scheduled handling
Christian König [Tue, 7 Aug 2018 12:52:13 +0000 (14:52 +0200)]
drm/scheduler: fix last_scheduled handling

Make sure we access last_scheduled only after checking that there are no
more jobs on the entity.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: Remove entity->rq NULL check
Christian König [Fri, 3 Aug 2018 11:07:36 +0000 (13:07 +0200)]
drm/scheduler: Remove entity->rq NULL check

That is superflous now.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move missed gfxoff entry into amdgpu_gfx header
Huang Rui [Mon, 6 Aug 2018 12:14:51 +0000 (20:14 +0800)]
drm/amdgpu: move missed gfxoff entry into amdgpu_gfx header

Move missed gfxoff entry to amdgpu_gfx.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move vm definitions into amdgpu_vm header
Huang Rui [Fri, 3 Aug 2018 11:06:02 +0000 (19:06 +0800)]
drm/amdgpu: move vm definitions into amdgpu_vm header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move gmc macros into amdgpu_gmc header
Huang Rui [Fri, 3 Aug 2018 10:59:25 +0000 (18:59 +0800)]
drm/amdgpu: move gmc macros into amdgpu_gmc header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move display definitions into amdgpu_display header
Huang Rui [Thu, 9 Aug 2018 14:50:12 +0000 (09:50 -0500)]
drm/amdgpu: move display definitions into amdgpu_display header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: remove useless gds switch macro
Huang Rui [Fri, 3 Aug 2018 10:37:58 +0000 (18:37 +0800)]
drm/amdgpu: remove useless gds switch macro

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move ring macros into amdgpu_ring header
Huang Rui [Fri, 3 Aug 2018 10:33:06 +0000 (18:33 +0800)]
drm/amdgpu: move ring macros into amdgpu_ring header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agogpu: drm: radeon: radeon_test: Replace mdelay() with msleep()
Jia-Ju Bai [Sat, 4 Aug 2018 00:01:02 +0000 (08:01 +0800)]
gpu: drm: radeon: radeon_test: Replace mdelay() with msleep()

radeon_test_ring_sync() and radeon_test_ring_sync2() are never
called in atomic context.
They call mdelay() to busily wait, which is not necessary.
mdelay() can be replaced with msleep().

This is found by a static analysis tool named DCNS written by myself.

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agogpu: drm: radeon: si: Replace mdelay() with msleep() in si_pcie_gen3_enable()
Jia-Ju Bai [Sat, 4 Aug 2018 00:33:44 +0000 (08:33 +0800)]
gpu: drm: radeon: si: Replace mdelay() with msleep() in si_pcie_gen3_enable()

si_pcie_gen3_enable() is never called in atomic context.
It calls mdelay() to busily wait, which is not necessary.
mdelay() can be replaced with msleep().

This is found by a static analysis tool named DCNS written by myself

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agogpu: drm: radeon: cik: Replace mdelay() with msleep() in cik_pcie_gen3_enable()
Jia-Ju Bai [Sat, 4 Aug 2018 00:25:35 +0000 (08:25 +0800)]
gpu: drm: radeon: cik: Replace mdelay() with msleep() in cik_pcie_gen3_enable()

cik_pcie_gen3_enable() is never called in atomic context.
It calls mdelay() to busily wait, which is not necessary.
mdelay() can be replaced with msleep().

This is found by a static analysis tool named DCNS written by myself.

Signed-off-by: Jia-Ju Bai <baijiaju1990@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: bind job earlier to scheduler
Christian König [Mon, 6 Aug 2018 10:46:41 +0000 (12:46 +0200)]
drm/scheduler: bind job earlier to scheduler

Update job earlier with the scheduler it is supposed to be scheduled on.

Otherwise we could incorrectly optimize dependencies when moving an
entity from one scheduler to another.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: fix setting the priorty for entities (v2)
Christian König [Wed, 1 Aug 2018 14:22:39 +0000 (16:22 +0200)]
drm/scheduler: fix setting the priorty for entities (v2)

Since we now deal with multiple rq we need to update all of them, not
just the current one.

v2: Trivial: Removed unused variable (Alex)

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Delay 100ms to enable gfx off feature
Rex Zhu [Mon, 6 Aug 2018 11:45:04 +0000 (19:45 +0800)]
drm/amdgpu: Delay 100ms to enable gfx off feature

Original 500ms delay seems a bit large.
Change to 100 ms suggested by Christian.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add check for num of entries in gamma
Vitaly Prosyak [Thu, 12 Jul 2018 19:26:47 +0000 (14:26 -0500)]
drm/amd/display: Add check for num of entries in gamma

This check avoids potential bugs related to gamma.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Use DGAM ROM or RAM
Vitaly Prosyak [Wed, 18 Jul 2018 20:10:10 +0000 (15:10 -0500)]
drm/amd/display: Use DGAM ROM or RAM

[Why]
Optimize gamma programming

[How]
Use ROM for optimization when it is possible.
Use RAM only when it is necessary.

Signed-off-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Print DPP DTN log info only for enabled pipes
Nikola Cornij [Thu, 19 Jul 2018 18:03:14 +0000 (14:03 -0400)]
drm/amd/display: Print DPP DTN log info only for enabled pipes

[why]
There is currently a dependency on the order in which tests are executed.
This is because the non-relevant state info is being printed, which results
in the output based on the state from the previous test.

[how]
Print DPP DTN log only if the pipe is enabled.
In addition to the affected per-submission DTN golden logs, included in this
change is also DTN golden log update for pre-submission tests.
The other DTN golden logs affected by this change will be updated upon
nightly test run (which will generate the updated DTN logs).

Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: correct image viewport calculation
Martin Tsai [Fri, 27 Jul 2018 07:39:47 +0000 (15:39 +0800)]
drm/amd/display: correct image viewport calculation

[why]
We didn't transfer the camera/video viewport coordinate
when doing rotation and mirror.

[how]
To correct the viewport coordinate in calculate_viewport().

Signed-off-by: Martin Tsai <Martin.Tsai@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: pass the right num of modes added
Mikita Lipski [Thu, 26 Jul 2018 20:27:48 +0000 (16:27 -0400)]
drm/amd/display: pass the right num of modes added

[why]
In case if edid is null or corrupted we need to manually add
a single failsafe mode (640x480). If zero modes returned
DRM adds a different failsafe mode that is not accepted by
DP 1.2 compliance test

[how]
Return the number of modes manually added

Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Reviewed-by: Sun peng Li <Sunpeng.Li@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move gem definitions into amdgpu_gem header
Huang Rui [Mon, 13 Aug 2018 16:41:35 +0000 (11:41 -0500)]
drm/amdgpu: move gem definitions into amdgpu_gem header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move psp macro into amdgpu_psp header
Huang Rui [Thu, 2 Aug 2018 09:54:21 +0000 (17:54 +0800)]
drm/amdgpu: move psp macro into amdgpu_psp header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move firmware definitions into amdgpu_ucode header
Huang Rui [Thu, 2 Aug 2018 09:47:15 +0000 (17:47 +0800)]
drm/amdgpu: move firmware definitions into amdgpu_ucode header

Demangle amdgpu.h.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move sdma definitions into amdgpu_sdma header
Huang Rui [Thu, 2 Aug 2018 09:23:33 +0000 (17:23 +0800)]
drm/amdgpu: move sdma definitions into amdgpu_sdma header

Demangle amdgpu.h.
Furthermore, SDMA is used for moving and clearing the data buffer, so the header
also need be included in ttm.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move ih definitions into amdgpu_ih header
Huang Rui [Thu, 2 Aug 2018 08:24:52 +0000 (16:24 +0800)]
drm/amdgpu: move ih definitions into amdgpu_ih header

Demangle amdgpu.h

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: move gfx definitions into amdgpu_gfx header
Huang Rui [Thu, 2 Aug 2018 08:12:39 +0000 (16:12 +0800)]
drm/amdgpu: move gfx definitions into amdgpu_gfx header

Demangle amdgpu.h

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Delete duplicated interface in hwmgr_func
Rex Zhu [Fri, 27 Jul 2018 06:10:45 +0000 (14:10 +0800)]
drm/amd/pp: Delete duplicated interface in hwmgr_func

gfx off support in smu can be via powergate_gfx interface.
so remove the gfx_off_control interface.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Disable gfx off if VCN is busy
Rex Zhu [Fri, 27 Jul 2018 09:00:02 +0000 (17:00 +0800)]
drm/amdgpu: Disable gfx off if VCN is busy

this patch is a workaround for the gpu hang
at video begin/end time if gfx off is enabled.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Ctrl gfx off via amdgpu_gfx_off_ctrl
Rex Zhu [Fri, 27 Jul 2018 06:55:09 +0000 (14:55 +0800)]
drm/amdgpu: Ctrl gfx off via amdgpu_gfx_off_ctrl

use amdgpu_gfx_off_ctrl function so driver can arbitrate
whether the gfx ip can be power off or power on.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Put enable gfx off feature to a delay thread
Rex Zhu [Fri, 27 Jul 2018 13:06:30 +0000 (21:06 +0800)]
drm/amdgpu: Put enable gfx off feature to a delay thread

delay to enable gfx off feature to avoid gfx on/off frequently
suggested by Alex and Evan.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add amdgpu_gfx_off_ctrl function
Rex Zhu [Mon, 30 Jul 2018 08:59:09 +0000 (16:59 +0800)]
drm/amdgpu: Add amdgpu_gfx_off_ctrl function

v2:
   1. drop the special handling for the hw IP
      suggested by hawking and Christian.
   2. refine the variable name suggested by Flora.

This funciton as the entry of gfx off feature.
we arbitrat gfx off feature enable/disable in this
function.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Add support for toggling DFS bypass
Nicholas Kazlauskas [Tue, 21 Aug 2018 19:36:49 +0000 (14:36 -0500)]
drm/amd/display: Add support for toggling DFS bypass

[Why]

If the hardware supports DFS bypass it will always be enabled after
creation of the DCCG. DFS bypass should only be enabled when
the current stream consists of a single embedded panel and the
minimum display clock is below the DFS bypass threshold.

[How]

Add a function to the DCCG table that updates the DFS bypass state
when setting the bandwidth. If the DFS bypass state is changed, the
clock needs to be reprogrammed to reflect this before the DPREFCLK
is updated for audio endpoints. The existing display clock value
is used as the target display clock value when reprogramming since the
resulting change will be equal or larger to the current value.

These changes only specifically target dce110 but do offer a framework
for support on other applicable targets.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: David Francis <David.Francis@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Enable DFS bypass support in DC config
Nicholas Kazlauskas [Tue, 24 Jul 2018 13:42:23 +0000 (09:42 -0400)]
drm/amd/display: Enable DFS bypass support in DC config

[Why]

We explicitly disable DFS bypass support when creating DC. Support
for this feature should now be in place so it can be left implicitly
enabled.

[How]

Remove the line that disables DFS bypass support.

Note: This option was actually reset to false anyway for most of
the hardware I've tested on making this particular line misleading
in the first place. This patch also fixes this issue.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Set DFS bypass flags for dce110
Nicholas Kazlauskas [Tue, 24 Jul 2018 17:19:49 +0000 (13:19 -0400)]
drm/amd/display: Set DFS bypass flags for dce110

[Why]

While there is support for using and quering DFS bypass clocks the
hardware is never notified to enter DFS bypass mode for dce110.

[How]

Add a flag that can be set when programming the display engine PLL
to enable DFS bypass mode. If this flag is set then the hardware is
notified to enter DFS bypass mode and the correct display engine clock
frequency can be acquired.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: dal 3.1.60
Tony Cheng [Thu, 19 Jul 2018 00:28:12 +0000 (20:28 -0400)]
drm/amd/display: dal 3.1.60

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Move PME to function pointer call semantics
Jun Lei [Mon, 16 Jul 2018 14:40:31 +0000 (10:40 -0400)]
drm/amd/display: Move PME to function pointer call semantics

[why]
Legacy IRI style is not linux friendly.

[how]
New function pointer call
semantics will be used for all future PPLIB/DAL interfaces, and also
some existing will be refactored.  This change defines how the
new function pointer structures will look, as well as implements

Signed-off-by: Jun Lei <Jun.Lei@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: pass compat_level to hubp
Charlene Liu [Mon, 16 Jul 2018 18:05:11 +0000 (14:05 -0400)]
drm/amd/display: pass compat_level to hubp

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Implement get_performance_level for legacy dgpu
Rex Zhu [Thu, 5 Jul 2018 11:22:50 +0000 (19:22 +0800)]
drm/amd/pp: Implement get_performance_level for legacy dgpu

display can get clock info through this function.
implement this function for vega10 and old asics.
from vega12, there is no power state management,
so need to add new interface to notify display
the clock info

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Add job pipe sync dependecy trace
Andrey Grodzovsky [Tue, 31 Jul 2018 14:52:25 +0000 (10:52 -0400)]
drm/amdgpu: Add job pipe sync dependecy trace

It's useful to trace any dependency a job has on prevoius
jobs.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: Add job dependency trace.
Andrey Grodzovsky [Tue, 31 Jul 2018 14:48:52 +0000 (10:48 -0400)]
drm/scheduler: Add job dependency trace.

During debug sessions I encountered a need to trace
back a job dependecy a few steps back to the first failing
job. This trace helpped me a lot.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: move idle entities to scheduler with less load v2
Nayan Deshmukh [Wed, 1 Aug 2018 08:20:02 +0000 (13:50 +0530)]
drm/scheduler: move idle entities to scheduler with less load v2

This is the first attempt to move entities between schedulers to
have dynamic load balancing. We just move entities with no jobs for
now as moving the ones with jobs will lead to other compilcations
like ensuring that the other scheduler does not remove a job from
the current entity while we are moving.

v2: remove unused variable and an unecessary check

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: add new function to get least loaded sched v2
Nayan Deshmukh [Wed, 1 Aug 2018 08:20:01 +0000 (13:50 +0530)]
drm/scheduler: add new function to get least loaded sched v2

The function selects the run queue from the rq_list with the
least load. The load is decided by the number of jobs in a
scheduler.

v2: avoid using atomic read twice consecutively, instead store
    it locally

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: add counter for total jobs in scheduler
Nayan Deshmukh [Wed, 1 Aug 2018 08:20:00 +0000 (13:50 +0530)]
drm/scheduler: add counter for total jobs in scheduler

To keep track of the scheduler load.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/scheduler: add a list of run queues to the entity
Nayan Deshmukh [Wed, 1 Aug 2018 08:19:59 +0000 (13:49 +0530)]
drm/scheduler: add a list of run queues to the entity

These are the potential run queues on which the jobs from this
entity can be scheduled. We will use this to do load balancing.

Signed-off-by: Nayan Deshmukh <nayan26deshmukh@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amgpu/acp: Implement set_powergating_state for acp
Rex Zhu [Sun, 29 Jul 2018 10:53:02 +0000 (18:53 +0800)]
drm/amgpu/acp: Implement set_powergating_state for acp

so driver can powergate acp block after asic initialized
to save power.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu/acp: Powrgate acp via smu
Rex Zhu [Sun, 29 Jul 2018 10:44:06 +0000 (18:44 +0800)]
drm/amdgpu/acp: Powrgate acp via smu

Call smu to power gate/ungate acp instand of only
powr down acp tiles in acp block.
when smu power gate acp:
smu will turn off clock, power down acp tiles,check and
enter in ULV state.
when smu  ungate acp:
smu will exit ulv, turn on clocks, power on acp tiles.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/amdgpu: Enabling Power Gating for Stoney platform
Vijendar Mukunda [Sun, 29 Jul 2018 11:08:32 +0000 (19:08 +0800)]
drm/amd/amdgpu: Enabling Power Gating for Stoney platform

Removed condition checks to skip the power gating feature for
stoney platform.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Vijendar Mukunda <vijendar.mukunda@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Power down acp if board uses AZ (v2)
Rex Zhu [Thu, 19 Jul 2018 16:48:36 +0000 (11:48 -0500)]
drm/amdgpu: Power down acp if board uses AZ (v2)

if board uses AZ rather than ACP, we power down acp
through smu to save power.

v2: handle S3/S4 and hw_fini (Alex)

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/pp: Add ACP PG support in SMU
Rex Zhu [Thu, 19 Jul 2018 05:49:07 +0000 (13:49 +0800)]
drm/amd/pp: Add ACP PG support in SMU

when ACP block not enabled, we power off
acp block to save power.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amd/display: Fix bug use wrong pp interface
Rex Zhu [Thu, 16 Aug 2018 03:36:38 +0000 (11:36 +0800)]
drm/amd/display: Fix bug use wrong pp interface

Used wrong pp interface, the original interface is
exposed by dpm on SI and paritial CI.

Pointed out by Francis David <david.francis@amd.com>

v2: dal only need to set min_dcefclk and min_fclk to smu.
    so use display_clock_voltage_request interface,
    instand of update all display configuration.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: Fix page fault and kasan warning on pci device remove.
Andrey Grodzovsky [Wed, 22 Aug 2018 14:07:35 +0000 (10:07 -0400)]
drm/amdgpu: Fix page fault and kasan warning on pci device remove.

Problem:
When executing echo 1 > /sys/class/drm/card0/device/remove kasan warning
as bellow and page fault happen because adev->gart.pages already freed by the
time amdgpu_gart_unbind is called.

BUG: KASAN: user-memory-access in amdgpu_gart_unbind+0x98/0x180 [amdgpu]
Write of size 8 at addr 0000000000003648 by task bash/1828
CPU: 2 PID: 1828 Comm: bash Tainted: G        W  O      4.18.0-rc1-dev+ #29
Hardware name: Gigabyte Technology Co., Ltd. AX370-Gaming/AX370-Gaming-CF, BIOS F3 06/19/2017
Call Trace:
dump_stack+0x71/0xab
kasan_report+0x109/0x390
amdgpu_gart_unbind+0x98/0x180 [amdgpu]
ttm_tt_unbind+0x43/0x60 [ttm]
ttm_bo_move_ttm+0x83/0x1c0 [ttm]
ttm_bo_handle_move_mem+0xb97/0xd00 [ttm]
ttm_bo_evict+0x273/0x530 [ttm]
ttm_mem_evict_first+0x29c/0x360 [ttm]
ttm_bo_force_list_clean+0xfc/0x210 [ttm]
ttm_bo_clean_mm+0xe7/0x160 [ttm]
amdgpu_ttm_fini+0xda/0x1d0 [amdgpu]
amdgpu_bo_fini+0xf/0x60 [amdgpu]
gmc_v8_0_sw_fini+0x36/0x70 [amdgpu]
amdgpu_device_fini+0x2d0/0x7d0 [amdgpu]
amdgpu_driver_unload_kms+0x6a/0xd0 [amdgpu]
drm_dev_unregister+0x79/0x180 [drm]
amdgpu_pci_remove+0x2a/0x60 [amdgpu]
pci_device_remove+0x5b/0x100
device_release_driver_internal+0x236/0x360
pci_stop_bus_device+0xbf/0xf0
pci_stop_and_remove_bus_device_locked+0x16/0x30
remove_store+0xda/0xf0
kernfs_fop_write+0x186/0x220
__vfs_write+0xcc/0x330
vfs_write+0xe6/0x250
ksys_write+0xb1/0x140
do_syscall_64+0x77/0x1e0
entry_SYSCALL_64_after_hwframe+0x44/0xa9
RIP: 0033:0x7f66ebbb32c0

Fix:
Split gmc_v{6,7,8,9}_0_gart_fini to postpone amdgpu_gart_fini to after
memory managers are shut down since gart unbind happens
as part of this procedure

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoamdgpu: fix multi-process hang issue
Emily Deng [Wed, 22 Aug 2018 12:18:25 +0000 (20:18 +0800)]
amdgpu: fix multi-process hang issue

SWDEV-146499: hang during multi vulkan process testing

cause:
the second frame's PREAMBLE_IB have clear-state
and LOAD actions, those actions ruin the pipeline
that is still doing process in the previous frame's
work-load IB.

fix:
need insert pipeline sync if have context switch for
SRIOV (because only SRIOV will report PREEMPTION flag
to UMD)

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix preamble handling
Christian König [Tue, 21 Aug 2018 13:09:39 +0000 (15:09 +0200)]
drm/amdgpu: fix preamble handling

At this point the command submission can still be interrupted.

Signed-off-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agodrm/amdgpu: fix VM clearing for the root PD
Christian König [Thu, 16 Aug 2018 10:01:03 +0000 (12:01 +0200)]
drm/amdgpu: fix VM clearing for the root PD

We need to figure out the address after validating the BO, not before.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
6 years agoLinux 4.19-rc1
Linus Torvalds [Sun, 26 Aug 2018 21:11:59 +0000 (14:11 -0700)]
Linux 4.19-rc1

6 years agoMerge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 26 Aug 2018 20:39:05 +0000 (13:39 -0700)]
Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull timer update from Thomas Gleixner:
 "New defines for the compat time* types so they can be shared between
  32bit and 64bit builds. Not used yet, but merging them now allows the
  actual conversions to be merged through different maintainer trees
  without dependencies

  We still have compat interfaces for 32bit on 64bit even with the new
  2038 safe timespec/val variants because pointer size is different. And
  for the old style timespec/val interfaces we need yet another 'compat'
  interface for both 32bit native and 32bit on 64bit"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  y2038: Provide aliases for compat helpers

6 years agoMerge branch 'ida-4.19' of git://git.infradead.org/users/willy/linux-dax
Linus Torvalds [Sun, 26 Aug 2018 18:48:42 +0000 (11:48 -0700)]
Merge branch 'ida-4.19' of git://git.infradead.org/users/willy/linux-dax

Pull IDA updates from Matthew Wilcox:
 "A better IDA API:

      id = ida_alloc(ida, GFP_xxx);
      ida_free(ida, id);

  rather than the cumbersome ida_simple_get(), ida_simple_remove().

  The new IDA API is similar to ida_simple_get() but better named.  The
  internal restructuring of the IDA code removes the bitmap
  preallocation nonsense.

  I hope the net -200 lines of code is convincing"

* 'ida-4.19' of git://git.infradead.org/users/willy/linux-dax: (29 commits)
  ida: Change ida_get_new_above to return the id
  ida: Remove old API
  test_ida: check_ida_destroy and check_ida_alloc
  test_ida: Convert check_ida_conv to new API
  test_ida: Move ida_check_max
  test_ida: Move ida_check_leaf
  idr-test: Convert ida_check_nomem to new API
  ida: Start new test_ida module
  target/iscsi: Allocate session IDs from an IDA
  iscsi target: fix session creation failure handling
  drm/vmwgfx: Convert to new IDA API
  dmaengine: Convert to new IDA API
  ppc: Convert vas ID allocation to new IDA API
  media: Convert entity ID allocation to new IDA API
  ppc: Convert mmu context allocation to new IDA API
  Convert net_namespace to new IDA API
  cb710: Convert to new IDA API
  rsxx: Convert to new IDA API
  osd: Convert to new IDA API
  sd: Convert to new IDA API
  ...

6 years agoMerge tag 'gcc-plugins-v4.19-rc1-fix' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 26 Aug 2018 18:41:08 +0000 (11:41 -0700)]
Merge tag 'gcc-plugins-v4.19-rc1-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux

Pull gcc plugin fix from Kees Cook:
 "Lift gcc test into Kconfig. This is for better behavior when the
  kernel is built with Clang, reported by Stefan Agner"

* tag 'gcc-plugins-v4.19-rc1-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/kees/linux:
  gcc-plugins: Disable when building under Clang

6 years agoMerge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 26 Aug 2018 18:25:21 +0000 (11:25 -0700)]
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull perf updates from Thomas Gleixner:
 "Kernel:
   - Improve kallsyms coverage
   - Add x86 entry trampolines to kcore
   - Fix ARM SPE handling
   - Correct PPC event post processing

  Tools:
   - Make the build system more robust
   - Small fixes and enhancements all over the place
   - Update kernel ABI header copies
   - Preparatory work for converting libtraceevnt to a shared library
   - License cleanups"

* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (100 commits)
  tools arch: Update arch/x86/lib/memcpy_64.S copy used in 'perf bench mem memcpy'
  tools arch x86: Update tools's copy of cpufeatures.h
  perf python: Fix pyrf_evlist__read_on_cpu() interface
  perf mmap: Store real cpu number in 'struct perf_mmap'
  perf tools: Remove ext from struct kmod_path
  perf tools: Add gzip_is_compressed function
  perf tools: Add lzma_is_compressed function
  perf tools: Add is_compressed callback to compressions array
  perf tools: Move the temp file processing into decompress_kmodule
  perf tools: Use compression id in decompress_kmodule()
  perf tools: Store compression id into struct dso
  perf tools: Add compression id into 'struct kmod_path'
  perf tools: Make is_supported_compression() static
  perf tools: Make decompress_to_file() function static
  perf tools: Get rid of dso__needs_decompress() call in __open_dso()
  perf tools: Get rid of dso__needs_decompress() call in symbol__disassemble()
  perf tools: Get rid of dso__needs_decompress() call in read_object_code()
  tools lib traceevent: Change to SPDX License format
  perf llvm: Allow passing options to llc in addition to clang
  perf parser: Improve error message for PMU address filters
  ...

6 years agoMerge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 26 Aug 2018 17:13:21 +0000 (10:13 -0700)]
Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Thomas Gleixner:

 - Correct the L1TF fallout on 32bit and the off by one in the 'too much
   RAM for protection' calculation.

 - Add a helpful kernel message for the 'too much RAM' case

 - Unbreak the VDSO in case that the compiler desides to use indirect
   jumps/calls and emits retpolines which cannot be resolved because the
   kernel uses its own thunks, which does not work for the VDSO. Make it
   use the builtin thunks.

 - Re-export start_thread() which was unexported when the 32/64bit
   implementation was unified. start_thread() is required by modular
   binfmt handlers.

 - Trivial cleanups

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/speculation/l1tf: Suggest what to do on systems with too much RAM
  x86/speculation/l1tf: Fix off-by-one error when warning that system has too much RAM
  x86/kvm/vmx: Remove duplicate l1d flush definitions
  x86/speculation/l1tf: Fix overflow in l1tf_pfn_limit() on 32bit
  x86/process: Re-export start_thread()
  x86/mce: Add notifier_block forward declaration
  x86/vdso: Fix vDSO build if a retpoline is emitted

6 years agoMerge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds [Sun, 26 Aug 2018 16:55:28 +0000 (09:55 -0700)]
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq update from Thomas Gleixner:
 "A small set of updats/fixes for the irq subsystem:

   - Allow GICv3 interrupts to be configured as wake-up sources to
     enable wakeup from suspend

   - Make the error handling of the STM32 irqchip init function work

   - A set of small cleanups and improvements"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/gic-v3: Allow interrupt to be configured as wake-up sources
  irqchip/tango: Set irq handler and data in one go
  dt-bindings: irqchip: renesas-irqc: Document r8a774a1 support
  irqchip/s3c24xx: Remove unneeded comparison of unsigned long to 0
  irqchip/stm32: Fix init error handling
  irqchip/bcm7038-l1: Hide cpu offline callback when building for !SMP