Olof Johansson [Sat, 15 Jun 2013 00:15:12 +0000 (17:15 -0700)]
ARM: ux500: board-mop500: remove unused pin modes
Removes the following warnings:
arch/arm/mach-ux500/board-mop500-pins.c:51:6: warning: 'slpm_in_nopull_wkup' defined but not used [-Wunused-variable]
arch/arm/mach-ux500/board-mop500-pins.c:63:6: warning: 'slpm_out_lo_wkup' defined but not used [-Wunused-variable]
Signed-off-by: Olof Johansson <olof@lixom.net> Cc: Linus Walleij <linux.walleij@linaro.org>
Olof Johansson [Fri, 14 Jun 2013 23:48:42 +0000 (16:48 -0700)]
Merge tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/boards
From Linus Walleij, a set of core patches for ux500. Most of them are
actually board changes, so I sort them into here.
Ux500 core changes:
- Fixes for size and location of PRCMU TCDM
- SD/MMC/SDIO caps updates to boardfiles
- Misc fixes
* tag 'ux500-core-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: avoid warning in ux500_read_asicid
ARM: ux500: regulators: Remove misleading comment
ARM: ux500: Enable support for UHS-I SD-cards
ARM: ux500: Set eMMC and WLAN card slot as non-removable
ARM: ux500: Enable support for discard for MMC/SD
ARM: ux500: Enable support for RPMB and Reliable Write for eMMC
ARM: ux500: Don't set plf ocr mask for SD/MMC device
ARM: ux500: Enable 100MHz for SD/SDIO/MMC devices
ARM: ux500: Remove incorrect DB9540 PRCMU TCDM base location
ARM: ux500: Increase the size of the PRCMU's TCPM size
Olof Johansson [Tue, 11 Jun 2013 07:33:14 +0000 (00:33 -0700)]
Merge tag 'renesas-boards-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Renesas ARM-based SoC board updates for v3.11
Highlights:
bockw: add SDHI0 support
bockw: add dummy regulators for SMSC
bockw: Document CN9 SCIF/RCAN dipswitch selection
lager: support GPIO switches and LEDs
kzm9g: add AS3711 PMIC platform data
marzen: Use INTC External IRQ pin driver for SMSC
ape6evm: Update MP clock parent become EXTAL2 in line with changes
to r8a73a4 SoC code
* tag 'renesas-boards-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: marzen: keep local function as static
ARM: shmobile: bockw: add SDHI0 support
ARM: shmobile: marzen: Use INTC External IRQ pin driver for SMSC
ARM: shmobile: lager: support GPIO switches
ARM: shmobile: lager: Add GPIO LEDs
ARM: shmobile: bockw: add dummy regulators for SMSC
ARM: shmobile: bockw: add CN9 SCIF/RCAN selection dipswitch explanation
ARM: shmobile: kzm9g: add AS3711 PMIC platform data
ARM: shmobile: kzm9d: resigser smsc911x platform device with id -1
ARM: shmobile: bockw: define FPGA address and rename iomem variable
ARM: shmobile: ape6evm: MP clock parent become EXTAL2
* tag 'renesas-defconfig-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g: enable AS3711 PMIC in defconfig
ARM: shmobile: bockw: enable USB in defconfig
ARM: shmobile: bockw: enable CONFIG_PM_RUNTIME in defconfig
ARM: shmobile: bockw: enable I2C in defconfig
ARM: shmobile: bockw: enable SDHI on defconfig
ARM: shmobile: armadillo800eva: Fix maximum number of SCIF
Simon Horman [Thu, 18 Apr 2013 12:21:09 +0000 (21:21 +0900)]
ARM: shmobile: marzen: Use INTC External IRQ pin driver for SMSC
Update the marzen board to use the INTC External IRQ pin driver for SMSC.
This code was originally posted by Magnus Damm as part of
"ARM: shmobile: INTC External IRQ pin driver on r8a7779"
but somehow omitted when I applied that patch.
Cc: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: bockw: add dummy regulators for SMSC
SMSC driver will try to get regulator if .config had CONFIG_REGULATOR,
and, shmobile_defconfig has it.
SMSC driver on Bock-W board will be failed if it doens't have
dummy regulator settings.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Debug serial (= SCIF0) is connected to CN9 upper side,
and it is shared by RCAN.
This patch adds SCIF/RCAN dipswitch explanation on
comment area for developers.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: kzm9g: add AS3711 PMIC platform data
KZM9G uses an AS3711 PMIC to supply power to the CPU and the LCD backlight.
The PMIC on the board is pre-programmed to supply correct voltages to the
CPU, power supply to the backlight has to be turned on at run-time. The
latter is currently performed by a hard-coded I2C command sequence in the
board file. This patch removes the backlight hack and instead adds an I2C
device to instantiate the AS3711 MFD driver, which will add a regulator
device to dynamically adjust CPU voltages and a backlight device.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Thu, 4 Apr 2013 02:20:33 +0000 (11:20 +0900)]
ARM: shmobile: kzm9d: resigser smsc911x platform device with id -1
As the kzm9d only has one smsc911x device it
may be registered as a platform device with id -1.
This allows the kzm9d board to access the smsc911x device
when CONFIG_REGULATOR (and CONFIG_REGULATOR_FIXED_VOLTAGE)
are set. The motivation for which is twofold: using regulators
seems to be generally a good thing; it will move the kzm9d defconfig
one step closer to being able to be consolidated with other
shmobile defconfigs.
An alternate but so far untested approach would be to
update the definition of dummy_supplies in board-kzm9d.c
to use "smsc911x.0" instead of "smsc911x".
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: ape6evm: MP clock parent become EXTAL2
The orignal commit 3263e09d287fbaa8a9424b5e69396599a3bbd518
(ARM: shmobile: Initial r8a73a4 SoC support V3)
put MP clock parent as EXTAL2, but its code was removed
on DIV6 clock support commit.
This patch makes it consistent.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate
According to the datasheet, it is not allowed to change div4 clock rates
if an earlier rate change operation is still in progress, as indicated by
a set kick bit.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
An earlier commit "ARM: shmobile: sh73a0: add support for adjusting CPU
frequency" intended to replace some clock operations only for the Z-clock,
instead it replaced them for all div4 clocks, since all div4 clocks share
the same copy of clock operations. Fix this by using a separate clock
operations structure for Z-clock.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Magnus Damm [Wed, 22 May 2013 06:04:14 +0000 (15:04 +0900)]
ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
Break out the function sh73a0_init_delay() that now
gets called both for the C version of the code and
the DT -reference boards. This way we handle both
cases in the same way.
Allows us to boot with TWD only in the kernel configuration
for C board code. TWD is not yet enabled in the case of
DT -reference - this due to a dependency on CCF.
Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch enables the use of the generic cpufreq-cpu0 driver on sh73a0.
Providing a regulator, a list of OPPs in DT, combined with a virtual
cpufreq-cpu0 platform device and a clock, attached to it is everything,
the cpufreq-cpu0 driver needs. The first sh73a0 platform, implementing
such CPUFreq support is kzm9g-reference.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: sh73a0: add support for adjusting CPU frequency
On SH73A0 the output of PLL0 is supplied to two dividers, feeding clock to
the CPU core and SGX. Lower CPU frequencies allow the use of lower supply
voltages and thus reduce power consumption.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7790: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Almost all clock needs main clock which is basis clock on r8a7790.
This patch adds it, and, set its parent/ratio via MD pin.
It is based on v0.05 datasheet
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
R-Car M1 has many clocks, and it is possible to
read/use clock ratio of these clocks from FRQMRx.
But, these ratio are fixed value and
these are decided by MD pin status.
This patch reads MD pin status,
and used fixed ratio clock for other clocks.
It was tesed on bock-w board.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Tue, 23 Apr 2013 02:27:15 +0000 (02:27 +0000)]
ARM: shmobile: sh73a0: Use DEFINE_RES_MEM*() everywhere
Convert code to use DEFINE_RES_MEM*() macros.
These macros were already used in this file,
this change makes their usage consistent throughout the file.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
ARM: shmobile: r8a7740: Make private clock arrays static
Both clock-r8a7740.c and clock-r8a7790.c define a div4_clks array as
non-static. Compiling support for both SoCs thus result in a symbol
redefinition. Fix it by defining the arrays as static.
To avoid further similar issues, also define the main_clks as static.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Simon Horman [Mon, 13 May 2013 08:53:52 +0000 (17:53 +0900)]
ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
"gpio-rcar: Support IRQ_TYPE_EDGE_BOTH" adds support to the R-Car GPIO
driver for IRQ_TYPE_EDGE_BOTH. As hardware support for this feature is
not universal for all SoCs a flag, has_both_edge_trigger, has been
added to the platform data of the driver to allow this feature to be
enabled.
As the r8a7790 SoC hardware supports this feature enable it.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The list of functions selected by the MOD_SEL2 register was missing
an entry. This caused all entries after this to modify the MOD_SEL2
register incorrectly.
This bug showed up when selecting i2c2_c pins on the Renesas Hurricane board.
This bug has been present since pinmux support was added for the
r8a7779 SoC by 881023d28b465eb457067dc8bbca0f24d8b34279 ("sh-pfc: Add
r8a7779 pinmux support") in v3.8-rc4.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add VIN DATA[0:8]/CLK/HSYNC/VSYNC pin groups to R8A7778 PFC driver.
While at it, add SH_PFC_MUX8() macro for 8-bit data busses.
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
[Sergei: updated the copyrights, added SH_PFC_MUX8() macro for 8-bit data bus,
made use of SH_PFC_*() macros to define the pin groups.] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The sh73a0 has an internal power gate on the VCCQ power supply for the
SDHI0 device that is controlled (for some strange reason) by a bit in a
PFC register. This feature should be exposed as a regulator.
As the same register is also used for pin control purposes there is no
way to achieve atomic read/write sequences with a separate regulator
driver. We thus need to implement the regulator here.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
sh-pfc: r8a7740: Replace GPIO_PORTx enum with GPIO port numbers
The PFC GPIO API implementation moved to using port numbers. Replace all
GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx
enum values are identical to the port number on this platform.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Vladimir Barinov [Tue, 16 Apr 2013 23:03:45 +0000 (03:03 +0400)]
ARM: shmobile: bockw: enable CONFIG_PM_RUNTIME in defconfig
Enable CONFIG_PM_RUNTIME in 'bockw_defconfig' -- it's already used by TMU, SCI,
I2C, and Ether drivers to control the clocks...
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>