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5 years agodrm/i915: Pick the first mode from EDID as the fixed mode when there is no preferred...
Ville Syrjälä [Thu, 21 Mar 2019 13:24:42 +0000 (15:24 +0200)]
drm/i915: Pick the first mode from EDID as the fixed mode when there is no preferred mode

Some monitors apparently forget to mark any mode as preferred in the
EDID. In this particular case we have a very generic looking ID
"PNP Model 0 Serial Number 4" / "LVDS 800x600" so a specific quirk
doesn't seem particularly wise. Also the quirk we have
(EDID_QUIRK_FIRST_DETAILED_PREFERRED) is actually defunct so we'd
have to fix it first.

When there is no preferred mode we currently fall back to the VBT.
That approach fails us here as the VBT mode is 1024x768 whereas
the panel resolution is 800x600. So instead of falling back to the
VBT when there is no preferred mode let's just pick the first
probed mode. Only if the EDID provided no modes we fall back to
the VBT.

For this machine the VBIOS would appear to select the 800x600
60Hz EST mode rather than the first detailed mode (which is
the new fallback will pick). The two modes differ only by
having opposite sync polarities, which does not seem to matter
to the panel in question.

v2: Make sure the probed_modes list is not empty

Cc: Adam Jackson <ajax@redhat.com>
Cc: Roberto Viola <cagnulein@gmail.com>
Tested-by: Roberto Viola <cagnulein@gmail.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109780
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321132446.22394-2-ville.syrjala@linux.intel.com
Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
5 years agodrm/i915: Refactor EDID fixed mode search
Ville Syrjälä [Thu, 21 Mar 2019 13:24:41 +0000 (15:24 +0200)]
drm/i915: Refactor EDID fixed mode search

Both LVDS and eDP have the same code to look up the preferred mode
from the connector probed_modes list. Move the code to a common
location.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321132446.22394-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Jani Nikula <jani.nikula@intel.com>
5 years agodrm/i915: Really calculate the cursor ddb based on the highest enabled wm level
Ville Syrjälä [Thu, 21 Mar 2019 17:51:28 +0000 (19:51 +0200)]
drm/i915: Really calculate the cursor ddb based on the highest enabled wm level

I added the loop but neglected to actually pass the level to the
function. So we were just looping 8 times calculating the exact
same thing every time.

Fixes: df331de3f8aa ("drm/i915: Allocate enough DDB for the cursor")
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321175128.32178-1-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
5 years agodrm/i915: Allow contexts to share a single timeline across all engines
Chris Wilson [Fri, 22 Mar 2019 09:23:25 +0000 (09:23 +0000)]
drm/i915: Allow contexts to share a single timeline across all engines

Previously, our view has been always to run the engines independently
within a context. (Multiple engines happened before we had contexts and
timelines, so they always operated independently and that behaviour
persisted into contexts.) However, at the user level the context often
represents a single timeline (e.g. GL contexts) and userspace must
ensure that the individual engines are serialised to present that
ordering to the client (or forgot about this detail entirely and hope no
one notices - a fair ploy if the client can only directly control one
engine themselves ;)

In the next patch, we will want to construct a set of engines that
operate as one, that have a single timeline interwoven between them, to
present a single virtual engine to the user. (They submit to the virtual
engine, then we decide which engine to execute on based.)

To that end, we want to be able to create contexts which have a single
timeline (fence context) shared between all engines, rather than multiple
timelines.

v2: Move the specialised timeline ordering to its own function.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190322092325.5883-4-chris@chris-wilson.co.uk
5 years agodrm/i915: Extend CONTEXT_CREATE to set parameters upon construction
Chris Wilson [Fri, 22 Mar 2019 09:23:24 +0000 (09:23 +0000)]
drm/i915: Extend CONTEXT_CREATE to set parameters upon construction

It can be useful to have a single ioctl to create a context with all
the initial parameters instead of a series of create + setparam + setparam
ioctls. This extension to create context allows any of the parameters
to be passed in as a linked list to be applied to the newly constructed
context.

v2: Make a local copy of user setparam (Tvrtko)
v3: Use flags to detect availability of extension interface

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190322092325.5883-3-chris@chris-wilson.co.uk
5 years agodrm/i915: Create/destroy VM (ppGTT) for use with contexts
Chris Wilson [Fri, 22 Mar 2019 09:23:23 +0000 (09:23 +0000)]
drm/i915: Create/destroy VM (ppGTT) for use with contexts

In preparation to making the ppGTT binding for a context explicit (to
facilitate reusing the same ppGTT between different contexts), allow the
user to create and destroy named ppGTT.

v2: Replace global barrier for swapping over the ppgtt and tlbs with a
local context barrier (Tvrtko)
v3: serialise with struct_mutex; it's lazy but required dammit
v4: Rewrite igt_ctx_shared_exec to be more different (aimed to be more
similarly, turned out different!)

v5: Fix up test unwind for aliasing-ppgtt (snb)
v6: Tighten language for uapi struct drm_i915_gem_vm_control.
v7: Patch the context image for runtime ppgtt switching!

Testcase: igt/gem_vm_create
Testcase: igt/gem_ctx_param/vm
Testcase: igt/gem_ctx_clone/vm
Testcase: igt/gem_ctx_shared
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190322092325.5883-2-chris@chris-wilson.co.uk
5 years agodrm/i915: Introduce the i915_user_extension_method
Chris Wilson [Fri, 22 Mar 2019 09:23:22 +0000 (09:23 +0000)]
drm/i915: Introduce the i915_user_extension_method

An idea for extending uABI inspired by Vulkan's extension chains.
Instead of expanding the data struct for each ioctl every time we need
to add a new feature, define an extension chain instead. As we add
optional interfaces to control the ioctl, we define a new extension
struct that can be linked into the ioctl data only when required by the
user. The key advantage being able to ignore large control structs for
optional interfaces/extensions, while being able to process them in a
consistent manner.

In comparison to other extensible ioctls, the key difference is the
use of a linked chain of extension structs vs an array of tagged
pointers. For example,

struct drm_amdgpu_cs_chunk {
        __u32           chunk_id;
        __u32           length_dw;
        __u64           chunk_data;
};

struct drm_amdgpu_cs_in {
        __u32           ctx_id;
        __u32           bo_list_handle;
        __u32           num_chunks;
        __u32           _pad;
        __u64           chunks;
};

allows userspace to pass in array of pointers to extension structs, but
must therefore keep constructing that array along side the command stream.
In dynamic situations like that, a linked list is preferred and does not
similar from extra cache line misses as the extension structs themselves
must still be loaded separate to the chunks array.

v2: Apply the tail call optimisation directly to nip the worry of stack
overflow in the bud.
v3: Defend against recursion.
v4: Fixup local types to match new uabi

Opens:
- do we include the result as an out-field in each chain?
struct i915_user_extension {
__u64 next_extension;
__u64 name;
__s32 result;
__u32 mbz; /* reserved for future use */
};
* Undecided, so provision some room for future expansion.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190322092325.5883-1-chris@chris-wilson.co.uk
5 years agodrm/i915/guc: GuC suspend path cleanup
Sujaritha Sundaresan [Thu, 21 Mar 2019 20:38:04 +0000 (13:38 -0700)]
drm/i915/guc: GuC suspend path cleanup

Adding a call to intel_uc_suspend in i915_gem_suspend, which
is a common point for the suspend/resume and hibernate paths.
This fixes an unbalanced call that causes issues with the CTB
register/deregister.

v2: Making the call unconditional (Daniele)
Moving the call to after the GEM_BUG_ON (Chris)

Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Signed-off-by: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321203804.6845-1-sujaritha.sundaresan@intel.com
5 years agodrm/i915/selftests: Mark up preemption tests for hang detection
Chris Wilson [Thu, 21 Mar 2019 19:40:31 +0000 (19:40 +0000)]
drm/i915/selftests: Mark up preemption tests for hang detection

Use the igt_live_test framework for detecting whether an unwanted hang
occurred during test execution, and report failure if it does.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321194031.20240-2-chris@chris-wilson.co.uk
5 years agodrm/i915/selftests: Calculate maximum ring size for preemption chain
Chris Wilson [Thu, 21 Mar 2019 19:40:30 +0000 (19:40 +0000)]
drm/i915/selftests: Calculate maximum ring size for preemption chain

32 is too many for the likes of kbl, and in order to insert that many
requests into the ring requires us to declare the first few hung --
understandably a slow and unexpected process. Instead, measure the size
of a singe requests and use that to estimate the upper bound on the
chain length we can use for our test, remembering to flush the previous
chain between tests for safety.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: "Yokoyama, Caz" <caz.yokoyama@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321194031.20240-1-chris@chris-wilson.co.uk
5 years agodrm/i915: Skip object locking around a no-op set-domain ioctl
Chris Wilson [Thu, 21 Mar 2019 16:19:08 +0000 (16:19 +0000)]
drm/i915: Skip object locking around a no-op set-domain ioctl

If we are already in the desired write domain of a set-domain ioctl,
then there is nothing for us to do and we can quickly return back to
userspace, avoiding any lock contention. By recognising that the
write_domain is always a subset of the read_domains, and excluding the
no-op case of requiring 0 read_domains in the ioctl, we can infer if the
current write_domain matches the target read_domains, there is nothing
for us to do.

Secondary aspect of this is that we undo the arbitrary fetching and
potential flushing of all pages for a set-domain(.write=CPU) call on a
fresh object -- which was introduced simply because we do the get-pages
before taking the struct_mutex.

References: 40e62d5d6be8 ("drm/i915: Acquire the backing storage outside of struct_mutex in set-domain")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321161908.8007-2-chris@chris-wilson.co.uk
5 years agodrm/i915: Flush pages on acquisition
Chris Wilson [Thu, 21 Mar 2019 16:19:07 +0000 (16:19 +0000)]
drm/i915: Flush pages on acquisition

When we return pages to the system, we ensure that they are marked as
being in the CPU domain since any external access is uncontrolled and we
must assume the worst. This means that we need to always flush the pages
on acquisition if we need to use them on the GPU, and from the beginning
have used set-domain. Set-domain is overkill for the purpose as it is a
general synchronisation barrier, but our intent is to only flush the
pages being swapped in. If we move that flush into the pages acquisition
phase, we know then that when we have obj->mm.pages, they are coherent
with the GPU and need only maintain that status without resorting to
heavy handed use of set-domain.

The principle knock-on effect for userspace is through mmap-gtt
pagefaulting. Our uAPI has always implied that the GTT mmap was async
(especially as when any pagefault occurs is unpredicatable to userspace)
and so userspace had to apply explicit domain control itself
(set-domain). However, swapping is transparent to the kernel, and so on
first fault we need to acquire the pages and make them coherent for
access through the GTT. Our use of set-domain here leaks into the uABI
that the first pagefault was synchronous. This is unintentional and
baring a few igt should be unoticed, nevertheless we bump the uABI
version for mmap-gtt to reflect the change in behaviour.

Another implication of the change is that gem_create() is presumed to
create an object that is coherent with the CPU and is in the CPU write
domain, so a set-domain(CPU) following a gem_create() would be a minor
operation that merely checked whether we could allocate all pages for
the object. On applying this change, a set-domain(CPU) causes a clflush
as we acquire the pages. This will have a small impact on mesa as we move
the clflush here on !llc from execbuf time to create, but that should
have minimal performance impact as the same clflush exists but is now
done early and because of the clflush issue, userspace recycles bo and
so should resist allocating fresh objects.

Internally, the presumption that objects are created in the CPU
write-domain and remain so through writes to obj->mm.mapping is more
prevalent than I expected; but easy enough to catch and apply a manual
flush.

For the future, we should push the page flush from the central
set_pages() into the callers so that we can more finely control when it
is applied, but for now doing it one location is easier to validate, at
the cost of sometimes flushing when there is no need.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.william.auld@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321161908.8007-1-chris@chris-wilson.co.uk
5 years agodrm/i915: Stop storing the context name as the timeline name
Chris Wilson [Thu, 21 Mar 2019 14:07:11 +0000 (14:07 +0000)]
drm/i915: Stop storing the context name as the timeline name

The timeline->name is only used for convenience in pretty printing the
i915_request.fence->ops->get_timeline_name() and it is just as
convenient to pull it from the gem_context directly. The few instances
of its use inside GEM_TRACE() has proven more of a nuisance than
helpful, so not worth saving imo.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321140711.11190-4-chris@chris-wilson.co.uk
5 years agodrm/i915: Stop storing ctx->user_handle
Chris Wilson [Thu, 21 Mar 2019 14:07:10 +0000 (14:07 +0000)]
drm/i915: Stop storing ctx->user_handle

The user_handle need only be known by userspace for it to lookup the
context via the idr; internally we have no use for it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321140711.11190-3-chris@chris-wilson.co.uk
5 years agodrm/i915: Introduce a mutex for file_priv->context_idr
Chris Wilson [Thu, 21 Mar 2019 14:07:09 +0000 (14:07 +0000)]
drm/i915: Introduce a mutex for file_priv->context_idr

Define a mutex for the exclusive use of interacting with the per-file
context-idr, that was previously guarded by struct_mutex. This allows us
to reduce the coverage of struct_mutex, with a view to removing the last
bits coordinating GEM context later. (In the short term, we avoid taking
struct_mutex while using the extended constructor functions, preventing
some nasty recursion.)

v2: s/context_lock/context_idr_lock/

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321140711.11190-2-chris@chris-wilson.co.uk
5 years agodrm/i915: Separate GEM context construction and registration to userspace
Chris Wilson [Thu, 21 Mar 2019 14:07:08 +0000 (14:07 +0000)]
drm/i915: Separate GEM context construction and registration to userspace

In later patches, it became apparent that userspace can see a partially
constructed GEM context and begin using it before it was ready, to much
hilarity. Close this window of opportunity by lifting the registration of
the context with userspace (the insertion of the context into the filp's
idr) to the very end of the CONTEXT_CREATE ioctl.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321140711.11190-1-chris@chris-wilson.co.uk
5 years agodrm/i915/selftests: fix NULL vs IS_ERR() check in mock_context_barrier()
Dan Carpenter [Thu, 21 Mar 2019 09:24:51 +0000 (12:24 +0300)]
drm/i915/selftests: fix NULL vs IS_ERR() check in mock_context_barrier()

The mock_context() function returns NULL on error, it doesn't return
error pointers.

Fixes: 85fddf0b0027 ("drm/i915: Introduce a context barrier callback")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190321092451.GK2202@kadam
5 years agodrm/i915: Use __is_constexpr()
Chris Wilson [Wed, 20 Mar 2019 15:40:21 +0000 (15:40 +0000)]
drm/i915: Use __is_constexpr()

gcc-4.8 and older dislike the use of __builtin_constant_p() within a
constant expression context, and so we must use the magical
__is_constexpr() instead.

For example, with gcc-4.8.5:
../drivers/gpu/drm/i915/i915_reg.h:167:27: error: first argument to ‘__builtin_choose_expr’ not a constant
../include/linux/build_bug.h:16:45: error: bit-field ‘<anonymous>’ width not an integer constant

Reported-by: Randy Dunlap <rdunlap@infradead.org>
Reported-by: Uma Shankar <uma.shankar@intel.com>
Fixes: baa09e7d2f42 ("drm/i915: use REG_FIELD_PREP() to define register bitfield values")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Randy Dunlap <rdunlap@infradead.org>
Acked-by: Randy Dunlap <rdunlap@infradead.org> # build-tested
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190320154021.5244-1-chris@chris-wilson.co.uk
5 years agodrm/i915: make raw access function work on uncore
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:41 +0000 (11:35 -0700)]
drm/i915: make raw access function work on uncore

This allows us to ditch i915 in some more places.

v2: use local var in check_vgpu (Paulo)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-9-daniele.ceraolospurio@intel.com
5 years agodrm/i915: move regs pointer inside the uncore structure
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:40 +0000 (11:35 -0700)]
drm/i915: move regs pointer inside the uncore structure

This will allow futher simplifications in the uncore handling.

v2: move register access setup under uncore (Chris)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-8-daniele.ceraolospurio@intel.com
5 years agodrm/i915: reduce the dev_priv->uncore dance in uncore.c
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:39 +0000 (11:35 -0700)]
drm/i915: reduce the dev_priv->uncore dance in uncore.c

Use a local variable where it makes sense.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-7-daniele.ceraolospurio@intel.com
5 years agodrm/i915: make find_fw_domain work on intel_uncore
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:38 +0000 (11:35 -0700)]
drm/i915: make find_fw_domain work on intel_uncore

Remove unneeded usage of dev_priv from 1 extra function.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-6-daniele.ceraolospurio@intel.com
5 years agodrm/i915: make more uncore function work on intel_uncore
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:37 +0000 (11:35 -0700)]
drm/i915: make more uncore function work on intel_uncore

Move the init, fini, prune, suspend, resume function to work on
intel_uncore instead of dev_priv.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-5-daniele.ceraolospurio@intel.com
5 years agodrm/i915: use intel_uncore for all forcewake get/put
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:36 +0000 (11:35 -0700)]
drm/i915: use intel_uncore for all forcewake get/put

Now that the internal code all works on intel_uncore, flip the
external-facing interface.

v2: fix GVT.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-4-daniele.ceraolospurio@intel.com
5 years agodrm/i915: use intel_uncore in fw get/put internal paths
Daniele Ceraolo Spurio [Tue, 19 Mar 2019 18:35:35 +0000 (11:35 -0700)]
drm/i915: use intel_uncore in fw get/put internal paths

Get/put functions used outside of uncore.c are updated in the next
patch for a nicer split.

v2: use dev_priv where we still have it (Paulo)

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319183543.13679-3-daniele.ceraolospurio@intel.com
5 years agodrm/i915: always use masks on FW regs
Daniele Ceraolo Spurio [Wed, 20 Mar 2019 12:27:32 +0000 (12:27 +0000)]
drm/i915: always use masks on FW regs

Upper bits are reserved on gen6, so no issue if we write them. Note that
we're already doing this in the non-MT case of IVB, which uses the same
register.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190320122732.14512-1-chris@chris-wilson.co.uk
5 years agodrm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro
Manasi Navare [Tue, 19 Mar 2019 22:18:47 +0000 (15:18 -0700)]
drm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro

This patch fixes the PORT_SYNC_MODE_MASTER_SELECT macro
to correctly do the left shifting to set the port sync
master select correctly.
I have tested this fix on ICL.

Fixes: 49edbd49786e ("drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers")
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: <stable@vger.kernel.org> # v5.0+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319221847.21311-1-manasi.d.navare@intel.com
5 years agodrm/i915: Switch to bitmap_zalloc()
Andy Shevchenko [Mon, 4 Mar 2019 09:29:08 +0000 (11:29 +0200)]
drm/i915: Switch to bitmap_zalloc()

Switch to bitmap_zalloc() to show clearly what we are allocating.
Besides that it returns pointer of bitmap type instead of opaque void *.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190304092908.57382-2-andriy.shevchenko@linux.intel.com
5 years agodrm/i915: Inline skl_update_pipe_wm() into its only caller
Ville Syrjälä [Tue, 12 Mar 2019 20:58:44 +0000 (22:58 +0200)]
drm/i915: Inline skl_update_pipe_wm() into its only caller

skl_update_pipe_wm() is quite pointless now. Just inline it into
skl_compute_wm().

v2: s/skl_build_pipe_wm/skl_update_pipe_wm/ in the commit message (Matt)

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-10-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Don't pass pipe_wm around so much
Ville Syrjälä [Tue, 12 Mar 2019 20:58:43 +0000 (22:58 +0200)]
drm/i915: Don't pass pipe_wm around so much

{skl,icl}_build_plane_wm() don't need to be passed the pipe_wm, so
don't. And skl_build_pipe_wm() can easily dig it out itself.

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-9-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Move some variables to tighter scope
Ville Syrjälä [Tue, 12 Mar 2019 20:58:42 +0000 (22:58 +0200)]
drm/i915: Move some variables to tighter scope

Clean up skl_allocate_pipe_ddb() a bit by moving the 'wm' variable
to tighter scope. We'll also consitify it where appropriate.

Also initialize plane_alloc/uv_plane_alloc when decrlaring them
rather than later.

v2: Update commit message (Matt)

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-8-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Keep plane watermarks enabled more aggressively
Ville Syrjälä [Tue, 12 Mar 2019 20:58:41 +0000 (22:58 +0200)]
drm/i915: Keep plane watermarks enabled more aggressively

Currently we disable all the watermarks above the selected max
level for every plane. That would mean that the cursor's watermarks
may also get modified when another plane causes the selected
max watermark level to change. That is not so great as we would
like to keep the cursor as indepenedent as possible to avoid
having to throttle it in resposne to other plane activity.

To avoid that let's keep the watermarks enabled even for levels
above the max selected watermark level, iff the plane has enough
ddb for that particular level. This way the cursor's enabled
watermarks only depend on the cursor itself. This is safe because
the hardware will never choose to use a watermark level unless
all enabled planes have also enabled that level.

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-7-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Make sure cursor has enough ddb for the selected wm level
Ville Syrjälä [Tue, 12 Mar 2019 20:58:40 +0000 (22:58 +0200)]
drm/i915: Make sure cursor has enough ddb for the selected wm level

We use a fixed ddb allocation for the cursor. Now the calculation
actually makes sure we have enough ddb space, but let's double check
anyway.

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-6-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Allocate enough DDB for the cursor
Ville Syrjälä [Tue, 19 Mar 2019 16:03:11 +0000 (18:03 +0200)]
drm/i915: Allocate enough DDB for the cursor

Currently we just assume that 32 or 8 blocks of ddb is sufficient
for the cursor. The 32 might be, but the 8 is certainly not. The
minimum we need is at least what level 0 watermarks need, but that
is a bit restrictive, so instead let's calculate what level 7
would need for a 256x256 cursor. We'll use that to determine the
fixed ddb allocation for the cursor. This way the cursor will never
be responsible for missing out on deeper power saving states.

v2: Loop to make sure this works even if some wm levels are
    totally disabled (latency==0)

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com> #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20190319160311.23529-1-ville.syrjala@linux.intel.com
5 years agodrm/i915: Extract skl_compute_wm_params()
Ville Syrjälä [Tue, 12 Mar 2019 20:58:38 +0000 (22:58 +0200)]
drm/i915: Extract skl_compute_wm_params()

Extract the meat of skl_compute_plane_wm_params() into a lower
level helper that doesn't depend on the plane state. We'll
reuse this for the cursor ddb allocation calculations.

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-4-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Don't pass plane state to skl_compute_plane_wm()
Ville Syrjälä [Tue, 12 Mar 2019 20:58:37 +0000 (22:58 +0200)]
drm/i915: Don't pass plane state to skl_compute_plane_wm()

skl_compute_plane_wm() doesn't actually need the plane state. While
it would make logically sense to pass it, we shall need to reuse
skl_compute_plane_wm() to compute the minimum ddb allocation for
the cursor before the cursor may be enabled. Thus we can't rely
on the plane state. The alternative would be to duplicate a lot of
the wm calculations for the cursor ddb allocation case, which doens't
appeal to me.

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-3-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Accept alloc_size == blocks
Ville Syrjälä [Tue, 12 Mar 2019 20:58:36 +0000 (22:58 +0200)]
drm/i915: Accept alloc_size == blocks

If the minimum required ddb space for all the planes equals the
total ddb space available we are allowed to use the relevant
watermark level.

Cc: Neel Desai <neel.desai@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190312205844.6339-2-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
5 years agodrm/i915: Use HPLLVCO_MOBILE for all PNVs
Ville Syrjälä [Mon, 18 Mar 2019 16:56:32 +0000 (18:56 +0200)]
drm/i915: Use HPLLVCO_MOBILE for all PNVs

To allow unsetting .is_mobile for the desktop variant
of PNV fix up the cdclk code to select the mobile HPLLVCO register
for both PNV variants.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318165633.28924-5-ville.syrjala@linux.intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
5 years agodrm/i915: Introduce i915_has_asle()
Ville Syrjälä [Mon, 18 Mar 2019 16:56:31 +0000 (18:56 +0200)]
drm/i915: Introduce i915_has_asle()

We want to allow the desktop PNV to not have .is_mobile set. To
that end let's add a small helper to determine if the platform
has the ASLE interrupt (or equivalent). Supposdely both PNV
variants have it.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318165633.28924-4-ville.syrjala@linux.intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
5 years agodrm/i915: Introduce i9xx_has_pps()
Ville Syrjälä [Mon, 18 Mar 2019 16:56:30 +0000 (18:56 +0200)]
drm/i915: Introduce i9xx_has_pps()

Add a small helper to determine if we have the panel power
sequencer or not. We'll make PNV an exceptional case so
that we can unset .is_mobile for the desktop variant.

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318165633.28924-3-ville.syrjala@linux.intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
5 years agodrm/i915: Introduce i9xx_has_pfit()
Ville Syrjälä [Tue, 19 Mar 2019 14:23:29 +0000 (16:23 +0200)]
drm/i915: Introduce i9xx_has_pfit()

Make the code self-documenting by introducing i9xx_has_pfit().
Also make PNV an exceptional case so that we can unset
.is_mobile for the desktop variant.

v2: s/gen4/gen>=4/ (Tvrtko)

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319142329.22881-1-ville.syrjala@linux.intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
5 years agodrm/i915: Reorder gen3/4 swizzle detection logic
Ville Syrjälä [Mon, 18 Mar 2019 16:56:28 +0000 (18:56 +0200)]
drm/i915: Reorder gen3/4 swizzle detection logic

g33/i964g/g45 are the exceptional cases when it comes to
the swizzle detection. Let's reorder the code to handle
them first and let everything else be handled by the
else branch. This allows us to unset .is_mobile for the
desktop PNV variant (which supposedly must follow the
"mobile" path here).

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318165633.28924-1-ville.syrjala@linux.intel.com
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
5 years agodrm/i915/selftests: add test to verify get/put fw domains
Daniele Ceraolo Spurio [Wed, 20 Mar 2019 08:00:52 +0000 (08:00 +0000)]
drm/i915/selftests: add test to verify get/put fw domains

Exercise acquiring and releasing forcewake around register reads. In
order to read a register behind a GT powerwell, we need to instruct that
powerwell to wake up using a forcewake. When we no longer require the GT
powerwell, we tell the GT to release our forcewake. Inside the
forcewake, the register read should work but outside it should just
return garbage, 0 being the most common garbage. Thus we can detect when
we are inside and outside of the forcewake with just a simple register
read, and so can verify that the GT powerwell is released when we say
so.

v2: Picking the right forcewaked register to return 0 outside of
forcewake is an art.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190320080052.27273-1-chris@chris-wilson.co.uk
5 years agodrm/i915/selftests: Provide stub reset functions
Chris Wilson [Tue, 19 Mar 2019 21:42:33 +0000 (21:42 +0000)]
drm/i915/selftests: Provide stub reset functions

If a test fails, we quite often mark the device as wedged. Provide the
stub functions so that we can wedge the mock device, and avoid exploding
on test failures.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109981
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190319214233.25498-3-chris@chris-wilson.co.uk
5 years agodrm/i915: Update DRIVER_DATE to 20190320
Joonas Lahtinen [Wed, 20 Mar 2019 08:03:48 +0000 (10:03 +0200)]
drm/i915: Update DRIVER_DATE to 20190320

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
5 years agodrm/i915/cml: Introduce Comet Lake PCH
Anusha Srivatsa [Mon, 18 Mar 2019 20:01:33 +0000 (13:01 -0700)]
drm/i915/cml: Introduce Comet Lake PCH

Comet Lake PCH is based off of Cannon Point(CNP).
Add PCI ID for Comet Lake PCH.

v2: Code cleanup (DK)

v3: Comment cleanup (Jani)

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318200133.9666-2-anusha.srivatsa@intel.com
5 years agodrm/i915/cml: Add CML PCI IDS
Anusha Srivatsa [Mon, 18 Mar 2019 20:01:32 +0000 (13:01 -0700)]
drm/i915/cml: Add CML PCI IDS

Comet Lake is a Intel Processor containing Gen9
Intel HD Graphics. This patch adds the initial set of
PCI IDs. Comet Lake comes off of Coffee Lake - adding
the IDs to Coffee Lake ID list.

More support and features will be in the patches that follow.

v2: Split IDs according to GT. (Rodrigo)

v3: Update IDs.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318200133.9666-1-anusha.srivatsa@intel.com
5 years agodrm/i915: Fix PSR2 selective update corruption after PSR1 setup
José Roberto de Souza [Thu, 14 Mar 2019 23:01:13 +0000 (16:01 -0700)]
drm/i915: Fix PSR2 selective update corruption after PSR1 setup

There is probably a issue in DMC firmwares(icl_dmc_ver1_07.bin and
kbl_dmc_ver1_04.bin at least) that causes PSR2 SU to fail after
exiting DC6 if EDP_PSR_TP1_TP3_SEL is kept in PSR_CTL, so for now
lets workaround the issue by cleaning PSR_CTL before enable PSR2.

v2:
- Updated commit description and comment to state that it may be
a DMC firmware issue (Rodrigo)
- No need to RMW, let's write 0 to PSR_CTL(Dhinakaran)

Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314230113.6571-1-jose.souza@intel.com
5 years agodrm/i915: Pass dev_priv to intel_is_dual_link_lvds()
Ville Syrjälä [Mon, 18 Mar 2019 20:26:53 +0000 (22:26 +0200)]
drm/i915: Pass dev_priv to intel_is_dual_link_lvds()

Make things look a bit nicer by passing dev_priv to
intel_is_dual_link_lvds().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318202653.15217-3-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
5 years agodrm/i915: Polish intel_get_lvds_encoder()
Ville Syrjälä [Mon, 18 Mar 2019 20:26:52 +0000 (22:26 +0200)]
drm/i915: Polish intel_get_lvds_encoder()

Pass dev_priv to intel_get_lvds_encoder() and polish the
implementation a bit.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318202653.15217-2-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
5 years agodrm/i915: Add some missing curly braces
Ville Syrjälä [Mon, 18 Mar 2019 20:26:51 +0000 (22:26 +0200)]
drm/i915: Add some missing curly braces

Sprinkle some curly braces in accordance with the coding style.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318202653.15217-1-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
5 years agodrm/i915: Remove the fragile array index -> link rate mapping
Ville Syrjälä [Thu, 7 Feb 2019 17:32:30 +0000 (19:32 +0200)]
drm/i915: Remove the fragile array index -> link rate mapping

Rather than try to maintain some magic relationship between the link
rates and the index into the wrpll params array let's just store
the link rate in the array itself. Much less fragile.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-13-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Nuke icl_calc_dp_combo_pll_link()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:29 +0000 (19:32 +0200)]
drm/i915: Nuke icl_calc_dp_combo_pll_link()

We already have the code to calculate the WRPLL output clock from
the register values, but for some reason we're only using it for
HDMI and not DP. Throw out the inflexible DP DPLL table lookup and
just call the HDMI code which decodes the actual register values.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-12-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Fix readout for cnl DPLL kdiv==3
Ville Syrjälä [Thu, 7 Feb 2019 17:32:28 +0000 (19:32 +0200)]
drm/i915: Fix readout for cnl DPLL kdiv==3

The readout code thinks that kdiv of 3 is 4. Fix it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-11-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:27 +0000 (19:32 +0200)]
drm/i915: Remove redundant on stack dpll_hw_state from icl_get_dpll()

Just store the stuff directly into crtc_state->dpll_hw_state rather
than to a temp and copying the whole thing over.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-10-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Pass crtc_state down to icl dpll funcs
Ville Syrjälä [Thu, 7 Feb 2019 17:32:26 +0000 (19:32 +0200)]
drm/i915: Pass crtc_state down to icl dpll funcs

Simplify the calling convention of the dpll funcs by plumbing
the crtc state deeper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-9-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:25 +0000 (19:32 +0200)]
drm/i915: Remove redundant on stack dpll_hw_state from cnl_get_dpll()

Just store the stuff directly into crtc_state->dpll_hw_state rather
than to a temp and copying the whole thing over.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-8-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Pass crtc_state down to cnl dpll funcs
Ville Syrjälä [Thu, 7 Feb 2019 17:32:24 +0000 (19:32 +0200)]
drm/i915: Pass crtc_state down to cnl dpll funcs

Simplify the calling convention of the dpll funcs by plumbing
the crtc state deeper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-7-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:23 +0000 (19:32 +0200)]
drm/i915: Remove redundant on stack dpll_hw_state from bxt_get_dpll()

Just store the stuff directly into crtc_state->dpll_hw_state rather
than to a temp and copying the whole thing over.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-6-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Pass crtc_state down to bxt dpll funcs
Ville Syrjälä [Thu, 7 Feb 2019 17:32:22 +0000 (19:32 +0200)]
drm/i915: Pass crtc_state down to bxt dpll funcs

Simplify the calling convention of the dpll funcs by plumbing
the crtc state deeper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-5-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:21 +0000 (19:32 +0200)]
drm/i915: Remove redundant on stack dpll_hw_state from skl_get_dpll()

Just store the stuff directly into crtc_state->dpll_hw_state rather
than to a temp and copying the whole thing over.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-4-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Pass crtc_state down to skl dpll funcs
Ville Syrjälä [Thu, 7 Feb 2019 17:32:20 +0000 (19:32 +0200)]
drm/i915: Pass crtc_state down to skl dpll funcs

Simplify the calling convention of the skl dpll funcs by plumbing
the crtc state deeper.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-3-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:19 +0000 (19:32 +0200)]
drm/i915: Don't pass crtc to intel_get_shared_dpll() and .get_dpll()

Passing both crtc and its state is redundant. Pass just the state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-2-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Don't pass crtc to intel_find_shared_dpll()
Ville Syrjälä [Thu, 7 Feb 2019 17:32:18 +0000 (19:32 +0200)]
drm/i915: Don't pass crtc to intel_find_shared_dpll()

Passing both crtc and its state is redundant. Pass just the state.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190207173230.22368-1-ville.syrjala@linux.intel.com
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
5 years agodrm/i915: Hold a reference to the active HW context
Chris Wilson [Mon, 18 Mar 2019 21:23:47 +0000 (21:23 +0000)]
drm/i915: Hold a reference to the active HW context

For virtual engines, we need to keep the HW context alive while it
remains in use. For regular HW contexts, they are created and kept alive
until the end of the GEM context. For simplicity, generalise the
requirements and keep an active reference to each HW context.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318212347.30146-2-chris@chris-wilson.co.uk
5 years agodrm/i915: Lock the gem_context->active_list while dropping the link
Chris Wilson [Mon, 18 Mar 2019 21:23:46 +0000 (21:23 +0000)]
drm/i915: Lock the gem_context->active_list while dropping the link

On unpinning the intel_context, we remove it from the active list
inside the GEM context. This list is supposed to be guarded by the GEM
context mutex, so remember to take it!

Fixes: 7e3d9a59410d ("drm/i915: Track active engines within a context")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318212347.30146-1-chris@chris-wilson.co.uk
5 years agodrm/i915/psr: remove drmP.h include that crept in
Jani Nikula [Mon, 18 Mar 2019 16:04:09 +0000 (18:04 +0200)]
drm/i915/psr: remove drmP.h include that crept in

We've been free of deprecated drmP.h includes for a while, but one crept
in. Fend it off.

Cc: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318160409.27648-1-jani.nikula@intel.com
5 years agodrm/i915: stick to kernel fixed size types
Jani Nikula [Mon, 18 Mar 2019 16:00:19 +0000 (18:00 +0200)]
drm/i915: stick to kernel fixed size types

We no longer allow mixed C99 and kernel types, and the preference is to
use kernel types exclusively. Fix the C99 types that have crept in since
the mass conversion. No functional changes.

Cc: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Cc: Kevin Strasser <kevin.strasser@intel.com>
Cc: Ramalingam C <ramalingam.c@intel.com>
Cc: Swati Sharma <swati2.sharma@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318160019.9309-1-jani.nikula@intel.com
5 years agodrm/i915: Hold a ref to the ring while retiring
Chris Wilson [Mon, 18 Mar 2019 09:51:46 +0000 (09:51 +0000)]
drm/i915: Hold a ref to the ring while retiring

As the final request on a ring may hold the reference to this ring (via
retiring the last pinned context), we may find ourselves chasing a
dangling pointer on completion of the list.

A quick solution is to hold a reference to the ring itself as we retire
along it so that we only free it after we stop dereferencing it.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318095204.9913-4-chris@chris-wilson.co.uk
5 years agodrm/i915: Switch to use HWS indices rather than addresses
Chris Wilson [Mon, 18 Mar 2019 09:51:51 +0000 (09:51 +0000)]
drm/i915: Switch to use HWS indices rather than addresses

If we use the STORE_DATA_INDEX function we can use a fixed offset and
avoid having to lookup up the engine HWS address. A step closer to being
able to emit the final breadcrumb during request_add rather than later
in the submission interrupt handler.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318095204.9913-9-chris@chris-wilson.co.uk
5 years agodrm/i915: Turn off the CUS when turning off a HDR plane
Ville Syrjälä [Fri, 15 Mar 2019 19:54:45 +0000 (21:54 +0200)]
drm/i915: Turn off the CUS when turning off a HDR plane

We're currently leaving the CUS enabled if we disable the
master plane directly after scanning out NV12.

Could perhaps cause the selected slave plane to misbehave
if we try to use it for scanning out something non-NV12?

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190315195445.26527-2-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110032

5 years agodrm/i915: Fix legacy gamma mode for ICL
Ville Syrjälä [Fri, 15 Mar 2019 19:54:44 +0000 (21:54 +0200)]
drm/i915: Fix legacy gamma mode for ICL

We must remember to actually enable the post CSC gamma if
we expect the legacy LUT to work. Seems to fix NV12 crc
tests on the SDR planes. Curiously we apparently managed to
get 100% match for the HDR planes even without chopping
off the low bits.

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190315195445.26527-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
5 years agoMerge tag 'topic/hdr-formats-2019-03-13' of git://anongit.freedesktop.org/drm/drm...
Joonas Lahtinen [Mon, 18 Mar 2019 15:12:06 +0000 (17:12 +0200)]
Merge tag 'topic/hdr-formats-2019-03-13' of git://anongit.freedesktop.org/drm/drm-misc into drm-intel-next-queued

Add support for floating point half-width formats.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/00b96cd5-91c7-5677-9620-b138c7a92303@linux.intel.com
5 years agodrm/i915: use REG_FIELD_PREP() to define register bitfield values
Jani Nikula [Fri, 15 Mar 2019 13:56:20 +0000 (15:56 +0200)]
drm/i915: use REG_FIELD_PREP() to define register bitfield values

Slightly verbose, but does away with hand rolled shifts. Ties the field
values with the mask defining the field.

Unfortunately we have to make a local copy of FIELD_PREP() to evaluate
to a integer constant expression. But with this, we can ensure the mask
is non-zero, power of 2, fits u32, and the value fits the mask (when the
value is a constant expression).

Convert power sequencer registers as an example.

v4:
- rebase

v3:
- rename the macro to REG_FIELD_PREP to avoid underscore prefix and to
  be in line with kernel macros (Chris)
- rename power of 2 check macro (Chris)

v2:
 - add build-time checks with BUILD_BUG_ON_ZERO()
 - rename to just _FIELD() due to regmap.h REG_FIELD() clash

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/a844edda2afa6b54d9b12a6251da02c43ea8a942.1552657998.git.jani.nikula@intel.com
5 years agodrm/i915: deprecate _SHIFT in favor of _MASK passed to accessors
Jani Nikula [Fri, 15 Mar 2019 13:56:19 +0000 (15:56 +0200)]
drm/i915: deprecate _SHIFT in favor of _MASK passed to accessors

bitfield.h defines FIELD_GET() and FIELD_PREP() macros to access
bitfields using the mask alone, with no need for separate shift. Indeed,
the shift is redundant.

We define REG_FIELD_GET() and REG_FIELD_PREP() wrappers for the above,
in part to force u32 and for consistency with REG_BIT() and
REG_GENMASK(), but also as we'll need to redefine REG_FIELD_PREP() in
follow-up work to make it produce integer constant expressions.

For the most part, REG_FIELD_GET() is shorter than masking followed by
shift, and arguably has more clarity.

REG_FIELD_PREP() can get more verbose than simply shifting in place, but
it does provide masking to ensure we don't overflow the mask, something
we usually don't bother with currently.

Convert power sequencer registers as an example.

v3:
- temp variable removal (Chris)
- rebase

v2:
- Add the REG_FIELD_GET() and REG_FIELD_PREP() wrappers to use them
  consistently from the start.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/ab68f52e55e3961bde9458c0d85a12d98ef471df.1552657998.git.jani.nikula@intel.com
5 years agodrm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents
Jani Nikula [Fri, 15 Mar 2019 13:56:18 +0000 (15:56 +0200)]
drm/i915: introduce REG_BIT() and REG_GENMASK() to define register contents

Introduce REG_BIT(n) to define register bits and REG_GENMASK(h, l) to
define register bitfield masks.

We define the above as wrappers to BIT() and GENMASK() respectively to
force u32 type to go with our register size, and to add compile time
checks on the bit numbers.

The intention is that these are easier to get right and review against
the spec than hand rolled masks.

Convert power sequencer registers as an example.

v4:
- rebase

v3:
- rename macros to REG_BIT() and REG_GENMASK() to avoid underscore
  prefix and to be in line with kernel macros (Chris)
- add compile time checks (Mika)

v2:
- rename macros to just _BIT() and _MASK() to reduce verbosity

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/787307c0ba9bc23471e5ff1e454b8af35771fa37.1552657998.git.jani.nikula@intel.com
5 years agodrm/i915: Stop needlessly acquiring wakeref for debugfs/drop_caches_set
Chris Wilson [Mon, 18 Mar 2019 09:51:49 +0000 (09:51 +0000)]
drm/i915: Stop needlessly acquiring wakeref for debugfs/drop_caches_set

We only need to acquire a wakeref for ourselves for a few operations, as
most either already acquire their own wakeref or imply a wakeref. In
particular, it is i915_gem_set_wedged() that needed us to present it
with a wakeref, which is incongruous with its "use anywhere" ability.

Suggested-by: "Yokoyama, Caz" <caz.yokoyama@intel.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: "Yokoyama, Caz" <caz.yokoyama@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190318095204.9913-7-chris@chris-wilson.co.uk
5 years agodrm/i915: Sanity check mmap length against object size
Chris Wilson [Thu, 14 Mar 2019 07:58:29 +0000 (07:58 +0000)]
drm/i915: Sanity check mmap length against object size

We assumed that vm_mmap() would reject an attempt to mmap past the end of
the filp (our object), but we were wrong.

Applications that tried to use the mmap beyond the end of the object
would be greeted by a SIGBUS. After this patch, those applications will
be told about the error on creating the mmap, rather than at a random
moment on later access.

Reported-by: Antonio Argenziano <antonio.argenziano@intel.com>
Testcase: igt/gem_mmap/bad-size
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: stable@vger.kernel.org
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314075829.16838-1-chris@chris-wilson.co.uk
5 years agodrm/i915: do not pass dev_priv to low-level forcewake functions
Daniele Ceraolo Spurio [Sat, 16 Mar 2019 10:00:45 +0000 (10:00 +0000)]
drm/i915: do not pass dev_priv to low-level forcewake functions

The only usage we have for it is for the regs pointer. Save a pointer to
the set and ack registers instead of the register offsets to remove this
requirement

v2: Keep passing uncore down to the lowest levels to avoid repeated
pointer chasing in the innermost loops:

add/remove: 0/0 grow/shrink: 3/15 up/down: 33/-155 (-122)
Function                                     old     new   delta
fw_domain_init                               320     351     +31
hdmi_port_clock_valid                        319     320      +1
g4x_pre_enable_dp                            364     365      +1
ring_request_alloc                          1852    1851      -1
intel_engine_lookup_user                      50      49      -1
gen11_irq_handler                            738     737      -1
__intel_uncore_forcewake_get                 115     112      -3
intel_uncore_fw_release_timer                198     194      -4
i915_forcewake_domains                       154     150      -4
fw_domain_fini                               172     168      -4
__intel_uncore_forcewake_put                 163     159      -4
___force_wake_auto                           138     134      -4
fw_domains_put                                98      92      -6
__err_print_to_sgl                          4058    4052      -6
intel_uncore_forcewake_reset                 459     444     -15
fw_domains_get                               563     548     -15
fw_domain_wait_ack_with_fallback             490     450     -40
fw_domains_get_with_fallback                 875     828     -47

Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190313231319.711-2-daniele.ceraolospurio@intel.com
Link: https://patchwork.freedesktop.org/patch/msgid/20190316100045.20240-1-chris@chris-wilson.co.uk
5 years agodrm/i915: Fix off-by-one in reporting hanging process
Chris Wilson [Fri, 15 Mar 2019 16:39:33 +0000 (16:39 +0000)]
drm/i915: Fix off-by-one in reporting hanging process

ffs() is 1-indexed, but we want to use it as an index into an array, so
use __ffs() instead.

Fixes: eb8d0f5af4ec ("drm/i915: Remove GPU reset dependence on struct_mutex")
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190315163933.19352-1-chris@chris-wilson.co.uk
5 years agodrm/i915: Split ilk vs. icl csc matrix handling
Ville Syrjälä [Mon, 18 Feb 2019 19:31:37 +0000 (21:31 +0200)]
drm/i915: Split ilk vs. icl csc matrix handling

Split the csc matrix handling to ilk+ and icl+ functions.
This keeps the logic clear on what is loaded into which
CSC unit on the hardware.

We also fix the icl+ code to load the full->limited range
conversion matrix into the output CSC rather than the pipe
CSC which was used on earlier platforms. And we also turn
on the pipe CSC only when the ctm is present.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-8-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915: Clean the csc limited range/identity programming
Ville Syrjälä [Mon, 18 Feb 2019 19:31:36 +0000 (21:31 +0200)]
drm/i915: Clean the csc limited range/identity programming

Just provide precomputed CSC matrices for the identity and
limited range cases. This removes the remaining nuts and bolts
stuff from ilk_load_csc_matrix(), allowing one to actually
see the high level logic.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-7-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915: Extract ilk_csc_convert_ctm()
Ville Syrjälä [Mon, 18 Feb 2019 19:31:35 +0000 (21:31 +0200)]
drm/i915: Extract ilk_csc_convert_ctm()

Start splitting low level nuts and bolts stuff from
ilk_load_csc_matrix(). The goal is to leave only the clear
high level logic in place.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-6-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915: Clean up ilk/icl pipe/output CSC programming
Ville Syrjälä [Mon, 18 Feb 2019 19:31:34 +0000 (21:31 +0200)]
drm/i915: Clean up ilk/icl pipe/output CSC programming

We have far too much messy duplicated code in the
pipe/output CSC programming. Simply provide two functions
(ilk_update_pipe_csc() and icl_update_output_csc()) to
program the relevant CSC registers. The desired offsets
and coefficients are passed in as parameters.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-5-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915: Extract ilk_csc_limited_range()
Ville Syrjälä [Mon, 18 Feb 2019 19:31:33 +0000 (21:31 +0200)]
drm/i915: Extract ilk_csc_limited_range()

Extract a helper which determines if we need to use the
pipe CSC for limited range RGB output.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-4-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915: Precompute/readout/check CHV CGM mode
Ville Syrjälä [Mon, 18 Feb 2019 19:31:32 +0000 (21:31 +0200)]
drm/i915: Precompute/readout/check CHV CGM mode

Let's precompute the CGM mode for CHV. And naturally we
also read it out and check it.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-3-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915: Readout and check csc_mode
Ville Syrjälä [Mon, 18 Feb 2019 19:31:31 +0000 (21:31 +0200)]
drm/i915: Readout and check csc_mode

Add the missing readout and PIPE_CONF_CHECK() for csc_mode.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190218193137.22914-2-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
5 years agodrm/i915/icl: remove intel_dpll_is_combophy()
Lucas De Marchi [Sat, 9 Mar 2019 03:57:27 +0000 (19:57 -0800)]
drm/i915/icl: remove intel_dpll_is_combophy()

This is only used in intel_display() and shouldn't be needed there.
We don't want to keep converting from pll id to pll type so just remove
the function.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190309035727.25389-6-lucas.demarchi@intel.com
5 years agodrm/i915/icl: split combo and tbt pll funcs
Lucas De Marchi [Sat, 9 Mar 2019 03:57:26 +0000 (19:57 -0800)]
drm/i915/icl: split combo and tbt pll funcs

Like was done for MG and combo, now finish the per-type split of the
vfunc by moving TBT out of the combo functions. Now we can completely
remove icl_pll_id_to_enable_reg() since each PLL type passes all the
information via arguments.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190309035727.25389-5-lucas.demarchi@intel.com
5 years agodrm/i915/icl: split combo and mg pll disable
Lucas De Marchi [Sat, 9 Mar 2019 03:57:25 +0000 (19:57 -0800)]
drm/i915/icl: split combo and mg pll disable

Like was done in the enable case, split the implementation of the
disable for MG and Combo PLLs.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190309035727.25389-4-lucas.demarchi@intel.com
5 years agodrm/i915/icl: split pll enable in three steps
Lucas De Marchi [Sat, 9 Mar 2019 03:57:24 +0000 (19:57 -0800)]
drm/i915/icl: split pll enable in three steps

Create separate functions to 1) enable power, 2) write pll config, and
3) enable pll. Doing this it makes it easier to share the functions for
the different PLL types by passing the right arguments.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190309035727.25389-3-lucas.demarchi@intel.com
5 years agodrm/i915/icl: split combo and mg pll enable
Lucas De Marchi [Sat, 9 Mar 2019 03:57:23 +0000 (19:57 -0800)]
drm/i915/icl: split combo and mg pll enable

Let's start using the vfuncs to differentiate MG and Combo PLLs. The end
goal is to decouple the type of the PLL from the IDs since the latter
are likely to change from one platform to another. This also makes the
code easier to read by not having lots of if/else chains on leaf
functions.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190309035727.25389-2-lucas.demarchi@intel.com
5 years agodrm/i915: Always kick the execlists tasklet after reset
Chris Wilson [Wed, 13 Mar 2019 16:28:35 +0000 (16:28 +0000)]
drm/i915: Always kick the execlists tasklet after reset

With direct submission being disabled while the reset in progress, we
have a small window where we may forgo the submission of a new request
and not notice its addition during execlists_reset_finish. To close this
window, always schedule the submission tasklet on coming out of reset to
catch any residual work.

<6> [333.144082] i915: Running intel_hangcheck_live_selftests/igt_reset_engines
<3> [333.296927] i915_reset_engine(rcs0:idle): failed to idle after reset
<6> [333.296932] i915 0000:00:02.0: [drm] rcs0
<6> [333.296934] i915 0000:00:02.0: [drm]  Hangcheck 0:a9ddf7a5 [4157 ms]
<6> [333.296936] i915 0000:00:02.0: [drm]  Reset count: 36048 (global 754)
<6> [333.296938] i915 0000:00:02.0: [drm]  Requests:
<6> [333.296997] i915 0000:00:02.0: [drm]  RING_START: 0x00000000
<6> [333.296999] i915 0000:00:02.0: [drm]  RING_HEAD:  0x00000000
<6> [333.297001] i915 0000:00:02.0: [drm]  RING_TAIL:  0x00000000
<6> [333.297003] i915 0000:00:02.0: [drm]  RING_CTL:   0x00000000
<6> [333.297005] i915 0000:00:02.0: [drm]  RING_MODE:  0x00000200 [idle]
<6> [333.297007] i915 0000:00:02.0: [drm]  RING_IMR: fffffeff
<6> [333.297010] i915 0000:00:02.0: [drm]  ACTHD:  0x00000000_00000000
<6> [333.297012] i915 0000:00:02.0: [drm]  BBADDR: 0x00000000_00000000
<6> [333.297015] i915 0000:00:02.0: [drm]  DMA_FADDR: 0x00000000_00000000
<6> [333.297017] i915 0000:00:02.0: [drm]  IPEIR: 0x00000000
<6> [333.297019] i915 0000:00:02.0: [drm]  IPEHR: 0x00000000
<6> [333.297021] i915 0000:00:02.0: [drm]  Execlist status: 0x00000001 00000000
<6> [333.297023] i915 0000:00:02.0: [drm]  Execlist CSB read 5, write 5 [mmio:7], tasklet queued? no (enabled)
<6> [333.297025] i915 0000:00:02.0: [drm]  ELSP[0] idle
<6> [333.297027] i915 0000:00:02.0: [drm]  ELSP[1] idle
<6> [333.297028] i915 0000:00:02.0: [drm]  HW active? 0x0
<6> [333.297044] i915 0000:00:02.0: [drm]  Queue priority hint: -8186
<6> [333.297067] i915 0000:00:02.0: [drm]  Q  2afac:5f2+  prio=-8186 @ 50ms: (null)
<6> [333.297068] i915 0000:00:02.0: [drm] HWSP:
<6> [333.297071] i915 0000:00:02.0: [drm] [0000] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<6> [333.297073] i915 0000:00:02.0: [drm] *
<6> [333.297075] i915 0000:00:02.0: [drm] [0040] 00000001 00000000 00000018 00000002 00000001 00000000 00000018 00000000
<6> [333.297077] i915 0000:00:02.0: [drm] [0060] 00000001 00000000 00008002 00000002 00000000 00000000 00000000 00000005
<6> [333.297079] i915 0000:00:02.0: [drm] [0080] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<6> [333.297081] i915 0000:00:02.0: [drm] *
<6> [333.297083] i915 0000:00:02.0: [drm] [00c0] 00000000 00000000 00000000 00000000 a9ddf7a5 00000000 00000000 00000000
<6> [333.297085] i915 0000:00:02.0: [drm] [00e0] 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
<6> [333.297087] i915 0000:00:02.0: [drm] *
<6> [333.297089] i915 0000:00:02.0: [drm] Idle? no
<6> [333.297090] i915_reset_engine(rcs0:idle): 3000 resets
<3> [333.297092] i915/intel_hangcheck_live_selftests: igt_reset_engines failed with error -5
<3> [333.455460] i915 0000:00:02.0: Failed to idle engines, declaring wedged!
...
<0> [333.491294] i915_sel-4916    1.... 333262143us : i915_reset_engine: rcs0 flags=4
<0> [333.491328] i915_sel-4916    1.... 333262143us : execlists_reset_prepare: rcs0: depth<-0
<0> [333.491362] i915_sel-4916    1.... 333262143us : intel_engine_stop_cs: rcs0
<0> [333.491396] i915_sel-4916    1d..1 333262144us : process_csb: rcs0 cs-irq head=5, tail=5
<0> [333.491424] i915_sel-4916    1.... 333262145us : intel_gpu_reset: engine_mask=1
<0> [333.491454] kworker/-214     5.... 333262184us : i915_gem_switch_to_kernel_context: awake?=yes
<0> [333.491487] kworker/-214     5.... 333262192us : i915_request_add: rcs0 fence 2afac:1522
<0> [333.491520] kworker/-214     5.... 333262193us : i915_request_add: marking (null) as active
<0> [333.491553] i915_sel-4916    1.... 333262199us : intel_engine_cancel_stop_cs: rcs0
<0> [333.491587] i915_sel-4916    1.... 333262199us : execlists_reset_finish: rcs0: depth->0

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190313162835.30228-1-chris@chris-wilson.co.uk
5 years agodrm/i915/gtt: Refactor common ppgtt initialisation
Chris Wilson [Thu, 14 Mar 2019 22:38:39 +0000 (22:38 +0000)]
drm/i915/gtt: Refactor common ppgtt initialisation

The basic setup of the i915_hw_ppgtt is the same between gen6 and gen8,
so refactor that into a common routine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-5-chris@chris-wilson.co.uk
5 years agodrm/i915/gtt: Rename i915_vm_is_48b to i915_vm_is_4lvl
Chris Wilson [Thu, 14 Mar 2019 22:38:38 +0000 (22:38 +0000)]
drm/i915/gtt: Rename i915_vm_is_48b to i915_vm_is_4lvl

Large ppGTT are differentiated by the requirement to go to four levels
to address more than 32b. Given the introduction of more 4 level ppGTT
with different sizes of addressable bits, rename i915_vm_is_48b() to
better reflect the commonality of using 4 levels.

Based on a patch by Bob Paauwe.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-4-chris@chris-wilson.co.uk
5 years agodrm/i915: Drop address size from ppgtt_type
Chris Wilson [Thu, 14 Mar 2019 22:38:37 +0000 (22:38 +0000)]
drm/i915: Drop address size from ppgtt_type

With the introduction of the separate addressable bits into the device
info, we can remove the conflation of the ppgtt size from the ppgtt
type.

Based on a patch by Bob Paauwe.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-3-chris@chris-wilson.co.uk
5 years agodrm/i915: Record platform specific ppGTT size in intel_device_info
Chris Wilson [Thu, 14 Mar 2019 22:38:36 +0000 (22:38 +0000)]
drm/i915: Record platform specific ppGTT size in intel_device_info

As the maximum addressable bits is determined by platform, record that
information in our static chipset tables. This has the advantage of
being clearly recorded in our capability dumps for dmesg, debugfs and
error states.

Based on a patch by Bob Paauwe.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-2-chris@chris-wilson.co.uk
5 years agodrm/i915: Mark up vGPU support for full-ppgtt
Chris Wilson [Thu, 14 Mar 2019 22:38:35 +0000 (22:38 +0000)]
drm/i915: Mark up vGPU support for full-ppgtt

For compatibility reasons, we only care if the vGPU host provides
support for full-ppgtt. This is independent of the addressable memory
size, so remove the conflation of 48b from the capability name.

Based on a patch by Bob Paauwe.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Bob Paauwe <bob.j.paauwe@intel.com>
Cc: Zhenyu Wang <zhenyuw@linux.intel.com>
Cc: Zhi Wang <zhi.a.wang@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314223839.28258-1-chris@chris-wilson.co.uk
5 years agodrm/i915: Also use new comparative stuff for more ICP+ stuff
Rodrigo Vivi [Wed, 13 Mar 2019 21:43:07 +0000 (14:43 -0700)]
drm/i915: Also use new comparative stuff for more ICP+ stuff

I just noticed that initial PCH comparative patch
left some >= PCH_ICP cases behind.

Let's also cover these cases and leave only the pin map
behind now.

No functional change. Hence no fixes tag.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190313214307.26573-1-rodrigo.vivi@intel.com
5 years agodrm/i915: Refactor to common helpers for prepare/finish between reset & wedge
Chris Wilson [Thu, 14 Mar 2019 08:44:32 +0000 (08:44 +0000)]
drm/i915: Refactor to common helpers for prepare/finish between reset & wedge

Since both GPU reset and declaring the device wedged suspend ongoing
driver activity around a hard reset, we can reuse the same code to
reduce the likelihood of forgetting details surrounding reset from
either path.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190314084432.3740-1-chris@chris-wilson.co.uk