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7 years agodrm/amdgpu: Bring bo creation in line with radeon driver (v2)
Nils Holland [Sun, 22 Jan 2017 19:15:27 +0000 (20:15 +0100)]
drm/amdgpu: Bring bo creation in line with radeon driver (v2)

Add the bo creation changes that have been done to the radeon driver in
recent times, e.g. disable GTT WC on 32 bit because it is broken there,
and also disable it generally (and print a warning message) when
CONFIG_X86_PAT is not set.

v2: agd: fix warning in defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
    case

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Holland <nholland@tisys.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix misspelling in header guard
Nicolas Iooss [Sun, 22 Jan 2017 13:47:39 +0000 (14:47 +0100)]
drm/amd/powerplay: fix misspelling in header guard

In smu7_clockpowergating.h, the #ifndef statement which prevents
multiple inclusions of the header file uses _SMU7_CLOCK_POWER_GATING_H_
but the following #define statement uses _SMU7_CLOCK__POWER_GATING_H_.

Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: revert "add optional LRU removal callback v2"
Christian König [Thu, 12 Jan 2017 10:54:11 +0000 (11:54 +0100)]
drm/ttm: revert "add optional LRU removal callback v2"

Without the custom LRU management the callback is not used any more.

agd: fix trivial warning

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Roger.He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: revert "implement LRU add callbacks v2"
Christian König [Thu, 12 Jan 2017 10:50:13 +0000 (11:50 +0100)]
drm/ttm: revert "implement LRU add callbacks v2"

The additional housekeeping had too much CPU overhead,
let's use the BO priorities instead.

agd: also revert hibmc changes

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-and-Tested-by: Roger.He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: double the priority of kernel allocations
Christian König [Mon, 23 Jan 2017 21:28:06 +0000 (16:28 -0500)]
drm/amdgpu: double the priority of kernel allocations

Give kernel allocations a higher priority cause it is often
more work to swap them back in.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger.He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: user BO priority instead of self coding it (v2)
Christian König [Tue, 10 Jan 2017 16:27:49 +0000 (17:27 +0100)]
drm/amdgpu: user BO priority instead of self coding it (v2)

Keeping groups of BOs on the LRU is to time consuming on command submission.

Instead use the newly added BO priority to give a certain eviction order.

v2: agd: trivial warning fix

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger.He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: add BO priorities for the LRUs
Christian König [Tue, 10 Jan 2017 13:08:28 +0000 (14:08 +0100)]
drm/ttm: add BO priorities for the LRUs

This way the driver can specify a priority for a BO which has the effect that
a BO is only evicted when all other BOs with a lower priority are evicted
first.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger.He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: remove allow_errors parameter from ttm_bo_force_list_clean
Christian König [Fri, 6 Jan 2017 18:16:07 +0000 (19:16 +0100)]
drm/ttm: remove allow_errors parameter from ttm_bo_force_list_clean

Not allowing errors here is completely pointless and actually dangerous
cause trying to continue on an error can cause an endless loop.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Roger.He <Hongbo.He@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vi: fix mailbox irq mistake
Xiangliang Yu [Wed, 18 Jan 2017 04:50:14 +0000 (12:50 +0800)]
drm/amdgpu/vi: fix mailbox irq mistake

For virt, freed mailbox irq should be handled in hw fini, not hw
init. Correct it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix reboot failure issue for virtualization
Xiangliang Yu [Wed, 18 Jan 2017 04:47:55 +0000 (12:47 +0800)]
drm/amdgpu: fix reboot failure issue for virtualization

Reboot process will call HW fini functions of IP blocks. For virt,
need to send event three before hw fini and send event four after
hw fini.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Add PCI info to gca_config debugfs
Tom St Denis [Wed, 18 Jan 2017 18:01:25 +0000 (13:01 -0500)]
drm/amd/amdgpu: Add PCI info to gca_config debugfs

So we can determine which device the entry is before connecting
a display.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:insert switch buffer only for VM submit
Monk Liu [Wed, 18 Jan 2017 02:38:06 +0000 (10:38 +0800)]
drm/amdgpu:insert switch buffer only for VM submit

for non-VM submit which is from kernel side, no need
to switch buffer at all.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:Preamble is forbid to be ignored in SRIOV
Monk Liu [Wed, 18 Jan 2017 02:37:34 +0000 (10:37 +0800)]
drm/amdgpu:Preamble is forbid to be ignored in SRIOV

SR-IOV requires the preamble.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:set cond_exec polling value to 1 in ring_init
Monk Liu [Wed, 18 Jan 2017 02:31:18 +0000 (10:31 +0800)]
drm/amdgpu:set cond_exec polling value to 1 in ring_init

no need to set it per ib_schedule(), hw won't override
this polling address.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE(V2)
Monk Liu [Tue, 17 Jan 2017 02:56:16 +0000 (10:56 +0800)]
drm/amdgpu:in cntx_ctrl we need insert meta-init for CE/DE(V2)

to support SRIOV preemption.

v2:
fix emit_frame_size

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl
Monk Liu [Tue, 17 Jan 2017 02:55:42 +0000 (10:55 +0800)]
drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl

To determine whether the context uses GPUVM or not.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:implement CE/DE meta-init routines
Monk Liu [Tue, 17 Jan 2017 02:52:58 +0000 (10:52 +0800)]
drm/amdgpu:implement CE/DE meta-init routines

those package need to insert into ring buffer for
SRIOV case. they are used to let CP do preemption.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:implement ring_write_multiple
Monk Liu [Tue, 17 Jan 2017 02:52:33 +0000 (10:52 +0800)]
drm/amdgpu:implement ring_write_multiple

Write multiple dwords to the ring.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:add META_DATA struct for CSA/SRIOV v2
Monk Liu [Thu, 12 Jan 2017 07:32:44 +0000 (15:32 +0800)]
drm/amdgpu:add META_DATA struct for CSA/SRIOV v2

META-DATA is used in GFX cmd submit, we have two
format suit for META-DATA-init, one is legacy and another
is for chained-ib preempt, which is used in vulkan
UMD.

v2: drop use CP version number to judge if chain-ib
supports or not, we wait for it mature

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine ci uvd dpm code.
Rex Zhu [Thu, 12 Jan 2017 13:50:18 +0000 (21:50 +0800)]
drm/amdgpu: refine ci uvd dpm code.

Fix up the powergating logic.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Ack-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: simplify allocation of scratch regs
Nils Wallménius [Mon, 16 Jan 2017 20:56:48 +0000 (21:56 +0100)]
drm/amdgpu: simplify allocation of scratch regs

The scratch regs are sequential so there's no need to keep
them in an array, we can just return the index of the first
free register + the base register. Also change the array
of bools for keeping track of the free regs to a bitfield.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Refactor flip into prepare submit and submit. (v3)
Andrey Grodzovsky [Mon, 5 Dec 2016 20:15:33 +0000 (15:15 -0500)]
drm/amdgpu: Refactor flip into prepare submit and submit. (v3)

Make pflip atomic friendly. Split the fuinction into
whatever can fail part and the actual flip submit part.
Call the pre-submit function before atomic states
are swapped so in case of error we can fail the
IOCTL.

v2:
Update due to  target_vblank code change.
Fix identetation.
Change return type for amdgpu_crtc_submit_flip to void
v3: agd: fix formatting

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Switch error code when bo pin fails. (v3)
Andrey Grodzovsky [Sun, 18 Dec 2016 21:16:53 +0000 (16:16 -0500)]
drm/amdgpu: Switch error code when bo pin fails. (v3)

Switching to -ENOMEM resolves a hang in case the driver
uses this function in atomic code path.

v2: Update commit message.
v3:
Remove forcing -EINVAL in case of amdgpu_bo_pin fail
since there is no apparent reason for not just passing
through the the return value.

Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: fix bugon.cocci warnings
Julia Lawall [Tue, 10 Jan 2017 05:52:59 +0000 (06:52 +0100)]
drm/amdgpu/gfx8: fix bugon.cocci warnings

 Use BUG_ON instead of a if condition followed by BUG.

Generated by: scripts/coccinelle/misc/bugon.cocci

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewd-by: Xiangliang.Yu <Xiangliang.Yu@amd.com>
CC: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use the num_rings variable for checking vce rings
Alex Deucher [Wed, 11 Jan 2017 21:11:48 +0000 (16:11 -0500)]
drm/amdgpu: use the num_rings variable for checking vce rings

Difference families may have different numbers of rings. Use
the variable rather than a hardcoded number.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: fix locking in bo creation error path
Nicolai Hähnle [Tue, 10 Jan 2017 19:36:56 +0000 (20:36 +0100)]
drm/amd/amdgpu: fix locking in bo creation error path

Unlock the resv lock only if we were the ones to lock it in the first
place.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: lock reservation object while creating shadow bo
Nicolai Hähnle [Tue, 10 Jan 2017 18:06:00 +0000 (19:06 +0100)]
drm/amd/amdgpu: lock reservation object while creating shadow bo

ttm_bo_init checks that the reservation object is locked. This is
the caller's responsibility when resv != NULL. Otherwise, the inline
reservation object of the newly allocated buffer is used and must
explicitly be locked.

Uninterruptible w/w locks without an acquire context are always
successful.

v2: use ww_mutex_lock

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net> (v1)
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix typo of CGTS
Huang Rui [Wed, 11 Jan 2017 01:55:34 +0000 (09:55 +0800)]
drm/amdgpu: fix typo of CGTS

Fixes: 9e8590861e9 ('drm/amdgpu: add parse clock gating state')
Reported-by: Tom StDenis <Tom.StDenis@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: do not reset gpu for virtualization
Xiangliang Yu [Sat, 17 Dec 2016 14:48:57 +0000 (22:48 +0800)]
drm/amdgpu: do not reset gpu for virtualization

Current amdgpu reset process only works on bare-metal and for
SRIOV many inside it need re-work to adapt to vf device.

This is a temporary workaround to skip gpu reset.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: enable virtual display
Xiangliang Yu [Wed, 11 Jan 2017 09:18:40 +0000 (17:18 +0800)]
drm/amdgpu/virt: enable virtual display

Virtual display is default setting for virtualization, enable it.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vi: add support virtualization
Xiangliang Yu [Thu, 12 Jan 2017 07:22:18 +0000 (15:22 +0800)]
drm/amdgpu/vi: add support virtualization

Call VI virtualization functions if device is Vf.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: request/release full gpu access if device is vf
Xiangliang Yu [Thu, 12 Jan 2017 07:14:36 +0000 (15:14 +0800)]
drm/amdgpu: request/release full gpu access if device is vf

For gpu vf device, first need to request full gpu access before
accessing gpu registers, and release full gpu access after the
access is done.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: implement VI virt operation interfaces
Xiangliang Yu [Thu, 12 Jan 2017 07:00:41 +0000 (15:00 +0800)]
drm/amdgpu/virt: implement VI virt operation interfaces

VI has asic specific virt support, which including mailbox and
golden registers init.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: shaoyunl <Shaoyun.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: add high level interfaces for virt
Xiangliang Yu [Thu, 12 Jan 2017 06:53:08 +0000 (14:53 +0800)]
drm/amdgpu/virt: add high level interfaces for virt

Add high level interfaces that is not relate to specific asic. So
asic files just need to implement the interfaces to support
virtualization.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: use kiq to access registers (v2)
Xiangliang Yu [Thu, 12 Jan 2017 06:29:34 +0000 (14:29 +0800)]
drm/amdgpu/virt: use kiq to access registers (v2)

For virtualization, it is must for driver to use KIQ to access
registers when it is out of GPU full access mode.

v2: agd: rebase

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: add runtime flag
Xiangliang Yu [Thu, 12 Jan 2017 06:11:53 +0000 (14:11 +0800)]
drm/amdgpu/virt: add runtime flag

Add new flag to define gpu runtime that is out of full gpu access.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: implement emit_rreg/wreg function
Xiangliang Yu [Thu, 12 Jan 2017 05:57:48 +0000 (13:57 +0800)]
drm/amdgpu/gfx8: implement emit_rreg/wreg function

Implement emit_rreg/wreg function for kiq ring.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/ring: add two interfaces to support r/w registers with kiq
Xiangliang Yu [Tue, 10 Jan 2017 04:53:52 +0000 (12:53 +0800)]
drm/amdgpu/ring: add two interfaces to support r/w registers with kiq

During virtual runtime, need to send command to kiq ring to
read/write GPU registers. Add two interface to support the two
actions.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Monk Linu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:invoke CSA functions (v2)
Monk Liu [Mon, 9 Jan 2017 07:54:32 +0000 (15:54 +0800)]
drm/amdgpu:invoke CSA functions (v2)

Make sure the CSA is mapped.

v2: agd: rebase.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:add new file for SRIOV
Monk Liu [Mon, 9 Jan 2017 07:21:13 +0000 (15:21 +0800)]
drm/amdgpu:add new file for SRIOV

for SRIOV usage, CSA is only used per device and each
VM will map on it.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu:new field members for SRIOV
Monk Liu [Mon, 9 Jan 2017 07:23:17 +0000 (15:23 +0800)]
drm/amdgpu:new field members for SRIOV

and implement CSA functions in this file

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: add check that shadow page tables are GPU-accessible
Nicolai Hähnle [Mon, 12 Dec 2016 10:53:11 +0000 (11:53 +0100)]
drm/amd/amdgpu: add check that shadow page tables are GPU-accessible

Skip amdgpu_gem_va_update_vm otherwise. Also clean up the check for the
non-shadow page tables using the new helper function.

This fixes a crash with the stack trace:

amdgpu_gem_va_update_vm
-> amdgpu_vm_update_page_directory
 -> amdgpu_ttm_bind
  -> amdgpu_gtt_mgr_alloc

v2: actually check bo->shadow instead of just checking bo twice

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: add check that shadow page directory is GPU-accessible
Nicolai Hähnle [Mon, 12 Dec 2016 11:09:12 +0000 (12:09 +0100)]
drm/amd/amdgpu: add check that shadow page directory is GPU-accessible

Skip amdgpu_gem_va_update_vm when shadow the page directory is swapped out.
Clean up the check for non-shadow BOs as well using the new helper function.

This fixes a crash with the stack trace:

amdgpu_gem_va_update_vm
-> amdgpu_vm_update_page_directory
 -> amdgpu_ttm_bind
  -> amdgpu_gtt_mgr_alloc

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: add amdgpu_bo_gpu_accessible helper function
Nicolai Hähnle [Thu, 15 Dec 2016 16:04:51 +0000 (17:04 +0100)]
drm/amd/amdgpu: add amdgpu_bo_gpu_accessible helper function

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: move eviction counting to amdgpu_bo_move_notify
Nicolai Hähnle [Thu, 15 Dec 2016 16:26:42 +0000 (17:26 +0100)]
drm/amd/amdgpu: move eviction counting to amdgpu_bo_move_notify

This catches evictions of shadow page tables from the GART. Since shadow
page tables are always stored in system memory, amdgpu_bo_move is never
called for them.

This fixes a crash during command submission that occurs when only a shadow
page table and no other BOs were evicted since the last submission.

Fixes: 1baa439fb2f4e586 ("drm/amdgpu: allocate shadow for pd/pt bo V2")
Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/ttm: add evict parameter to ttm_bo_driver::move_notify
Nicolai Hähnle [Thu, 15 Dec 2016 16:23:49 +0000 (17:23 +0100)]
drm/ttm: add evict parameter to ttm_bo_driver::move_notify

Ensure that the driver can listen to evictions even when they don't take the
path through ttm_bo_driver::move.

This is crucial for amdgpu, which relies on an eviction counter to skip
re-binding page tables when possible.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine vce3.0 initialize.
Rex Zhu [Tue, 10 Jan 2017 11:54:25 +0000 (19:54 +0800)]
drm/amdgpu: refine vce3.0 initialize.

1. disable vce cg when vce hw initialize.
2. initizlize vce clock to 10KHz fo dgpu,
   so no need to set bypass clock to vce.

Change-Id: I934c2c4820cc95c1bfa2fa41ff0f40a0d3cd1c40
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: extend profiling mode.
Rex Zhu [Fri, 6 Jan 2017 05:32:49 +0000 (13:32 +0800)]
drm/amdgpu: extend profiling mode.

in profiling mode, powerplay will fix power state
as stable as possible.and disable gfx cg and LBPW feature.

profile_standard: as a prerequisite, ensure power and thermal
sustainable, set clocks ratio as close to the highest clock
ratio as possible.
profile_min_sclk: fix mclk as profile_normal, set lowest sclk
profile_min_mclk: fix sclk as profile_normal, set lowest mclk
profile_peak: set highest sclk and mclk, power and thermal not
sustainable
profile_exit: exit profile mode. enable gfx cg/lbpw feature.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine DIDT feature in Powerplay.
Rex Zhu [Wed, 21 Dec 2016 12:40:53 +0000 (20:40 +0800)]
drm/amd/powerplay: refine DIDT feature in Powerplay.

Updating SQ DIDT settings and block mask
so SQ uses PCC on Polaris11.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add new smu message.
Rex Zhu [Wed, 21 Dec 2016 12:40:03 +0000 (20:40 +0800)]
drm/amd/powerplay: add new smu message.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: Configuring DIDT blocks only SQ enabled on Polaris11.
Rex Zhu [Wed, 21 Dec 2016 12:37:49 +0000 (20:37 +0800)]
drm/amd/powerplay: Configuring DIDT blocks only SQ enabled on Polaris11.

following firmware's request.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: fix bug return invalid value to sysfs.
Rex Zhu [Mon, 9 Jan 2017 07:18:01 +0000 (15:18 +0800)]
drm/amdgpu: fix bug return invalid value to sysfs.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add get clockgating_state method for vce v3
Huang Rui [Thu, 5 Jan 2017 13:27:31 +0000 (21:27 +0800)]
drm/amdgpu: add get clockgating_state method for vce v3

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add get clockgating_state method for uvd v5&v6
Huang Rui [Thu, 5 Jan 2017 13:07:02 +0000 (21:07 +0800)]
drm/amdgpu: add get clockgating_state method for uvd v5&v6

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add get clockgating_state method for vi common
Huang Rui [Thu, 5 Jan 2017 12:48:06 +0000 (20:48 +0800)]
drm/amdgpu: add get clockgating_state method for vi common

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add get clockgating_state method for sdma v3
Huang Rui [Thu, 5 Jan 2017 12:18:43 +0000 (20:18 +0800)]
drm/amdgpu: add get clockgating_state method for sdma v3

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add get clockgating_state method for gmc v8
Huang Rui [Thu, 5 Jan 2017 12:03:27 +0000 (20:03 +0800)]
drm/amdgpu: add get clockgating_state method for gmc v8

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add get clockgating_state method for gfx v8
Huang Rui [Thu, 5 Jan 2017 10:48:44 +0000 (18:48 +0800)]
drm/amdgpu: add get clockgating_state method for gfx v8

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add parse clock gating state
Huang Rui [Thu, 5 Jan 2017 11:17:13 +0000 (19:17 +0800)]
drm/amdgpu: add parse clock gating state

Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: William Lewis <minutemaidpark@hotmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: introduce an interface to get clock gating status dynamically
Huang Rui [Thu, 5 Jan 2017 10:44:41 +0000 (18:44 +0800)]
drm/amdgpu: introduce an interface to get clock gating status dynamically

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: remove detect_hw_virtualization interface
Xiangliang Yu [Mon, 9 Jan 2017 03:53:14 +0000 (11:53 +0800)]
drm/amdgpu: remove detect_hw_virtualization interface

Call detection function driectly, so remove the interface.

V2: ci and si also need to call the detect function.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/vi: move virtualization detection forward
Xiangliang Yu [Mon, 9 Jan 2017 03:49:27 +0000 (11:49 +0800)]
drm/amdgpu/vi: move virtualization detection forward

Move the detection forward into vi_set_ip_blocks function, then
add ip blocks virtualization need if device is VF.

V2: add ip blocks according to asic type.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/virt: rename fieldes of virtualization structure
Xiangliang Yu [Mon, 9 Jan 2017 23:06:57 +0000 (18:06 -0500)]
drm/amdgpu/virt: rename fieldes of virtualization structure

Use acronym to rename fields to make easy to spell out.

Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu/gfx8: add support kernel interface queue(KIQ)
Xiangliang Yu [Fri, 23 Dec 2016 07:00:01 +0000 (15:00 +0800)]
drm/amdgpu/gfx8: add support kernel interface queue(KIQ)

KIQ is queue-memory based initialization method: setup KIQ queue
firstly, then send command to KIQ to setup other queues, without
accessing registers.

For virtualization, need KIQ to access virtual function registers
when running on guest mode.

V2: use amdgpu_bo_create/free_kernel to allocate BO.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: PCI I/O bar can be disabled
Amber Lin [Wed, 4 Jan 2017 13:06:58 +0000 (08:06 -0500)]
drm/amdgpu: PCI I/O bar can be disabled

PCI I/O bar can be disabled in VBIOS to save the resource. It is often
disabled in large aperture VBIOS. Don't call it an error.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: change function name to make code more readable
Rex Zhu [Thu, 29 Dec 2016 07:30:38 +0000 (15:30 +0800)]
drm/amd/powerplay: change function name to make code more readable

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine smumgr code
Rex Zhu [Thu, 29 Dec 2016 07:23:44 +0000 (15:23 +0800)]
drm/amd/powerplay: refine smumgr code

1. delete asic_smum_init functions, export asic private functions
   to smumgr directly, make code more readable.
2. create asic private data in asic_init_func.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix memory leak in smu7_hwmgr
Rex Zhu [Wed, 28 Dec 2016 12:15:45 +0000 (20:15 +0800)]
drm/amd/powerplay: fix memory leak in smu7_hwmgr

add pp_smu7_thermal_fini function to free related
data when smu7_hwmgr_fini.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix memory leak in cz_hwmgr.c
Rex Zhu [Wed, 28 Dec 2016 12:14:44 +0000 (20:14 +0800)]
drm/amd/powerplay: fix memory leak in cz_hwmgr.c

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: not free hwmgr/smumgr in asic private functions.
Rex Zhu [Mon, 2 Jan 2017 10:37:36 +0000 (18:37 +0800)]
drm/amd/powerplay: not free hwmgr/smumgr in asic private functions.

struct smumgr/hwmgr will be freed on amd_powerplay_destory

and if we free them in one of asic private functions, other private
date may not be freed. for example: power state and power table
in hwmgr.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: not use module parameter in powerplay.
Rex Zhu [Wed, 28 Dec 2016 11:50:58 +0000 (19:50 +0800)]
drm/amd/powerplay: not use module parameter in powerplay.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine powerplay interface.
Rex Zhu [Wed, 28 Dec 2016 11:43:23 +0000 (19:43 +0800)]
drm/amd/powerplay: refine powerplay interface.

v2: add pp_check function to check pp_instance
   valid.

1. powerplay export two new interface to amdgpu,
   amd_powerplay_create/amd_powerplay_destroy.
2. create pp_instance/smumgr/hwmgr/eventmgr in
   early init, destroy them when lata_fini.
3. in sw_init, create and init asic private smumgr
   data, and free them when sw_fini.
4. in hw_init, create and init asic private hwmgr
   data, and free them when hw_fini.
5. export powerplay state: PP_DPM_DISABLED.
   when user disabled powerplay or hwmgr/eventmgr
   init failed, powerplay return this state to amdgpu.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use same enter/exit safe mode for gfx_8.
Rex Zhu [Wed, 21 Dec 2016 12:32:38 +0000 (20:32 +0800)]
drm/amdgpu: use same enter/exit safe mode for gfx_8.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add profiling mode in dpm level
Rex Zhu [Fri, 23 Dec 2016 07:24:37 +0000 (15:24 +0800)]
drm/amd/powerplay: add profiling mode in dpm level

In some case, App need to run under max stable clock.
so export profiling mode: GFX CG was disabled.
and user can select the max stable clock of the device.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: delete dead definitions of dpm_ip_funcs
Rex Zhu [Wed, 28 Dec 2016 03:09:00 +0000 (11:09 +0800)]
drm/amdgpu: delete dead definitions of dpm_ip_funcs

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: delete dead module parameter:amdgpu_powerplay.
Rex Zhu [Tue, 27 Dec 2016 07:51:45 +0000 (15:51 +0800)]
drm/amdgpu: delete dead module parameter:amdgpu_powerplay.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix issue can't load another smu firmware.
Rex Zhu [Thu, 15 Dec 2016 09:39:04 +0000 (17:39 +0800)]
drm/amd/powerplay: fix issue can't load another smu firmware.

need to release failed smu firmware before load another
firmware.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine code in cz_smumgr.c
Rex Zhu [Mon, 19 Dec 2016 05:10:58 +0000 (13:10 +0800)]
drm/amd/powerplay: refine code in cz_smumgr.c

cz_smu_init will be called in sw_init.
so it should not touch other blocks's
firmware as they were not ready.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix bug dpm level unexpectly be reset to auto.
Rex Zhu [Fri, 23 Dec 2016 08:08:12 +0000 (16:08 +0800)]
drm/amd/powerplay: fix bug dpm level unexpectly be reset to auto.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: Unify dpm level defines
Rex Zhu [Fri, 23 Dec 2016 06:39:41 +0000 (14:39 +0800)]
drm/amd/powerplay: Unify dpm level defines

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: delete dpm code for Cz/St.
Rex Zhu [Fri, 23 Dec 2016 06:07:25 +0000 (14:07 +0800)]
drm/amd/powerplay: delete dpm code for Cz/St.

The powerplay implementation has been the default for a
while now.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: update all printk to pr_* on smumgr
Huang Rui [Mon, 26 Dec 2016 07:09:33 +0000 (15:09 +0800)]
drm/amd/powerplay: update all printk to pr_* on smumgr

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: update all printk to pr_* on hwmgr
Huang Rui [Mon, 26 Dec 2016 07:00:22 +0000 (15:00 +0800)]
drm/amd/powerplay: update all printk to pr_* on hwmgr

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: update all printk to pr_* on eventmgr
Huang Rui [Mon, 26 Dec 2016 07:11:34 +0000 (15:11 +0800)]
drm/amd/powerplay: update all printk to pr_* on eventmgr

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: refine print message for amd_powerplay
Huang Rui [Mon, 26 Dec 2016 06:24:05 +0000 (14:24 +0800)]
drm/amd/powerplay: refine print message for amd_powerplay

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: reshuffle headers to make pr_fmt macro before <linux/xxx.h>
Huang Rui [Mon, 26 Dec 2016 06:05:30 +0000 (14:05 +0800)]
drm/amd/powerplay: reshuffle headers to make pr_fmt macro before <linux/xxx.h>

This patch reshuffles headers to define pr_fmt before <linux/xxx.h>.
It can avoid pr_fmt redefine warnning from linux/xxx.h like below:

CC [M]  /home/ray/gpu/BUILD/x86_64/linux/drivers/gpu/drm/amd/amdgpu//../powerplay/amd_powerplay.o
/home/ray/gpu/BUILD/x86_64/linux/drivers/gpu/drm/amd/amdgpu//../powerplay/amd_powerplay.c:24:0: warning: "pr_fmt" redefined
 #define pr_fmt(fmt) "[powerplay] " fmt
 ^
In file included from include/linux/kernel.h:13:0,
                 from include/linux/list.h:8,
                 from include/linux/agp_backend.h:33,

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add prefix for all powerplay pr_* prints
Huang Rui [Fri, 23 Dec 2016 02:45:07 +0000 (10:45 +0800)]
drm/amd/powerplay: add prefix for all powerplay pr_* prints

Powerplay will use them instead of raw printk, and we can dynamic
change the debug level with it.

The prefix is like below:

[  xxx.xxxxxx] amdgpu: [powerplay] ...

Suggested-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Cc: Arindam Nath <Arindam.Nath@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: refine gfx_v8 pg code.
Rex Zhu [Wed, 14 Dec 2016 09:14:16 +0000 (17:14 +0800)]
drm/amdgpu: refine gfx_v8 pg code.

move en/disable GFX CP/SMU_HS PG to
function gfx_v8_0_set_powergating_state

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add drm light sleep support for Vi
Rex Zhu [Thu, 8 Dec 2016 02:58:15 +0000 (10:58 +0800)]
drm/amdgpu: add drm light sleep support for Vi

v2: fix copy error.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: add cgs interface for enter/exit rlc safe mode.
Rex Zhu [Wed, 21 Dec 2016 12:30:58 +0000 (20:30 +0800)]
drm/amdgpu: add cgs interface for enter/exit rlc safe mode.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Refine the way to get atom bios
Ken Xue [Wed, 21 Dec 2016 10:35:28 +0000 (18:35 +0800)]
drm/amdgpu: Refine the way to get atom bios

There are several ways to check out a ATOMBIOS. In previous codes, try
a new way to fetch out vbios/rom, until current vbios/rom is started with
0x55aa, then check if this vbios is ATOMBIOS. Now, try a new way to fetch
out vbios until all flags of ATOMBIOS are verified.

Signed-off-by: Ken Xue <Ken.Xue@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines
Harry Wentland [Mon, 28 Nov 2016 22:00:20 +0000 (17:00 -0500)]
drm/amd/amdgpu: Add DPHY_SCRAM_CNTL register defines

This is required for DP HBR2 test pattern

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Add HDMI_DATA_SCRAMBLE register definition
Harry Wentland [Mon, 28 Nov 2016 21:30:24 +0000 (16:30 -0500)]
drm/amd/amdgpu: Add HDMI_DATA_SCRAMBLE register definition

This is required by HDMI 2.0

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup useless extern functions
Huang Rui [Sat, 17 Dec 2016 05:08:44 +0000 (13:08 +0800)]
drm/amdgpu: cleanup useless extern functions

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: cleanup useless smu_ucode_xfer_vi.h
Huang Rui [Sat, 17 Dec 2016 05:07:30 +0000 (13:07 +0800)]
drm/amdgpu: cleanup useless smu_ucode_xfer_vi.h

This header won't be used at amdgpu, it moved to powerplay.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: fix request smc_sk firmware case
Huang Rui [Mon, 19 Dec 2016 07:15:35 +0000 (15:15 +0800)]
drm/amd/powerplay: fix request smc_sk firmware case

This patch fixes firmware request error on polaris protection mode.
Because we need load smc_sk instead of smc under security protection
mode.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Tested-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/powerplay: add request_firmware/release_firmware for smu7
Huang Rui [Thu, 15 Dec 2016 02:55:09 +0000 (10:55 +0800)]
drm/amd/powerplay: add request_firmware/release_firmware for smu7

Signed-off-by: Huang Rui <ray.huang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: use designated initializers
Kees Cook [Sat, 17 Dec 2016 01:02:32 +0000 (17:02 -0800)]
drm/amdgpu: use designated initializers

Prepare to mark sensitive kernel structures for randomization by making
sure they're using designated initializers. These were identified during
allyesconfig builds of x86, arm, and arm64, with most initializer fixes
extracted from grsecurity.

Signed-off-by: Kees Cook <keescook@chromium.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amdgpu: Remove checking for atombios
Nils Wallménius [Wed, 14 Dec 2016 20:52:45 +0000 (21:52 +0100)]
drm/amdgpu: Remove checking for atombios

This is a left over from radeon, amdgpu doesn't support any
non-atombios parts and amdgpu_device_init would bail if the
check for atombios failed anyway.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Signed-off-by: Nils Wallménius <nils.wallmenius@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
7 years agodrm/amd/amdgpu: Widen mmio trace register address width
Tom St Denis [Wed, 14 Dec 2016 15:52:00 +0000 (10:52 -0500)]
drm/amd/amdgpu: Widen mmio trace register address width

Support wider address spaces, make it 32-bit so we don't have to
revisit this for a while.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>