fb: add support of LCD display controller on pxa168/910 (base layer)
This driver is originally written by Lennert, modified by Green to be
feature complete, and ported by Jun Nie and Kevin Liu for pxa168/910
processors.
The patch adds support for the on-chip LCD display controller, it
currently supports the base (graphics) layer only.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com> Signed-off-by: Green Wan <gwan@marvell.com> Cc: Peter Liao <pliao@marvell.com> Signed-off-by: Jun Nie <njun@marvell.com> Signed-off-by: Kevin Liu <kliu5@marvell.com> Acked-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
[ARM] 5552/1: ep93xx get_uart_rate(): use EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCN
ep93xx: get_uart_rate() uses the constants EP93XX_SYSCON_CLOCK_CONTROL
and EP93XX_SYSCON_CLOCK_UARTBAUD, which no longer exist. Use
EP93XX_SYSCON_PWRCNT and EP93XX_SYSCON_PWRCNT_UARTBAUD instead
Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Linus Walleij [Sun, 7 Jun 2009 22:27:31 +0000 (23:27 +0100)]
[ARM] 5544/1: Trust PrimeCell resource sizes
I found the PrimeCell/AMBA Bus drivers distrusting the resource
passed in as part of the struct amba_device abstraction. This
patch removes all hard coded resource sizes found in the PrimeCell
drivers and move the responsibility of this definition back to
the platform/board device definition, which already exist and
appear to be correct for all in-tree users of these drivers.
We do this using the resource_size() inline function which was
also replicated in the only driver using the resource size, so
that has been changed too. The KMI_SIZE was left in kmi.h in case
someone likes it. Test-compiled against Versatile and Integrator
defconfigs, seems to work but I don't posess these boards and
cannot test them.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] pxa/sharpsl_pm: cleanup of gpio-related code.
Replace calls to pxa_gpio_mode with respective gpio_request() /
gpio_direction_input(). In principle these calls can be dropped as
the only use of those GPIO are IRQs and IRQ code does setup GPIO
correctly.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Linus Walleij [Tue, 9 Jun 2009 07:11:42 +0000 (08:11 +0100)]
[ARM] 5546/1: ARM PL022 SSP/SPI driver v3
This adds a driver for the ARM PL022 PrimeCell SSP/SPI
driver found in the U300 platforms as well as in some
ARM reference hardware, and in a modified version on the
Nomadik board.
Reviewed-by: Alessandro Rubini <rubini-list@gnudd.com> Reviewed-by: Russell King <linux@arm.linux.org.uk> Reviewed-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch updates omap_4430sdp_defconfig to add SMP and LOCAL_TIMER
support for OMAP4430 SDP platform.
Additionally the defconfig is made in sync with 2.6.30-rc7
ARM: OMAP4: SMP: Add mpu timer support for OMAP4430
This patch adds SMP platform specific parts for local(mpu) timer support
for OMAP4430 platform. Each Cortex-a9 core has it's own local timer in the
MPU domain. These timers are not in wakeup domain.
This patch adds SMP platform files support for OMAP4430SDP. TI's OMAP4430
SOC is based on ARM Cortex-A9 SMP architecture. It's a dual core SOC
with GIC used for interrupt handling and SCU for cache coherency.
Nicolas Pitre [Wed, 3 Jun 2009 01:43:45 +0000 (21:43 -0400)]
[ARM] Kirkwood: create a mapping for the Security Accelerator SRAM
Always creating the physical mapping should do no harm, so let's remove
the interface that was provided for its optional creation and make the
mapping static.
The security accelerator which can act as a puppet player for the crypto
engine requires its commands in the sram. This patch adds support for the
phys mapping and creates a platform device for the actual driver.
[ nico: renamed device name from "mv,orion5x-crypto" to "mv_crypto"
so to match the module name and be more generic for Kirkwood use ]
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Thomas Reitmayr [Mon, 1 Jun 2009 11:38:33 +0000 (13:38 +0200)]
[ARM] orion5x: Change names of defines for Reset-Out-Mask register
The name of the define for the Reset-Out-Mask register as well as its
bit for the watchdog reset are changed to match the names used for
Kirkwood (which in turn match the processor specification more
closely). There is no functional change.
This patch prepares for adding orion5x_wdt as a platform device to
Kirkwood.
Signed-off-by: Thomas Reitmayr <treitmayr@devbase.at> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Nicolas Pitre [Wed, 27 May 2009 02:06:25 +0000 (22:06 -0400)]
[ARM] Kirkwood: only map peripheral register space once
Just like commit 1419468ab548, let's save some TLB entries by making
ioremap() return pointers into the boot-time Kirkwood peripheral
iotable mapping whenever someone tries to ioremap any part of the Kirkwood
peripheral register space.
Nicolas Pitre [Fri, 15 May 2009 04:42:36 +0000 (00:42 -0400)]
[ARM] orion: make sure sched_clock() usage of cnt32_to_63() is safe
With a TCLK = 200MHz, the half period of the hardware timer is roughly
10 seconds. Because cnt32_to_63() must be called at least once per
half period of the base hardware counter, it is a bit risky to rely
solely on scheduling to generate frequent enough calls. Let's use a
kernel timer to ensure this.
Stefan Agner [Tue, 12 May 2009 17:30:41 +0000 (10:30 -0700)]
[ARM] orion: sched_clock implementation for orion platforms
sched_clock implementation for orion platform. Its realized using
free-running clocksource timer, which provides a resolution of 7.5ns
(depending on tclk). It's derived from PXA's sched_clock implementation.
[ nico: renamed orion2ns to tclk2ns, fixed max value in the comment ]
Signed-off-by: Stefan Agner <stefan.agner@yahoo.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Rabeeh Khoury [Tue, 24 Mar 2009 14:10:15 +0000 (16:10 +0200)]
[ARM] Kirkwood: CPU idle driver
The patch adds support for Kirkwood cpu idle.
Two idle states are defined:
1. Wait-for-interrupt (replacing default kirkwood wfi)
2. Wait-for-interrupt and DDR self refresh
Signed-off-by: Rabeeh Khoury <rabeeh@marvell.com> Signed-off-by: Nicolas Pitre <nico@marvell.com>
Martin Fuzzey [Sat, 6 Jun 2009 14:36:44 +0000 (16:36 +0200)]
MXC : update i.MX21 clock support for USB host.
* Use correct clkdev style usb clock name
* Implement rate setting for USB clock
* Introduce _clk_generic_round_rate to factorize the (now 3) uses of rounding code.
Signed-off-by: Martin Fuzzey <mfuzzey@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Mike Rapoport [Thu, 4 Jun 2009 07:44:51 +0000 (10:44 +0300)]
[ARM] pxa/cm-x300: use OBM configuration for NAND flash
CM-X300 can be assembled with different NAND flashes from different
manufacturers. Adding their configuration to the kernel is impractical,
therefore we will use the default NAND controller settings set up by the
bootloader.
Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Robert Jarzmik [Sun, 17 May 2009 21:03:55 +0000 (23:03 +0200)]
[ARM] pxa: add vcc_core regulation for cpufreq on pxa2xx
Add voltage regulation capability to pxa2xx cpufreq
driver. The cpufreq will ask for a "vcc_core" regulator to
the regulator framework.
If a regulator is found at probe time, it will be used with
values specified in PXA270 Electrical, Mechanical, and
Thermal Specifications.
If not, it will be assumed for now that frequency change
will work without voltage control. This assumes that the
IPL/SPL installs sane values to an existing voltage
regulator (ie. voltage high enough to support the full
range).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Philipp Zabel [Fri, 17 Apr 2009 09:47:57 +0000 (11:47 +0200)]
[ARM] pxa: allow IRQ_BOARD_END to be customized and make zylonite to use it
The default value is 16 IRQs. Zylonite needs 32, ASIC3 based boards need 70.
My problem is still that due to the way IRQ_GPIO is hardcoded, ASIC3 based boards
need 70 IRQs starting at IRQ_BOARD_START. If I define ASIC3 IRQs similar to LoCoMo
or SA1111, things break as soon as something selects PXA_HAVE_BOARD_IRQS.
Increasing the default number of board IRQs to 70 instead doesn't seem very nice.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
Eric Miao [Mon, 13 Apr 2009 10:51:31 +0000 (18:51 +0800)]
[ARM] pxa: allow PWM ID base number to be specified in pwm_id_table
PWMs on PXA168/910 start at number 1 instead of 0, (i.e. PWM1/2/3/4 instead
of PWM0/1/2/3 on PXA25x/PXA27x/PXA3xx). Allow this number to be specified
in pwm_id_table.
Linus Walleij [Mon, 1 Jun 2009 13:27:26 +0000 (14:27 +0100)]
[ARM] 5535/1: U300 Makefile.boot
The Makefile.boot file for the U300 port. This will compile the
kernel for different ZRELADDR depending on the location of
physical RAM in the chosen configuration.
Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
[ARM] 5541/1: serial/amba-pl011.c: add support for the modified port found in Nomadik
The Nomadik 8815 SoC has a slightly modified version of the PL011 block.
The patch uses the different ID value as a key to select a vendor
structure that is used to keep track of the differences, as suggested
by Russell King.
Signed-off-by: Alessandro Rubini <rubini@unipv.it> Acked-by: Andrea Gallo <andrea.gallo@stericsson.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>