Suraj Kandpal [Mon, 28 Aug 2023 05:42:55 +0000 (11:12 +0530)]
drm/i915/vdsc: Add a check for dsc split cases
In intel_vdsc_get_config we only read the primary dsc engine register
and not take into account if the other dsc engine is in use and if
both registers have the same value or not this patche fixes that by
adding a check.
--v3
-Remove superfluos new line [Jani]
-Fix register naming [Jani]
--v5
-pps_temp0/pps_temp1 can be assigned where they are used [Ankit]
Suraj Kandpal [Mon, 28 Aug 2023 05:42:54 +0000 (11:12 +0530)]
drm/i915/vdsc: Refactor dsc register field macro
This patch refactors dsc register related macros that prepares
the values to be written in the register. The current bit shifting
looks bad and going forward will not serve our purpose to readout
dsc register field values the change was suggested by Jani Nikula.
Take into account dma fences in dirtyfb callback. If there is no
unsignaled dma fences perform flush immediately. If there are
unsignaled dma fences perform invalidate and add callback which will
queue flush when the fence gets signaled.
v4:
- Move invalidate before callback is added
v3:
- Check frontbuffer bits before adding any fence fb
- Flush only when adding fence cb succeeds
v2: Use dma_resv_get_singleton
drm/i915: Add new frontbuffer tracking interface to queue flush
We want to wait dma fences in dirtyfb ioctl. As we don't want to make
dirtyfb ioctl as blocking call we need to use
dma_fence_add_callback. Callback used for dma_fence_add_callback is
called from atomic context. Due to this we need to add a new
frontbuffer tracking interface to queue flush.
v3:
- Check schedule work success rather than work being pending
- Init flush work when frontbuffer struct is initialized
v2: Check if flush work is already pending
We are planning to move flush performed from work queue. This
means it is possible to have invalidate -> flip -> flush sequence.
Handle this by clearing possible busy bits on flip.
We are planning to move flush performed from work queue. This
means it is possible to have invalidate -> flip -> flush sequence.
Handle this by clearing possible busy bits on flip.
Jani Nikula [Thu, 31 Aug 2023 10:51:44 +0000 (13:51 +0300)]
media: cec: core: add note about *_from_edid() function usage in drm
In the drm subsystem, the source physical address is, in most cases,
available without having to parse the EDID again. Add notes about
preferring to use the pre-parsed address instead.
Jani Nikula [Fri, 25 Aug 2023 13:01:20 +0000 (16:01 +0300)]
drm/cec: add drm_dp_cec_attach() as the non-edid version of set edid
Connectors have source physical address available in display
info. There's no need to parse the EDID again for this. Add
drm_dp_cec_attach() to do this.
Seems like the set_edid/unset_edid naming is a bit specific now that
there's no need to pass the EDID at all, so aim for attach/detach going
forward.
Suraj Kandpal [Wed, 30 Aug 2023 07:34:38 +0000 (13:04 +0530)]
drm/i915/hdcp: Use correct aux for capability check scenario
Send the correct aux rather than the one derived
from intel_digital_port so that the HDCP version of both monitors
are fetched rather than just the primary one's
Suraj Kandpal [Wed, 30 Aug 2023 07:34:37 +0000 (13:04 +0530)]
drm/i915/hdcp: Use intel_connector as argument for hdcp_2_2_capable
Use intel_connector as argument instead of intel_digital_port in
hdcp_2_2_capable function and dig_port can be later derived from
connector. This will help with getting the correct hdcp version of
particular monitor in a MST setup.
Split out frontbuffer related declarations and static inlines from
gem/i915_gem_object.h into new gem/i915_gem_object_frontbuffer.h.
The main goal is to reduce header interdependencies. With
gem/i915_gem_object.h including display/intel_frontbuffer.h,
modification of the latter causes a whopping 300+ objects to be rebuilt,
while many of the source files actually needing it aren't explicitly
including it at all.
After the change, only 21 objects depend on display/intel_frontbuffer.h,
directly or indirectly.
Imre Deak [Wed, 30 Aug 2023 14:04:21 +0000 (17:04 +0300)]
drm/i915/mtl: Add TC port lockdep assert to AUX power well enabling
Similarly to earlier platforms, assert in the MTL AUX power well
enabling handler for TC AUX CH power wells that the TC port using the
AUX CH is locked.
Imre Deak [Wed, 30 Aug 2023 14:04:20 +0000 (17:04 +0300)]
drm/i915/dp: Drop redundant AUX power get/put in intel_dp_force()
intel_dp_force() takes the AUX power reference as required by the DP AUX
transactions in intel_dp_set_edid(). However the low level AUX handler
takes this reference already so the get/put in intel_dp_force() can be
dropped. This also fixes a problem where the TC port mode changed while
the AUX power well was enabled.
Ville Syrjälä [Fri, 25 Aug 2023 13:44:30 +0000 (16:44 +0300)]
drm/i915/sdvo: Rework DDC bus handling
Each SDVO device can have up to three sets of DDC pins.
Currently we just register a single i2c_adapter for the
entire SDVO device and semi-randomly pick the "correct"
set of DDC pins during intel_sdvo_tmds_sink_detect().
This doesn't make any real sense especially if we have
multiple outputs each with their own dedicated DDC bus.
Let's clean up this mess and register a dedicated
i2c_adapter for each of the possible pin pairs. Each
output (ie. connector) can then pick the correct i2c_adapter
to use for its DDC bus. And we can just switch over to
drm_connector_init_with_ddc() to take care of the
connector->ddc association, which also populates the
"ddc" sysfs symlink as a bonus.
And now that things are based on the actual connector we can
also nuke the sketchy sdvo->controller_output thing.
Ville Syrjälä [Fri, 25 Aug 2023 13:44:29 +0000 (16:44 +0300)]
drm/i915/sdvo: Get rid of the per-connector i2c symlink
We should switch over to the standard "ddc" per-connector
symlink instead of rolling our own thing. The i2c specific
symlink is also in the way of reworking the SDVO DDC handling
(which is a mess atm) so get rid of it.
Ville Syrjälä [Fri, 25 Aug 2023 13:44:26 +0000 (16:44 +0300)]
drm/i915/sdvo: Nuke attached_output tracking
Instead of operating on the output the user specified (via the
connector) the current code tends to operate on whichever outputs
it has detected as attached. That is not how the kms uapi is supposed
to work. So simply get rid of attached_outputs and instead directly
operate on the output the user has specified.
Suraj Kandpal [Mon, 28 Aug 2023 06:34:01 +0000 (12:04 +0530)]
drm/i915/hdcp: Adjust timeout for read in DPMST Scenario
For dpmst hdcp scenario increase the message timeout based
on the number of ports connected as each port needs to be
validated and each will take the prescribed amount of time
for the respective msg_id and total timeout will be
original_timeout * num_ports.
--v2
-Add justification for Adjusting the timeout [Arun]
Suraj Kandpal [Mon, 28 Aug 2023 06:34:00 +0000 (12:04 +0530)]
drm/i915/hdcp: Send the correct aux for DPMST HDCP scenario
Up until now we were sending the base aux stored in dig_port which
is not correct as this causes an issue when monitor is connected via
a DPMST hub causing it to be remote hence we end up seeing AUX
failures so let's send the remote aux in case of DPMST.
Suraj Kandpal [Mon, 28 Aug 2023 06:38:51 +0000 (12:08 +0530)]
drm/i915/hdcp: Propagate aux info in DP HDCP functions
We were propagating dig_port info to dp hdcp2 specific functions.
Let us clean that up and send intel_connector in the following
functions: intel_dp_hdcp2_wait_for_msg, get_receiver_id_list_rx_info,
intel_dp_hdcp2_read_rx_status.
This optimises mst scenarios where aux ends up being remote and not
stored in dig_port and dig_port can always be derived from
intel_connector if needed.
Suraj Kandpal [Mon, 28 Aug 2023 06:33:58 +0000 (12:03 +0530)]
drm/i915/hdcp: Use intel_connector argument in intel_hdcp_shim
Update intel_hdcp_shim funcs specifically read_2_2_message,
write_2_2_message and config_stream_type to use intel_connector
argument instead of intel_digital_port as this will help in getting
correct aux later for dp mst scenarios also already hdcp funcs
derive digital_port from connector and then many funcs again get back
the connector from dig_port which doesn't seem right.
Connector specific hdcp functions can derive dig_port on need basis.
Jani Nikula [Thu, 17 Aug 2023 15:53:08 +0000 (18:53 +0300)]
drm/i915/color: move pre-SKL gamma and CSC enable read to intel_color
Abstract the register access better. The DSPCNTR read could be moved to
either i9xx_plane.c or intel_color.c. The latter feels better, even if
the register is written in the former.
Jani Nikula [Thu, 17 Aug 2023 15:53:04 +0000 (18:53 +0300)]
drm/i915/color: move CHV CGM pipe mode read to intel_color
Add color .get_config hook to read config other than LUTs and CSCs, and
start off with CHV CGM pipe mode to abstract the platform specific
register access better.
Ville Syrjälä [Wed, 5 Jul 2023 20:21:15 +0000 (23:21 +0300)]
drm/i915/sdvo: Pick the TV dotclock from adjusted_mode
port_clock is what the encoder/dpll code is supposed to calculate,
it is not the input clock. Use the dotclock as the target we're
trying to achieve instead.
TODO: the SDVO TV clocking is a mess atm and needs further work
Ville Syrjälä [Wed, 5 Jul 2023 20:21:14 +0000 (23:21 +0300)]
drm/i915: Fully populate crtc_state->dpll
Call *_calc_dpll_params() even in cases where the encoder has
computed the DPLL params for us.
The SDVO TV output code doesn't populate crtc_state->dpll.dot
leading to the dotclock getting calculated as zero, and that
leads to all kinds of real problems. The g4x DP code also
doesn't populate the derived dividers nor .vco, which could
also create some confusion.
Ville Syrjälä [Wed, 5 Jul 2023 20:21:13 +0000 (23:21 +0300)]
drm/i915: Don't warn about zero N/P in *_calc_dpll_params()
Allow *_calc_dpll_params() to be called even if the N/P dividers
are zero without warning. We'll want to call these to make sure the
derived values are fully computed, but not all users (VLV DSI in
particular) even enable the DPLL and thus the dividers will
be left at zero.
It could also be possible that the BIOS has misprogrammed the DPLL
(IIRC happened with some SNB machines with 4k+ displays) and thus
we'll currently generate a lot of dmesg spew. Better be silent and
just let the normal state checker/etc. deal with any driver bugs.
Ville Syrjälä [Wed, 5 Jul 2023 20:21:10 +0000 (23:21 +0300)]
drm/i915/sdvo: Issue SetTargetOutput prior to GetAttachedDisplays
I have at least one SDVO device (some Lenovo DVI-I ADD2 card,
based on Conexant CX25904) where GetAttachedDisplays returns
success but fails to report any attached displays unless we
precede the command with a SetTargetOutput. Make it so.
I wasn't able to spot anything in the SDVO spec stating that
this should be necessary, but real world wins over spec.
Imre Deak [Tue, 22 Aug 2023 11:30:15 +0000 (14:30 +0300)]
drm/i915: Fix HPD polling, reenabling the output poll work as needed
After the commit in the Fixes: line below, HPD polling stopped working
on i915, since after that change calling drm_kms_helper_poll_enable()
doesn't restart drm_mode_config::output_poll_work if the work was
stopped (no connectors needing polling) and enabling polling for a
connector (during runtime suspend or detecting an HPD IRQ storm).
After the above change calling drm_kms_helper_poll_enable() is a nop
after it's been called already and polling for some connectors was
disabled/re-enabled.
Fix this by calling drm_kms_helper_poll_reschedule() added in the
previous patch instead, which reschedules the work whenever expected.
Fixes: d33a54e3991d ("drm/probe_helper: sort out poll_running vs poll_enabled") CC: stable@vger.kernel.org # 6.4+ Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: dri-devel@lists.freedesktop.org Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230822113015.41224-2-imre.deak@intel.com
Imre Deak [Tue, 22 Aug 2023 11:30:14 +0000 (14:30 +0300)]
drm: Add an HPD poll helper to reschedule the poll work
Add a helper to reschedule drm_mode_config::output_poll_work after
polling has been enabled for a connector (and needing a reschedule,
since previously polling was disabled for all connectors and hence
output_poll_work was not running).
This is needed by the next patch fixing HPD polling on i915.
Matt Roper [Mon, 21 Aug 2023 18:06:28 +0000 (11:06 -0700)]
drm/i915/display: Eliminate IS_METEORLAKE checks
Most of the IS_METEORLAKE checks in the display code shouldn't actually
be tied to MTL as a platform, but rather to the Xe_LPD+ display IP
(which is used in MTL, but may show up again in future platforms). In
cases where we're trying to match that specific IP, use a version check
against IP_VER(14, 0). For cases where we're just handling new behavior
introduced by this IP (but which may also be inherited by future IP as
well), use a ver >= 14 check.
The one exception here is the stolen memory workaround Wa_13010847436
(which is mislabelled as "Wa_22018444074" in the code). That's truly a
MTL-specific issue rather than being tied to any of the IP blocks, so
leaving the condition as IS_METEORLAKE is correct there.
Matt Roper [Mon, 21 Aug 2023 18:06:26 +0000 (11:06 -0700)]
drm/i915: Eliminate IS_MTL_DISPLAY_STEP
Stepping-specific display behavior shouldn't be tied to MTL as a
platform, but rather specifically to the Xe_LPD+ IP. Future non-MTL
platforms may re-use this IP and will need to follow the exact same
logic and apply the same workarounds. IS_MTL_DISPLAY_STEP() is dropped
in favor of a new macro IS_DISPLAY_IP_STEP() that only checks the
display IP version.
v2:
- Rename macro to IS_DISPLAY_IP_STEP for consistency with the
corresponding GT macro and handle steppings the same way.
v3:
- Drop the automatic "STEP_" pasting.
v4:
- Implement IS_DISPLAY_IP_STEP on top of IS_DISPLAY_IP_RANGE /
IS_DISPLAY_STEP building blocks and make the parameters from/until
instead of begin/fixed. (Jani)
- Fix usage details in comment.
v5:
- Tweak macro comment. (Gustavo)
Ankit Nautiyal [Thu, 17 Aug 2023 14:24:59 +0000 (19:54 +0530)]
drm/i915/dp: Check if force_dsc_output_format is possible
Currently for testing an output format with DSC, we just force the
output format, without checking if it can be supported.
This also creates an issue where there is a PCON which might need to
convert from forced output format to the format to sink format.
Ankit Nautiyal [Thu, 17 Aug 2023 14:24:57 +0000 (19:54 +0530)]
drm/i915/dp: Get optimal link config to have best compressed bpp
Currently, we take the max lane, rate and pipe bpp, to get the maximum
compressed bpp possible. We then set the output bpp to this value.
This patch provides support to have max bpp, min rate and min lanes,
that can support the min compressed bpp.
v2:
-Avoid ending up with compressed bpp, same as pipe bpp. (Stan)
-Fix the checks for limits->max/min_bpp while iterating over list of
valid DSC bpcs. (Stan)
v3:
-Refactor the code to have pipe bpp/compressed bpp computation and slice
count calculation separately for different cases.
v4:
-Separate the pipe_bpp calculation for eDP and DP.
v5:
-Get rid of magic numbers for max and min bpp,
and improve documentation. (Stan).
-Use functions for {src_sink}_{min_max}_compressed_bpp (Ville).
v6:
-Remove lines to set link config to max.
v7:
-Split the part to separate edp and dp functions for computing DSC BPP
into separate patch.
v8:
-Separate mechanism to get compressed bpp for ICL,TGL and XELPD+.
Ankit Nautiyal [Thu, 17 Aug 2023 14:24:51 +0000 (19:54 +0530)]
drm/i915/dp: Check min bpc DSC limits for dsc_force_bpc also
For DSC the min BPC is 8 for ICL+ and so the min pipe_bpp is 24.
Check this condition for cases where bpc is forced by debugfs flag
dsc_force_bpc. If the check fails, then WARN and ignore the debugfs
flag.
For MST case the pipe_bpp is already computed (hardcoded to be 24),
and this check is not required.
Ankit Nautiyal [Thu, 17 Aug 2023 14:24:45 +0000 (19:54 +0530)]
drm/i915/dp: Use consistent name for link bpp and compressed bpp
Currently there are many places where we use output_bpp for link bpp and
compressed bpp.
Lets use consistent naming:
output_bpp : The intermediate value taking into account the
output_format chroma subsampling.
compressed_bpp : target bpp for the DSC encoder.
link_bpp : final bpp used in the link.
For 444 sampling without DSC:
link_bpp = output_bpp = pipe_bpp
For 420 sampling without DSC:
output_bpp = pipe_bpp / 2
link_bpp = output_bpp
For 444 sampling with DSC:
output_bpp = pipe_bpp
link_bpp = compressed_bpp, computed with output_bpp (i.e. pipe_bpp in
this case)
For 420 sampling with DSC:
output_bpp = pipe_bpp/2
link_bpp = compressed_bpp, computed with output_bpp
Ankit Nautiyal [Thu, 17 Aug 2023 14:24:44 +0000 (19:54 +0530)]
drm/i915/dp_mst: Use output_format to get the final link bpp
The final link bpp used to calculate the m_n values depend on the
output_format. Though the output_format is set to RGB for MST case and
the link bpp will be same as the pipe bpp, for the sake of semantics,
lets calculate the m_n values with the link bpp, instead of pipe_bpp.
Ankit Nautiyal [Thu, 17 Aug 2023 14:24:42 +0000 (19:54 +0530)]
drm/i915/dp: Consider output_format while computing dsc bpp
While using DSC the compressed bpp is computed assuming RGB output
format. Consider the output_format and compute the compressed bpp
during mode valid and compute config steps.
For DP-MST we currently use RGB output format only, so continue
using RGB while computing compressed bpp for MST case.
v2: Use output_bpp instead for pipe_bpp to clamp compressed_bpp. (Ville)
Matt Roper [Thu, 10 Aug 2023 23:46:20 +0000 (16:46 -0700)]
drm/i915: Eliminate has_4tile feature flag
We don't really need a feature flag for has_4tile since there's a
well-defined cutover point (DG2) at which all new platforms started
using Tile4 as their Y-major tiling layout. The GT side of the code
already handles Tile4 vs legacy TileY with checks on the IP version
rather than looking at the feature flag, and we can simplify the display
code similarly (which will also make it more self-contained for re-use
in the Xe driver).
Matt Roper [Thu, 10 Aug 2023 23:46:19 +0000 (16:46 -0700)]
drm/i915/selftest: Simplify Y-major tiling in blit selftest
Rather than picking random tiling formats from a pool that contains both
TileY and Tile4 and then trying to replace one with the other depending
on the platform, it's simpler to just use a single enum value that
represents whatever the platform-appropriate Y-major tiling format is
(i.e., Tile4 on Xe_HP and beyond, legacy TileY on earlier platforms).
Matt Roper [Wed, 16 Aug 2023 21:42:04 +0000 (14:42 -0700)]
drm/i915/dg2: Drop pre-production display workarounds
All production DG2 cards have display stepping C0 or later. We can drop
Wa_14013215631 (only applies to pre-C0) and make Wa_14010547955
unconditional (applies to everything B0 and beyond). Also drop the
now-unused IS_DG2_DISPLAY_STEP macro.
Matt Roper [Wed, 16 Aug 2023 21:42:03 +0000 (14:42 -0700)]
drm/i915/dg2: Recognize pre-production hardware
The first production SoC steppings for DG2 were C0 (for G10), B1 (for
G11), and A1 (for G12). This corresponds to PCI revision IDs 0x8, 0x5,
and 0x1 respectively. Add this information to the driver's
pre-production detection.
Gustavo Sousa [Mon, 14 Aug 2023 13:13:29 +0000 (10:13 -0300)]
drm/i915: Simplify intel_cx0_program_phy_lane() with loop
It is possible to generalize the "disable" value for the transmitters to
be a bit mask based on the port width and the port reversal boolean,
with a small exception for DP-alt mode with "x1" port width.
Simplify the code by using such a mask and a for-loop instead of using
switch-case statements.
v2:
- Use (i < 2) instead of (i / 2 == 0) for PHY lane mask selection.
(Jani)
Gustavo Sousa [Mon, 14 Aug 2023 13:13:28 +0000 (10:13 -0300)]
drm/i915/cx0: Add intel_cx0_get_owned_lane_mask()
There are more parts of C10/C20 programming that need to take owned
lanes into account. Define the function intel_cx0_get_owned_lane_mask()
and use it. There will be new users of that function in upcoming
changes.
Anshuman Gupta [Wed, 16 Aug 2023 12:52:16 +0000 (18:22 +0530)]
drm/i915/dgfx: Enable d3cold at s2idle
System wide suspend already has support for lmem save/restore during
suspend therefore enabling d3cold for s2idle and keepng it disable for
runtime PM.(Refer below commit for d3cold runtime PM disable justification)
'commit 66eb93e71a7a ("drm/i915/dgfx: Keep PCI autosuspend control
'on' by default on all dGPU")'
It will reduce the DG2 Card power consumption to ~0 Watt
for s2idle power KPI.
Alan Previn [Wed, 2 Aug 2023 18:25:50 +0000 (11:25 -0700)]
drm/i915/pxp: Optimize GET_PARAM:PXP_STATUS
After recent discussions with Mesa folks, it was requested
that we optimize i915's GET_PARAM for the PXP_STATUS without
changing the UAPI spec.
Add these additional optimizations:
- If any PXP initializatoin flow failed, then ensure that
we catch it so that we can change the returned PXP_STATUS
from "2" (i.e. 'PXP is supported but not yet ready')
to "-ENODEV". This typically should not happen and if it
does, we have a platform configuration issue.
- If a PXP arbitration session creation event failed
due to incorrect firmware version or blocking SOC fusing
or blocking BIOS configuration (platform reasons that won't
change if we retry), then reflect that blockage by also
returning -ENODEV in the GET_PARAM:PXP_STATUS.
- GET_PARAM:PXP_STATUS should not wait at all if PXP is
supported but non-i915 dependencies (component-driver /
firmware) we are still pending to complete the init flows.
In this case, just return "2" immediately (i.e. 'PXP is
supported but not yet ready').
Difference from prio revs:
v3: - Rebase with latest tip that has pulled in setting the
gsc fw load to fail if proxy init fails.
v2: - Use a #define for the default readiness timeout (Vivaik).
- Improve comments around the failing of proxy-init.
v1: - Change the commit msg style to be imperative. (Jani)
- Rename timeout to timeout_ms. (Jani)
- Fix is_fw_err_platform_config to use higher order
param (pxp) first. (Jani)
In the case of failed suspend flow or cases where the kernel does not go
into full suspend but goes from suspend_prepare back to resume_complete,
we get called for a pm_complete but without runtime_pm guaranteed.
Thus, ensure we take the runtime_pm when calling intel_pxp_init_hw
from within intel_pxp_resume_complete.
v2: resume_complete and runtime_resume should abstract a common
helper with different wakeref requirements. (Daniele)
Arun R Murthy [Tue, 8 Aug 2023 04:20:00 +0000 (09:50 +0530)]
drm/i915/dp: Fix LT debug print in SDP CRC enable
The debug print for enabling SDP CRC16 is applicable only for DP2.0, but
this debug print was not within the uhbr check and was always printed.
Fix this by adding proper checks and returning.
On checking DSC1.1 Errata and DSC 1.2 spec the current formula
we were using was incorrect to calculate first_line_bpg_offset.
The new fixed formula is derived from C model.
--v2
-Use clamp function in linux/minmax.h [Ankit]
Imre Deak [Wed, 9 Aug 2023 10:43:07 +0000 (13:43 +0300)]
drm/i915: Don't change the status of forced connectors during HPD poll detect
As described in the previous patch a connector shouldn't change its
status while it's forced to a connected/disconnected state. This can
still happen while running the connector detect function to account for
lost HPD events in a low-power state.
Fix this by reusing the connector detect function which handles a
hotplug event and prevents updating the status for forced connectors as
expected.
Imre Deak [Wed, 9 Aug 2023 10:43:06 +0000 (13:43 +0300)]
drm/i915: Don't change the status of forced connectors during hotplug detect
DRM display connectors forced to a connected/disconnected state via the
drm_connector::force member shouldn't change their status. Atm, this can
still happen in the connector's detect function when called to handle a
hotplug event. This in turn may lead to the GETCONNECTOR ioctl to report
the incorrect state if it's called to return the connector properties
without doing an actual detection (by calling the ioctl with a non-zero
drm_mode_get_connector::count_modes).
Fix the above by updating the connector state during hotplug detect only
if the connector state is not forced.
Imre Deak [Wed, 9 Aug 2023 10:43:05 +0000 (13:43 +0300)]
drm/i915: Avoid endless HPD poll detect loop via runtime suspend/resume
The issue fixed in
commit a8ddac7c9f06 ("drm/i915: Avoid HPD poll detect triggering a new detect cycle")
on VLV, CHV is still present on platforms where the display hotplug
detection functionality is available whenever the device is in D0 state
(hence these platforms switch to HPD polling only when the device is
runtime suspended).
The above commit avoids an endless i915_hpd_poll_init_work() ->
connector detect loop by making sure that by the end of
i915_hpd_poll_init_work() all display power references acquired by the
connector detect functions which can trigger a new cycle (display core
power domain) are dropped. However on platforms where HPD polling is
enabled/disabled only from the runtime suspend/resume handlers, this is
not ensured: for instance eDP VDD, TypeC port PHYs and the runtime
autosuspend delay may still keep the device runtime resumed (via a power
reference acquired during connector detection and hence result in an
endless loop like the above).
Solve the problem described in the above commit on all platforms, by
making sure that a i915_hpd_poll_init_work() -> connector detect
sequence can't take any power reference in the first place which would
trigger a new cycle, instead of relying on these power references to be
dropped by the end of the sequence.
With the default runtime autosuspend delay (10 sec) this issue didn't
happen in practice, since the device remained runtime resumed for the
whole duration of the above sequence. CI/IGT tests however set the
autosuspend delay to 0, which makes the problem visible, see References:
below.
Tested on GLK, CHV.
v2: Don't warn about a requeued work, to account for disabling
polling directly during driver loading, reset and system resume.
Jani Nikula [Tue, 8 Aug 2023 15:53:31 +0000 (18:53 +0300)]
drm/i915/irq: move all PCH irq postinstall calls to display code
Unify on making the calls from display code. Need to add an if ladder in
gen8_de_irq_postinstall() for now, but the function looks like it could
be overall be better split by platform. Something for the future.
The display version check for mtp seems a bit suspect, but this matches
current code.
Jani Nikula [Fri, 4 Aug 2023 08:45:59 +0000 (11:45 +0300)]
drm/i915: fix display probe for IVB Q and IVB D GT2 server
The current display probe is unable to differentiate between IVB Q and
IVB D GT2 server, as they both have the same device id, but different
subvendor and subdevice. This leads to the latter being misidentified as
the former, and should just end up not having a display. However, the no
display case returns a NULL as the display device info, and promptly
oopses.
As the IVB Q case is rare, and we're anyway moving towards GMD ID,
handle the identification requiring subvendor and subdevice as a special
case first, instead of unnecessarily growing the intel_display_ids[]
array with subvendor and subdevice.
Fixes: 69d439818fe5 ("drm/i915/display: Make display responsible for probing its own IP") Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/8991 Cc: Matt Roper <matthew.d.roper@intel.com> Cc: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Luca Coelho <luciano.coelho@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230804084600.1005818-1-jani.nikula@intel.com
Luca Coelho [Thu, 1 Jun 2023 09:03:38 +0000 (12:03 +0300)]
drm/i915/display: pre-initialize some values in probe_gmdid_display()
When intel_display_device_probe() (and, subsequently,
probe_gmdid_display()) returns, the caller expects ver, rel and step
to be initialized. Since there's no way to check that there was a
failure and no_display was returned without some further refactoring,
pre-initiliaze all these values to zero to keep it simple and safe.
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