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9 years agodrm/i915: Update overlay code to do explicit request management
John Harrison [Fri, 29 May 2015 16:43:47 +0000 (17:43 +0100)]
drm/i915: Update overlay code to do explicit request management

The overlay update code path to do explicit request creation and submission
rather than relying on the OLR to do the right thing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update i915_gem_object_sync() to take a request structure
John Harrison [Thu, 18 Jun 2015 12:14:56 +0000 (13:14 +0100)]
drm/i915: Update i915_gem_object_sync() to take a request structure

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the i915_gem_object_sync()
code path.

v2: Much more complex patch to share a single request between the sync and the
page flip. The _sync() function now supports lazy allocation of the request
structure. That is, if one is passed in then that will be used. If one is not,
then a request will be allocated and passed back out. Note that the _sync() code
does not necessarily require a request. Thus one will only be created until
certain situations. The reason the lazy allocation must be done within the
_sync() code itself is because the decision to need one or not is not really
something that code above can second guess (except in the case where one is
definitely not required because no ring is passed in).

The call chains above _sync() now support passing a request through which most
callers passing in NULL and assuming that no request will be required (because
they also pass in NULL for the ring and therefore can't be generating any ring
code).

The exeception is intel_crtc_page_flip() which now supports having a request
returned from _sync(). If one is, then that request is shared by the page flip
(if the page flip is of a type to need a request). If _sync() does not generate
a request but the page flip does need one, then the page flip path will create
its own request.

v3: Updated comment description to be clearer about 'to_req' parameter (Tomas
Elf review request). Rebased onto newer tree that significantly changed the
synchronisation code.

v4: Updated comments from review feedback (Tomas Elf)

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update render_state_init() to take a request structure
John Harrison [Fri, 29 May 2015 16:43:45 +0000 (17:43 +0100)]
drm/i915: Update render_state_init() to take a request structure

Updated the two render_state_init() functions to take a request pointer instead
of a ring. This removes their reliance on the OLR.

v2: Rebased to newer tree.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update init_context() to take a request structure
John Harrison [Fri, 29 May 2015 16:43:44 +0000 (17:43 +0100)]
drm/i915: Update init_context() to take a request structure

Now that everything above has been converted to use requests, it is possible to
update init_context() to take a request pointer instead of a ring/context pair.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update deferred context creation to do explicit request management
John Harrison [Fri, 29 May 2015 16:43:43 +0000 (17:43 +0100)]
drm/i915: Update deferred context creation to do explicit request management

In execlist mode, context initialisation is deferred until first use of the
given context. This is because execlist mode has per ring context state and thus
many more context storage objects than legacy mode and many are never actually
used. Previously, the initialisation commands were written to the ring and
tagged with some random request structure via the OLR. This seemed to be causing
a null pointer deference bug under certain circumstances (BZ:88865).

This patch adds explicit request creation and submission to the deferred
initialisation code path. Thus removing any reliance on or randomness caused by
the OLR.

Note that it should be possible to move the deferred context creation until even
later - when the context is actually switched to rather than when it is merely
validated. This would allow the initialisation to be done within the request of
the work that is wanting to use the context. Hence, the extra request that is
created, used and retired just for the context init could be removed completely.
However, this is left for a follow up patch.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update do_switch() to take a request structure
John Harrison [Fri, 29 May 2015 16:43:42 +0000 (17:43 +0100)]
drm/i915: Update do_switch() to take a request structure

Updated do_switch() to take a request pointer instead of a ring/context pair.

v2: Removed some overzealous req-> dereferencing.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update i915_switch_context() to take a request structure
John Harrison [Fri, 29 May 2015 16:43:41 +0000 (17:43 +0100)]
drm/i915: Update i915_switch_context() to take a request structure

Now that the request is guaranteed to specify the context, it is possible to
update the context switch code to use requests rather than ring and context
pairs. This patch updates i915_switch_context() accordingly.

Also removed the warning that the request's context must match the last context
switch's context. As the context switch now gets the context object from the
request structure, there is no longer any scope for the two to become out of
step.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update ppgtt_init_ring() & context_enable() to take requests
John Harrison [Fri, 29 May 2015 16:43:40 +0000 (17:43 +0100)]
drm/i915: Update ppgtt_init_ring() & context_enable() to take requests

The final step in removing the OLR from i915_gem_init_hw() is to pass the newly
allocated request structure in to each step rather than passing a ring
structure. This patch updates both i915_ppgtt_init_ring() and
i915_gem_context_enable() to take request pointers.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Add explicit request management to i915_gem_init_hw()
John Harrison [Fri, 29 May 2015 16:43:39 +0000 (17:43 +0100)]
drm/i915: Add explicit request management to i915_gem_init_hw()

Now that a single per ring loop is being done for all the different
intialisation steps in i915_gem_init_hw(), it is possible to add proper request
management as well. The last remaining issue is that the context enable call
eventually ends up within *_render_state_init() and this does its own private
_i915_add_request() call.

This patch adds explicit request creation and submission to the top level loop
and removes the add_request() from deep within the sub-functions.

v2: Updated for removal of batch_obj from add_request call in previous patch.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Don't tag kernel batches as user batches
John Harrison [Fri, 29 May 2015 16:43:38 +0000 (17:43 +0100)]
drm/i915: Don't tag kernel batches as user batches

The render state initialisation code does an explicit i915_add_request() call to
commit the init commands. It was passing in the initialisation batch buffer to
add_request() as the batch object parameter. However, the batch object entry in
the request structure (which is all that parameter is used for) is meant for
keeping track of user generated batch buffers for blame tagging during GPU
hangs.

This patch clears the batch object parameter so that kernel generated batch
buffers are not tagged as being user generated.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()
John Harrison [Fri, 29 May 2015 16:43:37 +0000 (17:43 +0100)]
drm/i915: Moved the for_each_ring loop outside of i915_gem_context_enable()

The start of day context initialisation code in i915_gem_context_enable() loops
over each ring and calls the legacy switch context or the execlist init context
code as appropriate.

This patch moves the ring looping out of that function in to the top level
caller i915_gem_init_hw(). This means the a single pass can be made over all
rings doing the PPGTT, L3 remap and context initialisation of each ring
altogether.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring
John Harrison [Thu, 18 Jun 2015 12:11:20 +0000 (13:11 +0100)]
drm/i915: Split i915_ppgtt_init_hw() in half - generic and per ring

The i915_gem_init_hw() function calls a bunch of smaller initialisation
functions. Multiple of which have generic sections and per ring sections. This
means multiple passes are done over the rings. Each pass writes data to the ring
which floats around in that ring's OLR until some random point in the future
when an add_request() is done by some random other piece of code.

This patch breaks i915_ppgtt_init_hw() in two with the per ring initialisation
now being done in i915_ppgtt_init_ring(). The ring looping is now done at the
top level in i915_gem_init_hw().

v2: Fix dumb loop variable re-use.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com> (v1)
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update i915_gpu_idle() to manage its own request
John Harrison [Fri, 29 May 2015 16:43:35 +0000 (17:43 +0100)]
drm/i915: Update i915_gpu_idle() to manage its own request

Added explicit request creation and submission to the GPU idle code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Add flag to i915_add_request() to skip the cache flush
John Harrison [Fri, 29 May 2015 16:43:34 +0000 (17:43 +0100)]
drm/i915: Add flag to i915_add_request() to skip the cache flush

In order to explcitly track all GPU work (and completely remove the outstanding
lazy request), it is necessary to add extra i915_add_request() calls to various
places. Some of these do not need the implicit cache flush done as part of the
standard batch buffer submission process.

This patch adds a flag to _add_request() to specify whether the flush is
required or not.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update execbuffer_move_to_active() to take a request structure
John Harrison [Fri, 29 May 2015 16:43:33 +0000 (17:43 +0100)]
drm/i915: Update execbuffer_move_to_active() to take a request structure

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the
execbuffer_move_to_active() code path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update move_to_gpu() to take a request structure
John Harrison [Fri, 29 May 2015 16:43:32 +0000 (17:43 +0100)]
drm/i915: Update move_to_gpu() to take a request structure

The plan is to pass requests around as the basic submission tracking structure
rather than rings and contexts. This patch updates the move_to_gpu() code paths.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update the dispatch tracepoint to use params->request
John Harrison [Fri, 29 May 2015 16:43:31 +0000 (17:43 +0100)]
drm/i915: Update the dispatch tracepoint to use params->request

Updated a couple of trace points to use the now cached request pointer rather
than extracting it from the ring.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Add request to execbuf params and add explicit cleanup
John Harrison [Fri, 29 May 2015 16:43:30 +0000 (17:43 +0100)]
drm/i915: Add request to execbuf params and add explicit cleanup

Rather than just having a local request variable in the execbuff code, the
request pointer is now stored in the execbuff params structure. Also added
explicit cleanup of the request (plus wiping the OLR to match) in the error
case. This means that the execbuff code is no longer dependent upon the OLR
keeping track of the request so as to not leak it when things do go wrong. Note
that in the success case, the i915_add_request() at the end of the submission
function will tidy up the request and clear the OLR.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update alloc_request to return the allocated request
John Harrison [Fri, 29 May 2015 16:43:29 +0000 (17:43 +0100)]
drm/i915: Update alloc_request to return the allocated request

The alloc_request() function does not actually return the newly allocated
request. Instead, it must be pulled from ring->outstanding_lazy_request. This
patch fixes this so that code can create a request and start using it knowing
exactly which request it actually owns.

v2: Updated for new i915_gem_request_alloc() scheme.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Simplify i915_gem_execbuffer_retire_commands() parameters
John Harrison [Fri, 29 May 2015 16:43:28 +0000 (17:43 +0100)]
drm/i915: Simplify i915_gem_execbuffer_retire_commands() parameters

Shrunk the parameter list of i915_gem_execbuffer_retire_commands() to a single
structure as everything it requires is available in the execbuff_params object.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Merged the many do_execbuf() parameters into a structure
John Harrison [Fri, 29 May 2015 16:43:27 +0000 (17:43 +0100)]
drm/i915: Merged the many do_execbuf() parameters into a structure

The do_execbuf() function takes quite a few parameters. The actual set of
parameters is going to change with the conversion to passing requests around.
Further, it is due to grow massively with the arrival of the GPU scheduler.

This patch simplifies the prototype by passing a parameter structure instead.
Changing the parameter set in the future is then simply a matter of
adding/removing items to the structure.

Note that the structure does not contain absolutely everything that is passed
in. This is because the intention is to use this structure more extensively
later in this patch series and more especially in the GPU scheduler that is
coming soon. The latter requires hanging on to the structure as the final
hardware submission can be delayed until long after the execbuf IOCTL has
returned to user land. Thus it is unsafe to put anything in the structure that
is local to the IOCTL call itself - such as the 'args' parameter. All entries
must be copies of data or pointers to structures that are reference counted in
some way and guaranteed to exist for the duration of the batch buffer's life.

v2: Rebased to newer tree and updated for changes to the command parser.
Specifically, a code shuffle has required saving the batch start address in the
params structure.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Set context in request from creation even in legacy mode
John Harrison [Fri, 29 May 2015 16:43:26 +0000 (17:43 +0100)]
drm/i915: Set context in request from creation even in legacy mode

In execlist mode, the context object pointer is written in to the request
structure (and reference counted) at the point of request creation. In legacy
mode, this only happens inside i915_add_request().

This patch updates the legacy code path to match the execlist version. This
allows all the intermediate code between request creation and request submission
to get at the context object given only a request structure. Thus negating the
need to pass context pointers here, there and everywhere.

v2: Moved the context reference so it does not need to be undone if the
get_seqno() fails.

v3: Fixed execlist mode always hitting a warning about invalid last_contexts
(which don't exist in execlist mode).

v4: Updated for new i915_gem_request_alloc() scheme.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Early alloc request in execbuff
John Harrison [Fri, 29 May 2015 16:43:25 +0000 (17:43 +0100)]
drm/i915: Early alloc request in execbuff

Start of explicit request management in the execbuffer code path. This patch
adds a call to allocate a request structure before all the actual hardware work
is done. Thus guaranteeing that all that work is tagged by a known request. At
present, nothing further is done with the request, the rest comes later in the
series.

The only noticable change is that failure to get a request (e.g. due to lack of
memory) will be caught earlier in the sequence. It now occurs right at the start
before any un-undoable work has been done.

v2: Simplified the error handling path.

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: i915_add_request must not fail
John Harrison [Fri, 29 May 2015 16:43:24 +0000 (17:43 +0100)]
drm/i915: i915_add_request must not fail

The i915_add_request() function is called to keep track of work that has been
written to the ring buffer. It adds epilogue commands to track progress (seqno
updates and such), moves the request structure onto the right list and other
such house keeping tasks. However, the work itself has already been written to
the ring and will get executed whether or not the add request call succeeds. So
no matter what goes wrong, there isn't a whole lot of point in failing the call.

At the moment, this is fine(ish). If the add request does bail early on and not
do the housekeeping, the request will still float around in the
ring->outstanding_lazy_request field and be picked up next time. It means
multiple pieces of work will be tagged as the same request and driver can't
actually wait for the first piece of work until something else has been
submitted. But it all sort of hangs together.

This patch series is all about removing the OLR and guaranteeing that each piece
of work gets its own personal request. That means that there is no more
'hoovering up of forgotten requests'. If the request does not get tracked then
it will be leaked. Thus the add request call _must_ not fail. The previous patch
should have already ensured that it _will_ not fail by removing the potential
for running out of ring space. This patch enforces the rule by actually removing
the early exit paths and the return code.

Note that if something does manage to fail and the epilogue commands don't get
written to the ring, the driver will still hang together. The request will be
added to the tracking lists. And as in the old case, any subsequent work will
generate a new seqno which will suffice for marking the old one as complete.

v2: Improved WARNings (Tomas Elf review request).

For: VIZ-5115
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Reviewed-by: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Reserve ring buffer space for i915_add_request() commands
John Harrison [Thu, 18 Jun 2015 12:10:09 +0000 (13:10 +0100)]
drm/i915: Reserve ring buffer space for i915_add_request() commands

It is a bad idea for i915_add_request() to fail. The work will already have been
send to the ring and will be processed, but there will not be any tracking or
management of that work.

The only way the add request call can fail is if it can't write its epilogue
commands to the ring (cache flushing, seqno updates, interrupt signalling). The
reasons for that are mostly down to running out of ring buffer space and the
problems associated with trying to get some more. This patch prevents that
situation from happening in the first place.

When a request is created, it marks sufficient space as reserved for the
epilogue commands. Thus guaranteeing that by the time the epilogue is written,
there will be plenty of space for it. Note that a ring_begin() call is required
to actually reserve the space (and do any potential waiting). However, that is
not currently done at request creation time. This is because the ring_begin()
code can allocate a request. Hence calling begin() from the request allocation
code would lead to infinite recursion! Later patches in this series remove the
need for begin() to do the allocate. At that point, it becomes safe for the
allocate to call begin() and really reserve the space.

Until then, there is a potential for insufficient space to be available at the
point of calling i915_add_request(). However, that would only be in the case
where the request was created and immediately submitted without ever calling
ring_begin() and adding any work to that request. Which should never happen. And
even if it does, and if that request happens to fall down the tiny window of
opportunity for failing due to being out of ring space then does it really
matter because the request wasn't doing anything in the first place?

v2: Updated the 'reserved space too small' warning to include the offending
sizes. Added a 'cancel' operation to clean up when a request is abandoned. Added
re-initialisation of tracking state after a buffer wrap to keep the sanity
checks accurate.

v3: Incremented the reserved size to accommodate Ironlake (after finally
managing to run on an ILK system). Also fixed missing wrap code in LRC mode.

v4: Added extra comment and removed duplicate WARN (feedback from Tomas).

For: VIZ-5115
CC: Tomas Elf <tomas.elf@intel.com>
Signed-off-by: John Harrison <John.C.Harrison@Intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agoMerge remote-tracking branch 'airlied/drm-next' into HEAD
Daniel Vetter [Tue, 23 Jun 2015 06:31:49 +0000 (08:31 +0200)]
Merge remote-tracking branch 'airlied/drm-next' into HEAD

Backmerge drm-next because the conflict between Ander's atomic fixes
for 4.2 and Maartens future work are getting to unwielding to handle.

Conflicts:
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_ringbuffer.h

Just always take ours, same as git merge -X ours, but done by hand
because I didn't trust git: It's confusing that it doesn't show any
conflicts in the merge diff at all.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
9 years agodrm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround
Arun Siluvery [Fri, 19 Jun 2015 17:37:13 +0000 (18:37 +0100)]
drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround

In Indirect context w/a batch buffer,
+WaFlushCoherentL3CacheLinesAtContextSwitch:bdw

v2: Add LRI commands to set/reset bit that invalidates coherent lines,
update WA to include programming restrictions and exclude CHV as
it is not required (Ville)

v3: Avoid unnecessary read when it can be done by reading register once (Chris).

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround
Arun Siluvery [Fri, 19 Jun 2015 17:37:12 +0000 (18:37 +0100)]
drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround

In Indirect and Per context w/a batch buffer,
+WaDisableCtxRestoreArbitration

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915/gen8: Re-order init pipe_control in lrc mode
Arun Siluvery [Fri, 19 Jun 2015 17:37:11 +0000 (18:37 +0100)]
drm/i915/gen8: Re-order init pipe_control in lrc mode

Some of the WA applied using WA batch buffers perform writes to scratch page.
In the current flow WA are initialized before scratch obj is allocated.
This patch reorders intel_init_pipe_control() to have a valid scratch obj
before we initialize WA.

v2: Check for valid scratch page before initializing WA as some of them
perform writes to it.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915/gen8: Add infrastructure to initialize WA batch buffers
Arun Siluvery [Fri, 19 Jun 2015 18:07:01 +0000 (19:07 +0100)]
drm/i915/gen8: Add infrastructure to initialize WA batch buffers

Some of the WA are to be applied during context save but before restore and
some at the end of context save/restore but before executing the instructions
in the ring, WA batch buffers are created for this purpose and these WA cannot
be applied using normal means. Each context has two registers to load the
offsets of these batch buffers. If they are non-zero, HW understands that it
need to execute these batches.

v1: In this version two separate ring_buffer objects were used to load WA
instructions for indirect and per context batch buffers and they were part
of every context.

v2: Chris suggested to include additional page in context and use it to load
these WA instead of creating separate objects. This will simplify lot of things
as we need not explicity pin/unpin them. Thomas Daniel further pointed that GuC
is planning to use a similar setup to share data between GuC and driver and
WA batch buffers can probably share that page. However after discussions with
Dave who is implementing GuC changes, he suggested to use an independent page
for the reasons - GuC area might grow and these WA are initialized only once and
are not changed afterwards so we can share them share across all contexts.

The page is updated with WA during render ring init. This has an advantage of
not adding more special cases to default_context.

We don't know upfront the number of WA we will applying using these batch buffers.
For this reason the size was fixed earlier but it is not a good idea. To fix this,
the functions that load instructions are modified to report the no of commands
inserted and the size is now calculated after the batch is updated. A macro is
introduced to add commands to these batch buffers which also checks for overflow
and returns error.
We have a full page dedicated for these WA so that should be sufficient for
good number of WA, anything more means we have major issues.
The list for Gen8 is small, same for Gen9 also, maybe few more gets added
going forward but not close to filling entire page. Chris suggested a two-pass
approach but we agreed to go with single page setup as it is a one-off routine
and simpler code wins.

One additional option is offset field which is helpful if we would like to
have multiple batches at different offsets within the page and select them
based on some criteria. This is not a requirement at this point but could
help in future (Dave).

Chris provided some helpful macros and suggestions which further simplified
the code, they will also help in reducing code duplication when WA for
other Gen are added. Add detailed comments explaining restrictions.
Use do {} while(0) for wa_ctx_emit() macro.

(Many thanks to Chris, Dave and Thomas for their reviews and inputs)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Dave Gordon <david.s.gordon@intel.com>
Signed-off-by: Rafael Barbalho <rafael.barbalho@intel.com>
Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Report an error when i915.reset prevents a reset
Chris Wilson [Thu, 18 Jun 2015 10:42:08 +0000 (11:42 +0100)]
drm/i915: Report an error when i915.reset prevents a reset

If the user disables the GPU reset using the i915.reset parameter and
one occurs, report that we failed to reset the GPU. If we return early,
as we currently do, then we leave all state intact (with a hung GPU)
and clients block forever waiting for their requests to complete.

Testcase: igt/gem_eio
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
[danvet: Mark i915.reset as an unsafe modoption, as discussed with
Chris.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Fix up KMS Kconfig removal patch
Daniel Vetter [Tue, 23 Jun 2015 11:57:47 +0000 (13:57 +0200)]
drm/i915: Fix up KMS Kconfig removal patch

The module pciid list got lost, but somehow most distros seem to
force-load drm drivers early and no one noticed for a while.

Bug introduced in

commit fd930478fb797e4cbaa799d9ddd970e9a1fa1b4a
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Fri Jun 19 20:27:27 2015 +0100

    drm/i915: Remove KMS Kconfig option

Reported-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
9 years agodrm/dp/mst: take lock around looking up the branch device on hpd irq
Dave Airlie [Mon, 22 Jun 2015 04:40:44 +0000 (14:40 +1000)]
drm/dp/mst: take lock around looking up the branch device on hpd irq

If we are doing an MST transaction and we've gotten HPD and we
lookup the device from the incoming msg, we should take the mgr
lock around it, so that mst_primary and mstb->ports are valid.

Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agodrm/dp/mst: make sure mst_primary mstb is valid in work function
Daniel Vetter [Mon, 22 Jun 2015 07:31:59 +0000 (17:31 +1000)]
drm/dp/mst: make sure mst_primary mstb is valid in work function

This validates the mst_primary under the lock, and then calls
into the check and send function. This makes the code a lot
easier to understand the locking rules in.

Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: stable@vger.kernel.org
Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agoMerge tag 'drm-intel-next-fixes-2015-06-22' of git://anongit.freedesktop.org/drm...
Dave Airlie [Tue, 23 Jun 2015 00:22:19 +0000 (10:22 +1000)]
Merge tag 'drm-intel-next-fixes-2015-06-22' of git://anongit.freedesktop.org/drm-intel into drm-next

fix warning introduced in last -fixes
* tag 'drm-intel-next-fixes-2015-06-22' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: Silence compiler warning

9 years agoof: add EXPORT_SYMBOL for of_graph_get_endpoint_by_regs
Dave Airlie [Tue, 23 Jun 2015 00:19:10 +0000 (10:19 +1000)]
of: add EXPORT_SYMBOL for of_graph_get_endpoint_by_regs

This symbol came via exynos-next, but modular builds are broken
so just fix it up now.

Signed-off-by: Dave Airlie <airlied@redhat.com>
9 years agoMerge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daein...
Dave Airlie [Tue, 23 Jun 2015 00:13:18 +0000 (10:13 +1000)]
Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

Summary:
. Add atomic feature support
  - Exynos also now supports atomic feature. However, it doesn't
    guarantee atomic operation yet, and is required for more cleanups.
    This time we just modified for Exynos drm driver to use atomic
    interfaces instead of legacy ones. Next time, we will enhance
    Exynos drm driver to support the atomic operation.
. Add iommu support
  - This is a patch series according to below Exynos iommu integration
    work with DT and dma-mapping subsystem,
    http://lwn.net/Articles/607626/
. Consolidate Exynos drm driver initialization.
  - This patch sereis resolves the issue that only the first compoments
    was bound when happened deferred probing for other pipelines and
    also makes the driver to be more cleanned up by moving the dispered
    codes for registering kms drivers to one place.
. Add new MIC, DECON drivers, and MIPI-DSI support for Exynos5433.
  - Add MIC(Mobile image compressor) driver. MIC is a new IP for Exynos5433
    and later, which is used to transfer frame data to MIPI-DSI controller
    compressing the data to reduce memory bandwidth.
  - Add DECON driver for Exynos5433 SoC. This IP is a dislay controller
    similar to Exynos7's one but this controller has much different registers
    from Exynos7's ones so this driver has been implemented separately.
    We will implement a helper modules for FIMD and two DECON controllers
    to remove duplicated codes later.
  - Add Exynos5433 SoC support to MIPI-DSI driver, and device tree
    relevant patches.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (50 commits)
  ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
  drm/exynos: dsi: do not set TE GPIO direction by input
  drm/exynos: dsi: add support for MIC driver as a bridge
  drm/exynos: dsi: add support for Exynos5433
  drm/exynos: dsi: make use of array for clock access
  drm/exynos: dsi: make use of driver data for static values
  drm/exynos: dsi: add macros for register access
  drm/exynos: dsi: rename pll_clk to sclk_clk
  drm/exynos: mic: add MIC driver
  of: add helper for getting endpoint node of specific identifiers
  drm/exynos: add Exynos5433 decon driver
  drm/exynos: fix the input prompt of Exynos7 DECON
  drm/exynos: add drm_iommu_attach_device_if_possible()
  drm/exynos: Add the dependency for DRM_EXYNOS to DPI/DSI/DP
  drm/exynos: remove the dependency of DP driver for ARCH_EXYNOS
  drm/exynos: do not wait for vblank at atomic operation
  drm/exynos: Remove unused vma field of exynos_drm_gem_obj
  drm/exynos: fimd: fix page fault issue with iommu
  drm/exynos: iommu: improve a check for non-iommu dma_ops
  drm/exynos: iommu: detach from default dma-mapping domain on init
  ...

9 years agoMerge tag 'topic/drm-misc-2015-06-22' of git://anongit.freedesktop.org/drm-intel...
Dave Airlie [Tue, 23 Jun 2015 00:12:40 +0000 (10:12 +1000)]
Merge tag 'topic/drm-misc-2015-06-22' of git://anongit.freedesktop.org/drm-intel into drm-next

One more drm-misc pull for 4.2. The important one is the fix from Laurent
for Daniel Stone's mode_blob work.

* tag 'topic/drm-misc-2015-06-22' of git://anongit.freedesktop.org/drm-intel:
  drm/atomic: Don't set crtc_state->enable manually
  drm: prime: Document gem_prime_mmap
  drm: Avoid the double clflush on the last cache line in drm_clflush_virt_range()
  drm/atomic: Extract needs_modeset function
  drm/cma: Fix 64-bit size_t build warnings
  Documentation/drm: Update rotation property

9 years agodrm/i915: Remove KMS Kconfig option
Chris Wilson [Fri, 19 Jun 2015 19:27:27 +0000 (20:27 +0100)]
drm/i915: Remove KMS Kconfig option

Since we only support modesetting by default (disabling modesetting on
the command line prevents i915.ko from loading), having a parameter to
disable modesstting by default is superfluous, i.e. saying
CONFIG_DRM_I915_KMS=n is equivalent to CONFIG_DRM_I915=n.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Daniel Veter <daniel.vetter@ffwll.ch>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Ignore LVDS presence in VBT flag if the LVDS is enabled by BIOS
Chris Wilson [Fri, 19 Jun 2015 12:57:43 +0000 (13:57 +0100)]
drm/i915: Ignore LVDS presence in VBT flag if the LVDS is enabled by BIOS

On older gen, pre-Ironlake, parts there is no hardwired pin to report
the presence of an LVDS panel. Instead, we have to rely on the VBT to
declare whether the machine has a panel or not. Though notoriously
unreliable, so far we have erred on the side of false-positives and have
required a list of machines which end up falsely reporting a panel as
present. However, we now have reports of false-negatives, machines with
an LVDS that are being ignored due to the VBT not declaring the panel.
This patch ignores the VBT setting if the BIOS has already enabled the
LVDS panel (and on Ironlake+ we also have the hardware presence pin).

It fixes the Samsung NP680Z5E-X01FR in the bug report, but is likely to
result in more false-positives, and since we rely on the BIOS to enable
the panel, there are likely different circumstances where the BIOS will
not enable that panel (and so we may see the same machine with and
without a panel all on the whim of the BIOS).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90979
Reported-and-tested-by: lysxia@gmail.com
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Enforce execobject.alignment to be a power-of-two
Chris Wilson [Fri, 19 Jun 2015 12:59:46 +0000 (13:59 +0100)]
drm/i915: Enforce execobject.alignment to be a power-of-two

Internal requirement for the alignment is that it must be a
power-of-two, so enforce rejection at the user interface to execbuffer
(which allows the caller to specify a stricter-than-expected alignment
criterion).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Remove unused ring argument from frontbuffer invalidate and busy functions.
Rodrigo Vivi [Thu, 18 Jun 2015 18:43:24 +0000 (11:43 -0700)]
drm/i915: Remove unused ring argument from frontbuffer invalidate and busy functions.

This patch doesn't have any functional change, but organize fruntbuffer
invalidate and busy by removing unecesarry signature argument for ring.

It was unsed on mark_fb_busy and only used on fb_obj_invalidate for the
same ORIGIN_CS usage. So let's clean it a bit

Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Factor out p2 divider selection for pre-ilk platforms
Ville Syrjälä [Thu, 18 Jun 2015 10:47:22 +0000 (13:47 +0300)]
drm/i915: Factor out p2 divider selection for pre-ilk platforms

The same dpll p2 divider selection is repeated three times in the
gen2-4 .find_dpll() functions. Factor it out.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: reduce line width in {pch, i9xx}_get_hpd_pins()
Jani Nikula [Thu, 18 Jun 2015 10:06:17 +0000 (13:06 +0300)]
drm/i915: reduce line width in {pch, i9xx}_get_hpd_pins()

Make Paulo happier.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: move generic hotplug code into new intel_hotplug.c file
Jani Nikula [Thu, 18 Jun 2015 10:06:16 +0000 (13:06 +0300)]
drm/i915: move generic hotplug code into new intel_hotplug.c file

We have enough generic hotplug functions sprinkled all over i915_irq.c
to warrant moving them to a file of their own. This should further
underline the distinction between generic code in the new file and
platform specific hotplug and irq code that remains in i915_irq.c.

Add new intel_hpd_init_work to keep work functions static, and rename
get_port_from_pin to intel_hpd_pin_to_port while increasing its
visibility, but keep everything else the same.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915/irq: clarify irq storm related function naming
Jani Nikula [Thu, 18 Jun 2015 10:06:15 +0000 (13:06 +0300)]
drm/i915/irq: clarify irq storm related function naming

We'll have three functions:

intel_hpd_irq_storm_detect for detecting irq storms,
intel_hpd_irq_storm_disable for disabling hotplugs after detected storms,
intel_hpd_irq_storm_reenable_work for re-enabling hotplug.

No functional changes.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915/irq: abstract irq storm hotplug disabling
Jani Nikula [Thu, 18 Jun 2015 10:06:14 +0000 (13:06 +0300)]
drm/i915/irq: abstract irq storm hotplug disabling

Continue abstracting hotplug storm related functions to clarify the
code. This time, abstract hotplug irq storm related hotplug
disabling. While at it, clean up the loop iterating over connectors for
readability.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915/irq: move hotplug even debug print to second connector loop
Jani Nikula [Thu, 18 Jun 2015 10:06:13 +0000 (13:06 +0300)]
drm/i915/irq: move hotplug even debug print to second connector loop

The hotplug work function has two loops iterating over connectors, the
first for handling hotplug disabling due to irq storms and the second
for actually handling the hotplug events. Move the debug printing into
the second one, so we can abstract the storm handling better. This may
change the output ordering slightly when there are multiple simultaneous
hotplug events.

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agoARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:10 +0000 (21:59 +0900)]
ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/i915: Make cdclk part of the atomic state.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:56 +0000 (12:33 +0200)]
drm/i915: Make cdclk part of the atomic state.

The skylake scalers depend on the cdclk freq, but that frequency can
change during a modeset. So when a modeset happens calculate the new
cdclk in the atomic state. With the transitional helpers gone the
cached value can be used in the scaler, and committed after all
crtc's are disabled.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90874
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Remove transitional references from intel_plane_atomic_check.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:55 +0000 (12:33 +0200)]
drm/i915: Remove transitional references from intel_plane_atomic_check.

All transitional plane helpers are gone, party!

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Make setting color key atomic.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:54 +0000 (12:33 +0200)]
drm/i915: Make setting color key atomic.

By making color key atomic there are no more transitional helpers.
The plane check function will reject the color key when a scaler is
active.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Update less state during modeset.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:53 +0000 (12:33 +0200)]
drm/i915: Update less state during modeset.

No need to repeatedly call update_watermarks, or update_fbc.
Down to a single call to update_watermarks in .crtc_enable

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: atomic plane updates in a nutshell
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:52 +0000 (12:33 +0200)]
drm/i915: atomic plane updates in a nutshell

Now that all planes are added during a modeset we can use the
calculated changes before disabling a plane, and then either commit
or force disable a plane before disabling the crtc.

The code is shared with atomic_begin/flush, except watermark updating
and vblank evasion are not used.

This is needed for proper atomic suspend/resume support.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90868
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Handle disabling planes better, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:51 +0000 (12:33 +0200)]
drm/i915: Handle disabling planes better, v2.

Read out the initial state, and add a quirk to force add all planes
to crtc_state->plane_mask during initial commit. This will disable
all planes during the initial modeset.

The initial plane quirk is temporary, and will go away when hardware
readout is fully atomic, and the watermark updates in intel_sprite.c
are removed.

Changes since v1:
- Unset state->visible on !primary planes.
- Do not rely on the plane->crtc pointer in intel_atomic_plane,
  instead assume planes are invisible until modeset.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Do not run most checks when there's no modeset.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:50 +0000 (12:33 +0200)]
drm/i915: Do not run most checks when there's no modeset.

All the checks in intel_modeset_checks are only useful when a modeset
occurs, because there is nothing to update otherwise.

Same for power/cdclk changes, if there is no modeset they are noops.

Unfortunately intel_modeset_pipe_config still gets called without
modeset, because atomic hw readout isn't done yet.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Move crtc commit updates to separate functions.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:49 +0000 (12:33 +0200)]
drm/i915: Move crtc commit updates to separate functions.

To allow them to be used in intel_set_mode.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: move detaching scalers to begin_crtc_commit, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:48 +0000 (12:33 +0200)]
drm/i915: move detaching scalers to begin_crtc_commit, v2.

This is probably intended to be be done during vblank evasion.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: remove force argument from disable_plane
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:47 +0000 (12:33 +0200)]
drm/i915: remove force argument from disable_plane

The idea was good, but planes can have a fb even though
they're disabled. This makes the force argument useless
and always true, because only the commit function updates
state.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: clean up atomic plane check functions, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:46 +0000 (12:33 +0200)]
drm/i915: clean up atomic plane check functions, v2.

By passing crtc_state to the check_plane functions a lot of duplicated
code can be removed. There are still some transitional helper calls,
they will be removed later.

Changes since v1:
- Revert state->visible changes.
- Use plane->state->crtc instead of plane->crtc.
- Use drm_atomic_get_existing_crtc_state.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: clean up plane commit functions
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:45 +0000 (12:33 +0200)]
drm/i915: clean up plane commit functions

No point in hiding behind big ifs. This will be true most of the time.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Split plane updates of crtc->atomic into a helper, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:44 +0000 (12:33 +0200)]
drm/i915: Split plane updates of crtc->atomic into a helper, v2.

This makes it easier to verify that no changes are done when
calling this from crtc instead.

Changes since v1:
 - Make intel_wm_need_update static and always check it.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Split skl_update_scaler, v4.
Maarten Lankhorst [Mon, 22 Jun 2015 07:50:32 +0000 (09:50 +0200)]
drm/i915: Split skl_update_scaler, v4.

commit 2c310b9d2859863826c3688c88218d607d5dd19a
Author: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Date:   Mon May 18 12:28:52 2015 +0200

drm/i915: Split skl_update_scaler, v4.

It's easier to read separate functions for crtc and plane scaler state.

Changes since v1:
 - Update documentation.
Changes since v2:
 - Get rid of parameters to skl_update_scaler only used for traces.
   This avoids needing to document the other parameters.
Changes since v3:
 - Rename scaler_idx to scaler_user.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Assign a new pll from the crtc check function, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:42 +0000 (12:33 +0200)]
drm/i915: Assign a new pll from the crtc check function, v2.

It saves another loop over all crtc's in the state, and computing
clock is more of a per crtc thing.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Move scaler setup to check crtc function, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:41 +0000 (12:33 +0200)]
drm/i915: Move scaler setup to check crtc function, v2.

The scaler setup may add planes, but since they're unchanged we only
have to wait for primary flips. Also set planes_changed to indicate
at least 1 plane is modified.

Changes since v1:
- Instead of removing planes, do minimal validation needed.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Add a simple atomic crtc check function, v2.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:40 +0000 (12:33 +0200)]
drm/i915: Add a simple atomic crtc check function, v2.

Move the check for encoder cloning here.

Changes since v1:
- Remove was/is crtc_disabled. (mattrope)
- Rename function to intel_crtc_atomic_check. (mattrope)

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Clean up intel_atomic_setup_scalers slightly.
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:39 +0000 (12:33 +0200)]
drm/i915: Clean up intel_atomic_setup_scalers slightly.

Get rid of a whole lot of ternary operators and assign the index
in scaler_id, instead of the id. They're the same thing.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/i915: Use crtc state in intel_modeset_pipe_config
Maarten Lankhorst [Mon, 15 Jun 2015 10:33:38 +0000 (12:33 +0200)]
drm/i915: Use crtc state in intel_modeset_pipe_config

Grabbing crtc state from atomic state is a lot more involved,
and make sure connectors are added before calling this function.

Move check_digital_port_conflicts to intel_modeset_checks,
it's only useful to check it on a modeset.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/atomic: Don't set crtc_state->enable manually
Laurent Pinchart [Mon, 22 Jun 2015 10:37:46 +0000 (13:37 +0300)]
drm/atomic: Don't set crtc_state->enable manually

The enable field needs to be kept in sync with the mode_blob field. Call
drm_atomic_set_mode_prop_for_crtc() instead of setting enable to false
in order to dereference the mode blob correctly.

v2:
- Check the return value of drm_atomic_set_mode_prop_for_crtc()
- Drop the num_connectors local variable

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/exynos: dsi: do not set TE GPIO direction by input
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:09 +0000 (21:59 +0900)]
drm/exynos: dsi: do not set TE GPIO direction by input

On some board, TE GPIO should be configured properly thoughout pinctrl driver
as an wakeup interrupt. So this gpio should be configurable in the board's DT,
not being requested as a input pin.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: add support for MIC driver as a bridge
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:08 +0000 (21:59 +0900)]
drm/exynos: dsi: add support for MIC driver as a bridge

MIC must be initilized by MIPI DSI when it is being bound.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: add support for Exynos5433
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:07 +0000 (21:59 +0900)]
drm/exynos: dsi: add support for Exynos5433

This patch adds support for Exynos5433 mipi dsi.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: make use of array for clock access
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:06 +0000 (21:59 +0900)]
drm/exynos: dsi: make use of array for clock access

This patch make the driver to use an array for clock access. The number
of clocks are different from the existing MIPI DSI driver and Exynos5433
MIPI DSI driver. So this patch is needed before adding support for
Exynos5433 MIPI DSI driver.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: make use of driver data for static values
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:05 +0000 (21:59 +0900)]
drm/exynos: dsi: make use of driver data for static values

Exynos MIPI DSI driver uses some static values such as address offsets,
register setting values, and etc. This patch makes the driver get those
values from the driver data.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: add macros for register access
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:04 +0000 (21:59 +0900)]
drm/exynos: dsi: add macros for register access

This patch adds macros for register writing/reading. This is needed for
adding support Exynos5433 MIPI DSI driver, not by using if statement, but
by using driver data.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: rename pll_clk to sclk_clk
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:03 +0000 (21:59 +0900)]
drm/exynos: dsi: rename pll_clk to sclk_clk

This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
is actually not the pll input clock for dsi. The pll input clock comes
from the board's oscillator directly. But for the backward
compatibility, the old clock name "pll_clk" is also OK.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: mic: add MIC driver
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:02 +0000 (21:59 +0900)]
drm/exynos: mic: add MIC driver

MIC(Mobile image compressor) is newly added IP in Exynos5433. MIC
resides between decon and mipi dsim, and compresses frame data by 50%.
With dsi, not display port, to send frame data to the panel, the
bandwidth is not enough. That is why this compressor is introduced.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agoof: add helper for getting endpoint node of specific identifiers
Hyungwon Hwang [Fri, 12 Jun 2015 12:59:01 +0000 (21:59 +0900)]
of: add helper for getting endpoint node of specific identifiers

When there are multiple ports or multiple endpoints in a port, they have to be
distinguished by the value of reg property. It is common. The drivers can get
the specific endpoint in the specific port via this function. Now the drivers
have to implement this code in themselves or have to force the order of dt nodes
to get the right node.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: add Exynos5433 decon driver
Joonyoung Shim [Fri, 12 Jun 2015 12:59:00 +0000 (21:59 +0900)]
drm/exynos: add Exynos5433 decon driver

DECON(Display and Enhancement Controller) is new IP replacing FIMD in
Exynos5433. This patch adds Exynos5433 decon driver.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: fix the input prompt of Exynos7 DECON
Hyungwon Hwang [Fri, 12 Jun 2015 12:58:59 +0000 (21:58 +0900)]
drm/exynos: fix the input prompt of Exynos7 DECON

This patch is a preparation patch for adding support for Exynos5433
DECON. Exynos7 DECON have to be distinguished from Exynos5433 DECON.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: add drm_iommu_attach_device_if_possible()
Hyungwon Hwang [Mon, 22 Jun 2015 10:05:04 +0000 (19:05 +0900)]
drm/exynos: add drm_iommu_attach_device_if_possible()

Every CRTC drivers in Exynos DRM implements the code which checks
whether IOMMU is supported or not, and if supported enable it.
Making new helper for it generalize each CRTC drivers.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: Add the dependency for DRM_EXYNOS to DPI/DSI/DP
Hyungwon Hwang [Fri, 12 Jun 2015 12:58:57 +0000 (21:58 +0900)]
drm/exynos: Add the dependency for DRM_EXYNOS to DPI/DSI/DP

Without this dependency, Kbuild is confused and the configs below
them are not placed under Exynos DRM. This patch fixes it, so the
configs below them become to be placed under Exynos DRM.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: remove the dependency of DP driver for ARCH_EXYNOS
Hyungwon Hwang [Fri, 12 Jun 2015 12:58:56 +0000 (21:58 +0900)]
drm/exynos: remove the dependency of DP driver for ARCH_EXYNOS

This dependency is a historical thing. It is added when this DP driver is
under media subsystem. Now because it is under Exynos DRM, this dependency
is not needed anymore.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/i915: Silence compiler warning
Ander Conselvan de Oliveira [Fri, 29 May 2015 11:28:09 +0000 (14:28 +0300)]
drm/i915: Silence compiler warning

Silence the following -Wmaybe-uninitialized warnings and make the code
more clear.

drivers/gpu/drm/i915/intel_display.c: In function ‘__intel_set_mode’:
drivers/gpu/drm/i915/intel_display.c:11844:14: warning: ‘crtc_state’ may be used uninitialized in this function [-Wmaybe-uninitialized]
  return state->mode_changed || state->active_changed;
              ^
drivers/gpu/drm/i915/intel_display.c:11854:25: note: ‘crtc_state’ was declared here
  struct drm_crtc_state *crtc_state;
                         ^
drivers/gpu/drm/i915/intel_display.c:11868:6: warning: ‘crtc’ may be used uninitialized in this function [-Wmaybe-uninitialized]
   if (crtc != intel_encoder->base.crtc)
      ^
drivers/gpu/drm/i915/intel_display.c:11853:19: note: ‘crtc’ was declared here
  struct drm_crtc *crtc;

Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
9 years agodrm/i915: Update DRIVER_DATE to 20150619
Daniel Vetter [Fri, 19 Jun 2015 19:17:42 +0000 (21:17 +0200)]
drm/i915: Update DRIVER_DATE to 20150619

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm: prime: Document gem_prime_mmap
Daniel Thompson [Fri, 19 Jun 2015 13:52:29 +0000 (14:52 +0100)]
drm: prime: Document gem_prime_mmap

gem_prime_map is not currently described in the DRM manual, lets document
it.

Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
9 years agodrm/exynos: do not wait for vblank at atomic operation
Inki Dae [Fri, 19 Jun 2015 11:53:03 +0000 (20:53 +0900)]
drm/exynos: do not wait for vblank at atomic operation

This patch resolves the issue that refresh rate got low
at extension mode test with fimd and vidi combination.

The problem was because atomic_commit callback waited
for the completion of vblank to gaurantee crtc relevant
registers are updated from shadow registers to real ones.

However, the waiting there is really unnecessary because
page flip operation does already it.

Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: Remove unused vma field of exynos_drm_gem_obj
Krzysztof Kozlowski [Fri, 19 Jun 2015 05:23:29 +0000 (14:23 +0900)]
drm/exynos: Remove unused vma field of exynos_drm_gem_obj

The field 'vma' of 'exynos_drm_gem_obj' structure was introduced in
2a3098ff6c21 ("drm/exynos: add userptr feature for g2d module") but is
not referenced anywhere.

One instance of 'exynos_drm_gem_obj' may be mapped to multiple
user-space VMAs so 'vma' field does not look useful anyway.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: fimd: fix page fault issue with iommu
Inki Dae [Fri, 12 Jun 2015 13:19:22 +0000 (22:19 +0900)]
drm/exynos: fimd: fix page fault issue with iommu

This patch resolves page fault issue with iommu and atomic feature
when modetest test application is terminated.

ENWIN_F field of WINCONx register enables or disable a dma channel to
each hardware overlay - the value of the field will be updated to real
register after vsync.

So this patch makes sure the dma channel is disabled by waiting for vsync
one time after clearing shadow registers to all dma channels.

Below shows the page fault issue:
setting mode 720x1280-60Hz@XR24 on connectors 31, crtc 29
freq: 59.99Hz

[   34.831025] PAGE FAULT occurred at 0x20400000 by 11e20000.sysmmu(Page
table base: 0x6e324000)
[   34.838072]  Lv1 entry: 0x6e92dc01
[   34.841489] ------------[ cut here ]------------
[   34.846058] kernel BUG at drivers/iommu/exynos-iommu.c:364!
[   34.851614] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[   34.857428] Modules linked in:
<--snip-->
[   35.210894] [<c02880d0>] (exynos_sysmmu_irq) from [<c00608f8>]
(handle_irq_event_percpu+0x78/0x134)
[   35.219914] [<c00608f8>] (handle_irq_event_percpu) from [<c00609f0>]
(handle_irq_event+0x3c/0x5c)
[   35.228768] [<c00609f0>] (handle_irq_event) from [<c0063698>]
(handle_level_irq+0xc4/0x13c)
[   35.237101] [<c0063698>] (handle_level_irq) from [<c005ff7c>]
(generic_handle_irq+0x2c/0x3c)
[   35.245521] [<c005ff7c>] (generic_handle_irq) from [<c02214ec>]
(combiner_handle_cascade_irq+0x94/0x100)
[   35.254980] [<c02214ec>] (combiner_handle_cascade_irq) from
[<c005ff7c>] (generic_handle_irq+0x2c/0x3c)
[   35.264353] [<c005ff7c>] (generic_handle_irq) from [<c0060248>]
(__handle_domain_irq+0x7c/0xec)
[   35.273034] [<c0060248>] (__handle_domain_irq) from [<c0009434>]
(gic_handle_irq+0x30/0x68)
[   35.281366] [<c0009434>] (gic_handle_irq) from [<c0012ec0>]
(__irq_svc+0x40/0x74)

Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: iommu: improve a check for non-iommu dma_ops
Marek Szyprowski [Wed, 3 Jun 2015 08:26:24 +0000 (10:26 +0200)]
drm/exynos: iommu: improve a check for non-iommu dma_ops

DRM Exynos driver is relying on dma-mapping internal structures when used
with IOMMU enabled. This patch partially hides dma-mapping internal things
by using proper get_dma_ops/set_dma_ops calls.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: iommu: detach from default dma-mapping domain on init
Marek Szyprowski [Wed, 3 Jun 2015 08:26:23 +0000 (10:26 +0200)]
drm/exynos: iommu: detach from default dma-mapping domain on init

This patch adds code, which detach sub-device nodes from default iommu
domain if such has been configured. This lets Exynos DRM driver to properly
attach sub-devices to its own, common for all sub-devices domain.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: fimd: ensure proper hw state in fimd_clear_channel()
Marek Szyprowski [Fri, 12 Jun 2015 09:07:17 +0000 (11:07 +0200)]
drm/exynos: fimd: ensure proper hw state in fimd_clear_channel()

One should not do any assumptions on the stare of the fimd hardware
during driver initialization, so to properly reset fimd before enabling
IOMMU, one should ensure that all power domains and clocks are really
enabled. This patch adds pm_runtime and clocks management in the
fimd_clear_channel() function to ensure that any access to fimd
registers will be performed with clocks and power domains enabled.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: initialize VIDCON0 when fimd is disabled
Joonyoung Shim [Fri, 12 Jun 2015 08:27:16 +0000 (17:27 +0900)]
drm/exynos: initialize VIDCON0 when fimd is disabled

When the fimd is disabled by fimd_disable(), enabled overlay layers also
are disabled. If clocks for fimd are enabled by fimd_enable() on this
case, it can lead IOMMU page fault. The reason is that VIDCON0_ENVID and
VIDCON0_ENVID_F bits of VIDCON0 register are set still even though fimd
is disabled, so it may continue display output of prior when clocks for
fimd are enabled again.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: remove chained calls to enable
Joonyoung Shim [Fri, 12 Jun 2015 11:34:28 +0000 (20:34 +0900)]
drm/exynos: remove chained calls to enable

With atomic modesetting all the control for CRTC, Planes, Encoders and
Connectors should come from DRM core, so the driver is not allowed to
enable or disable planes from inside the crtc_enable()/disable() call.

But it needs to disable planes with crtc_disable in exynos driver
internally. Because crtc is disabled before plane is disabled, it means
plane_disable just returns without any register changes, then we cannot
be sure setting register to disable plane when crtc is disable.

This patch removes this chainned calls to enable plane from exynos hw
drivers code letting only DRM core touch planes except to disable plane.
Also it leads eliminable enabled and resume of struct exynos_drm_plane.

Signed-off-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: remove to call mixer_wait_for_vblank
Joonyoung Shim [Fri, 12 Jun 2015 08:27:14 +0000 (17:27 +0900)]
drm/exynos: remove to call mixer_wait_for_vblank

The reason waiting vblank is to be power gated and disabled clocks after
dma operation is completed. The dma operation is stopped already before
be power gated and clocks are disabled when mixer is disabled by commit
381be025ac1a6("drm/exynos: stop mixer before gating clocks during
poweroff"). Don't need to wait vblank anymore.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: ipp: validate a GEM handle with multiple planes
Hyungwon Hwang [Tue, 9 Jun 2015 03:45:15 +0000 (12:45 +0900)]
drm/exynos: ipp: validate a GEM handle with multiple planes

FIMC & GSC driver can calculate the offset of planes. So there are
use cases which IPP receives just one GEM handle of an image with
multiple plane. This patch extends ipp_validate_mem_node() to validate
this case.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: ipp: fix wrong index referencing a config element
Hyungwon Hwang [Tue, 9 Jun 2015 03:45:14 +0000 (12:45 +0900)]
drm/exynos: ipp: fix wrong index referencing a config element

Config depends on the opreation. So it must be referenced by an
operation id, not a property id.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: dsi: check whether dsi is enabled before sending data
Hyungwon Hwang [Thu, 11 Jun 2015 14:40:30 +0000 (23:40 +0900)]
drm/exynos: dsi: check whether dsi is enabled before sending data

exynos_dsi_host_transfer() can be called through a panel driver while
DSI is turning down. It is possible because the function checks only
whether DSI is initialized or not, and there is a moment which DSI is
set by uninitialized, but DSI is still turning down. To prevent it,
DSI must be set by disabled before starting to be turned down, and
exynos_dsi_host_transfer() must check whether DSI is enabled or not.

Kernel dump:
[ 4721.351448] Unhandled fault: synchronous external abort (0x96000210) at 0xffffff800015e018
[ 4721.351809] Internal error: : 96000210 [#1] PREEMPT SMP
[ 4721.352031] Modules linked in:
[ 4721.352173] CPU: 2 PID: 300 Comm: deviced Tainted: G        W       4.0.4-01017-g7964a87 #1
[ 4721.353989] Hardware name: Samsung DRACO board (DT)
[ 4721.358852] task: ffffffc0a0b70000 ti: ffffffc0a00ec000 task.ti: ffffffc0a00ec000
[ 4721.366327] PC is at exynos_dsi_enable_lane+0x14/0x5c
[ 4721.371353] LR is at exynos_dsi_host_transfer+0x834/0x8d8
[ 4721.376731] pc : [<ffffffc000432bcc>] lr : [<ffffffc000434590>] pstate: 60000145
[ 4721.384107] sp : ffffffc0a00efbe0
[ 4721.387405] x29: ffffffc0a00efbe0 x28: ffffffc0a00ec000
[ 4721.392699] x27: ffffffc000968000 x26: 0000000000000040
[ 4721.397994] x25: ffffffc000f74dc0 x24: ffffffc0a00efec8
[ 4721.403290] x23: ffffffc0a4815400 x22: ffffffc0009f2729
[ 4721.408584] x21: ffffffc0a00efcc8 x20: ffffffc0a4a2a848
[ 4721.413879] x19: ffffffc0a4a2a818 x18: 0000000000000004
[ 4721.419173] x17: 0000007faa5cddf0 x16: ffffffc0001a40a8
[ 4721.424469] x15: 0000000000000009 x14: 000000000000000d
[ 4721.429762] x13: 6e6e6f63206b726f x12: 0000000000000010
[ 4721.435058] x11: 0101010101010101 x10: 0000000000000000
[ 4721.440353] x9 : 000000000000000a x8 : 8386838282818381
[ 4721.445648] x7 : ffffffc0a201efe8 x6 : 0000000000000000
[ 4721.450943] x5 : 00000000fffffffa x4 : ffffffc0a201f170
[ 4721.456237] x3 : ffffff800015e000 x2 : ffffff800015e018
[ 4721.461531] x1 : 000000000000000f x0 : ffffffc0a4a2a818
[ 4721.466826]
[ 4721.468305] Process deviced (pid: 300, stack limit = 0xffffffc0a00ec028)
[ 4721.474989] Stack: (0xffffffc0a00efbe0 to 0xffffffc0a00f0000)
[ 4721.480720] fbe0: a00efca0 ffffffc0 0042c944 ffffffc0 a0f2d680 ffffffc0 00000024 00000000
[ 4721.488895] fc00: a4b6d000 ffffffc0 009f2729 ffffffc0 a4815400 ffffffc0 a00efec8 ffffffc0

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: remove SoC checking code
Andrzej Hajda [Mon, 8 Jun 2015 10:15:42 +0000 (12:15 +0200)]
drm/exynos: remove SoC checking code

SoC checking code is not necessary anymore, as exynos_drm_match_add and
exynos_drm_platform_probe already properly handles situation when there are
no Exynos DRM components.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Tested-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
9 years agodrm/exynos: fix broken component binding in case of multiple pipelines
Andrzej Hajda [Thu, 11 Jun 2015 14:23:37 +0000 (23:23 +0900)]
drm/exynos: fix broken component binding in case of multiple pipelines

In case there are multiple pipelines and deferred probe occurs, only components
of the first pipeline were bound. As a result only one pipeline was available.
The main cause of this issue was dynamic generation of component match table -
every component driver during probe registered itself on helper list, if there
was at least one pipeline present on this list component match table were
created without deferred components.
This patch removes this helper list, instead it creates match table from
existing devices requiring exynos_drm KMS drivers. This way match table do not
depend on probe/deferral order and contains all KMS components.
As a side effect patch makes the code cleaner and significantly smaller.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>