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4 years agodrm/amd/display: [FW Promotion] Release 1.0.16
Anthony Koo [Mon, 1 Jun 2020 21:39:52 +0000 (17:39 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.16

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Use dmub fw to lock pipe, cursor, dig
Wyatt Wood [Wed, 27 May 2020 13:42:08 +0000 (09:42 -0400)]
drm/amd/display: Use dmub fw to lock pipe, cursor, dig

[Why]
Hw lock manager adds the ability to lock pipe, cursor, and dig in fw.

[How]
Send hw lock command to fw to lock pipe, cursor, and dig.

Signed-off-by: Wyatt Wood <wyatt.wood@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn
Sonny Jiang [Wed, 10 Jun 2020 20:24:21 +0000 (16:24 -0400)]
drm amdgpu: SI UVD enabled on Verde, Tahiti, Pitcairn

Enable asic Verde, Tahiti and Pitcairn UVD block.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD enable for Oland
Sonny Jiang [Wed, 10 Jun 2020 20:22:59 +0000 (16:22 -0400)]
drm amdgpu: SI UVD enable for Oland

Enable Oland UVD block.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD add uvd_v3_1 to makefile
Sonny Jiang [Wed, 10 Jun 2020 20:19:19 +0000 (16:19 -0400)]
drm amdgpu: SI UVD add uvd_v3_1 to makefile

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD context rreg/wreg
Sonny Jiang [Wed, 10 Jun 2020 20:14:57 +0000 (16:14 -0400)]
drm amdgpu: SI UVD context rreg/wreg

Implement SI uvd_ctx_rreg/wreg functions.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD v3_1 (v2)
Sonny Jiang [Wed, 10 Jun 2020 20:05:45 +0000 (16:05 -0400)]
drm amdgpu: SI UVD v3_1 (v2)

Implement SI UVD. The SI UVD firmware requires validation.

v2: squash in missing brace fix (Colin Ian King)

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD registers
Sonny Jiang [Wed, 10 Jun 2020 20:02:21 +0000 (16:02 -0400)]
drm amdgpu: SI UVD registers

Add SI UVD registers files.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD PACKET_TYPE0
Sonny Jiang [Wed, 10 Jun 2020 17:41:12 +0000 (13:41 -0400)]
drm amdgpu: SI UVD PACKET_TYPE0

Fix packet_type0 definition in sid.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm amdgpu: SI UVD add firmwares
Sonny Jiang [Wed, 10 Jun 2020 17:37:49 +0000 (13:37 -0400)]
drm amdgpu: SI UVD add firmwares

For implement UVD on SI asic, add Oland, Pitcairn, Verde, Tahiti firmwares.

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/uvd3.x: fix register definition warnings
Alex Deucher [Mon, 22 Jun 2020 22:10:36 +0000 (18:10 -0400)]
drm/amdgpu/uvd3.x: fix register definition warnings

drop the duplicate register macros from sid.h and use the
standard ones in the oss register headers.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix compilation error on allmodconfig
Qingqing Zhuo [Thu, 18 Jun 2020 17:46:18 +0000 (13:46 -0400)]
drm/amd/display: fix compilation error on allmodconfig

when compiled with allmodconfig option, there are error
messages as below:

ERROR: modpost:
"mod_color_is_table_init"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost:
"mod_color_get_table"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!
ERROR: modpost:
"mod_color_set_table_init_state"
[drivers/gpu/drm/amd/amdgpu/amdgpu.ko] undefined!

To fix the issue, this commits removes
CONFIG_DRM_AMD_DC_DCN guard in color/makefile.

Signed-off-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
CC: Lewis Huang <Lewis.Huang@amd.com>
CC: Aric Cyr <Aric.Cyr@amd.com>
CC: Alexander Deucher <Alexander.Deucher@amd.com>
CC: Harry Wentland <hwentlan@amd.com>
CC: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
CC: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
CC: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix unused variable
James Zhu [Thu, 18 Jun 2020 03:58:04 +0000 (23:58 -0400)]
drm/amdgpu: fix unused variable

SOC15_WAIT_ON_RREG's return value needn't always been handled by
caller. new design is to fix this kind of unused variable.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add fw release for sdma v5_0
Wenhui Sheng [Thu, 18 Jun 2020 07:37:04 +0000 (15:37 +0800)]
drm/amdgpu: add fw release for sdma v5_0

sdma fw isn't released when module exit

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: sdma v5_2 ring bo mem leak
Wenhui Sheng [Thu, 18 Jun 2020 05:33:09 +0000 (13:33 +0800)]
drm/amdgpu: sdma v5_2 ring bo mem leak

invoke amdgpu_ring_fini for each sdma instance

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove perf level dpm in one-VF
Wenhui Sheng [Fri, 12 Jun 2020 09:18:39 +0000 (17:18 +0800)]
drm/amdgpu: remove perf level dpm in one-VF

On Navi12 platform, node power_dpm_force_performance_level
doesn't work correctly in one-VF mode with at least three
smu messages not supported:
SMU_MSG_SetSoftMaxByFreq
SMU_MSG_SetSoftMinByFreq
SMU_MSG_TransferTableDram2Smu

Reviewed-by: Kevin Wang <kevin1.wang@amd.com>
Signed-off-by: Wenhui Sheng <Wenhui.Sheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: add XGMI support for sienna cichlid
John Clements [Fri, 19 Jun 2020 07:01:13 +0000 (15:01 +0800)]
drm/amdgpu: add XGMI support for sienna cichlid

support for setting up XGMI FB address regions

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: restrict the hw sched jobs number to power of two
Kevin Wang [Sun, 19 Jan 2020 09:20:43 +0000 (17:20 +0800)]
drm/amdgpu: restrict the hw sched jobs number to power of two

the module parameter sched_hw_submission is probably from user mode,
and the kernel need to check whether it is legal.

1. align hw sched jobs to power of 2 and set minimum number is 2.
2. use kernel api is_power_of_2() to simplify driver code.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Update bounding box states (v2)
Alvin Lee [Mon, 15 Jun 2020 17:40:48 +0000 (13:40 -0400)]
drm/amd/display: Update bounding box states (v2)

[Why]
We need to update each p-state in the bounding box

[How]
Update states when assigning values to clocks

v2: squash in patch to set min values (Alex)

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove redundant initialization of variable ret
Colin Ian King [Thu, 18 Jun 2020 10:26:22 +0000 (11:26 +0100)]
drm/amdgpu: remove redundant initialization of variable ret

The variable ret is being initialized with a value that is never read
and it is being updated later with a new value.  The initialization is
redundant and can be removed.

Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove unused functions
Nirmoy Das [Thu, 18 Jun 2020 14:46:17 +0000 (16:46 +0200)]
drm/amdgpu: remove unused functions

Remove unused amdgpu_xgmi_hive_try_lock() and smu7_reset_asic_tasks().

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/display: properly guard the calls to swSMU functions
Alex Deucher [Wed, 17 Jun 2020 20:36:05 +0000 (16:36 -0400)]
drm/amdgpu/display: properly guard the calls to swSMU functions

It's only applicable on newer asics.  We could end up here when
using DC on older asics like SI or KV.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/display bail early in dm_pp_get_static_clocks
Alex Deucher [Wed, 17 Jun 2020 20:33:47 +0000 (16:33 -0400)]
drm/amdgpu/display bail early in dm_pp_get_static_clocks

If there are no supported callbacks.  We'll fall back to the
nominal clocks.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1170
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/vcn2.0: fix no previous prototype for functions
James Zhu [Thu, 18 Jun 2020 04:24:03 +0000 (00:24 -0400)]
drm/amdgpu/vcn2.0: fix no previous prototype for functions

Include header file vcn_v2_0.h

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/vcn1.0: fix no previous prototype for functions
James Zhu [Thu, 18 Jun 2020 04:06:51 +0000 (00:06 -0400)]
drm/amdgpu/vcn1.0: fix no previous prototype for functions

Include header file vcn_v1_0.h

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/pm: fix ref count leak when pm_runtime_get_sync fails
Alex Deucher [Wed, 17 Jun 2020 18:43:08 +0000 (14:43 -0400)]
drm/amdgpu/pm: fix ref count leak when pm_runtime_get_sync fails

The call to pm_runtime_get_sync increments the counter even in case of
failure, leading to incorrect ref count.
In case of failure, decrement the ref count before returning.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync fails
Alex Deucher [Wed, 17 Jun 2020 18:30:17 +0000 (14:30 -0400)]
drm/amdgpu/debugfs: fix ref count leak when pm_runtime_get_sync fails

The call to pm_runtime_get_sync increments the counter even in case of
failure, leading to incorrect ref count.
In case of failure, decrement the ref count before returning.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: label internally used symbols as static
Nirmoy Das [Thu, 18 Jun 2020 13:07:13 +0000 (15:07 +0200)]
drm/amd/display: label internally used symbols as static

Used sparse(make C=1) to find these loose ends.

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/powerplay: label internally used symbols as static
Nirmoy Das [Thu, 18 Jun 2020 13:06:00 +0000 (15:06 +0200)]
drm/powerplay: label internally used symbols as static

Used sparse(make C=1) to find these loose ends.

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: label internally used symbols as static
Nirmoy Das [Thu, 18 Jun 2020 14:12:34 +0000 (16:12 +0200)]
drm/amdkfd: label internally used symbols as static

Used sparse(make C=1) to find these loose ends.

v2:
removed unwanted extra line

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: label internally used symbols as static
Nirmoy Das [Thu, 18 Jun 2020 14:09:12 +0000 (16:09 +0200)]
drm/amdgpu: label internally used symbols as static

Used sparse(make C=1) to find these loose ends.

v2:
removed unwanted extra line

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/jpeg2.0: fix no previous prototype for functions
James Zhu [Thu, 18 Jun 2020 02:25:40 +0000 (22:25 -0400)]
drm/amdgpu/jpeg2.0: fix no previous prototype for functions

Include header file jpeg_v2_0.h.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/jpeg1.0: fix no previous prototype for functions
James Zhu [Thu, 18 Jun 2020 02:15:30 +0000 (22:15 -0400)]
drm/amdgpu/jpeg1.0: fix no previous prototype for functions

Include header file jpeg_v1_0.h.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: fix ref count leak when pm_runtime_get_sync fails
Alex Deucher [Wed, 17 Jun 2020 18:52:07 +0000 (14:52 -0400)]
drm/amdkfd: fix ref count leak when pm_runtime_get_sync fails

The call to pm_runtime_get_sync increments the counter even in case of
failure, leading to incorrect ref count.
In case of failure, decrement the ref count before returning.

Reviewed-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/fence: fix ref count leak when pm_runtime_get_sync fails
Alex Deucher [Wed, 17 Jun 2020 18:50:02 +0000 (14:50 -0400)]
drm/amdgpu/fence: fix ref count leak when pm_runtime_get_sync fails

The call to pm_runtime_get_sync increments the counter even in case of
failure, leading to incorrect ref count.
In case of failure, decrement the ref count before returning.

Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/debugfs: fix memory leak when amdgpu_virt_enable_access_debugfs failed
Chen Tao [Wed, 17 Jun 2020 10:51:30 +0000 (18:51 +0800)]
drm/amdgpu/debugfs: fix memory leak when amdgpu_virt_enable_access_debugfs failed

Fix memory leak in amdgpu_debugfs_gpr_read not freeing data when
amdgpu_virt_enable_access_debugfs failed.

Fixes: 95a2f917387a2 ("drm/amdgpu: restrict debugfs register access under SR-IOV")
Signed-off-by: Chen Tao <chentao107@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/debugfs: fix memory leak when pm_runtime_get_sync failed
Chen Tao [Wed, 17 Jun 2020 10:51:29 +0000 (18:51 +0800)]
drm/amdgpu/debugfs: fix memory leak when pm_runtime_get_sync failed

Fix memory leak in amdgpu_debugfs_gpr_read not freeing data when
pm_runtime_get_sync failed.

Fixes: a9ffe2a983383 ("drm/amdgpu/debugfs: properly handle runtime pm")
Signed-off-by: Chen Tao <chentao107@huawei.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static
kernel test robot [Wed, 17 Jun 2020 16:56:18 +0000 (00:56 +0800)]
drm/amdgpu: vcn_v2_5_mc_resume_dpg_mode() can be static

Fixes: c422a628925d ("drm/amdgpu: rename macro for VCN2.0 2.5 and 3.0")
Signed-off-by: kernel test robot <lkp@intel.com>
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix compiler warning
Nirmoy Das [Wed, 17 Jun 2020 11:36:16 +0000 (13:36 +0200)]
drm/amdgpu: fix compiler warning

Fixes below warning:
drivers/gpu/drm/amd/amdgpu/df_v3_6.c: In function ‘df_v3_6_reset_perfmon_cntr’:
drivers/gpu/drm/amd/amdgpu/df_v3_6.c:571:2: warning: ‘hi_base_addr’ may be used
uninitialized in this function [-Wmaybe-uninitialized]
  571 |  df_v3_6_perfmon_wreg(adev, lo_base_addr, 0, hi_base_addr, 0);
      |  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/smu: unify smu ppt callback macros
Kevin Wang [Tue, 16 Jun 2020 05:51:04 +0000 (13:51 +0800)]
drm/amd/smu: unify smu ppt callback macros

v1: add the new macro "smu_ppt_xxx()" to unify smu callback interfaces
v2: rename the macro smu_ppt_xxx to smu_ppt_funcs.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/smu: unify pptable_func{} callback interface
Kevin Wang [Tue, 16 Jun 2020 05:50:28 +0000 (13:50 +0800)]
drm/amd/smu: unify pptable_func{} callback interface

the pptable_func callback sets should be has unify interface,
so use "smu" as the pptable_func interface first parameter.

fix interfaces:
1. i2c_eeprom_init
2. i2c_eeprom_fini

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Update DCN3 bounding box
Alvin Lee [Mon, 15 Jun 2020 17:16:12 +0000 (13:16 -0400)]
drm/amd/display: Update DCN3 bounding box

[Why]
We want to update the bounding box to have more granular control of the
DCFCLK.

[How]
Setup DCFCLK to use STA values and also optimal values based on
UCLK.

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Jerry (Fangzhi) Zuo <Jerry.Zuo@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: remove distinction between explicit and implicit sync (v2)
Christian König [Wed, 27 May 2020 08:31:08 +0000 (10:31 +0200)]
drm/amdgpu: remove distinction between explicit and implicit sync (v2)

According to Marek a pipeline sync should be inserted for implicit syncs well.

v2: bump the driver version

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2)
Tom St Denis [Tue, 16 Jun 2020 12:47:04 +0000 (08:47 -0400)]
drm/amd/amdgpu: Fix offset for SQ_DEBUG_STS_GLOBAL on gfx10 (v2)

Despite having different IP offsets the computed address of the register(s)
are the same between gfx7..gfx10.  This patch fixes the offset relative
to the GC block on gfx10.

(v2): SQ_DEBUG_STS_GLOBAL2 is 0x10 higher ...

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/radeon: Fix reference count leaks caused by pm_runtime_get_sync
Aditya Pakki [Sun, 14 Jun 2020 02:21:22 +0000 (21:21 -0500)]
drm/radeon: Fix reference count leaks caused by pm_runtime_get_sync

On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Aditya Pakki <pakki001@umn.edu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/display: fix ref count leak when pm_runtime_get_sync fails
Navid Emamdoost [Sun, 14 Jun 2020 07:05:28 +0000 (02:05 -0500)]
drm/amdgpu/display: fix ref count leak when pm_runtime_get_sync fails

The call to pm_runtime_get_sync increments the counter even in case of
failure, leading to incorrect ref count.
In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config
Navid Emamdoost [Sun, 14 Jun 2020 07:09:44 +0000 (02:09 -0500)]
drm/amdgpu: fix ref count leak in amdgpu_display_crtc_set_config

in amdgpu_display_crtc_set_config, the call to pm_runtime_get_sync
increments the counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: fix ref count leak in amdgpu_drm_ioctl
Navid Emamdoost [Sun, 14 Jun 2020 07:14:50 +0000 (02:14 -0500)]
drm/amd/display: fix ref count leak in amdgpu_drm_ioctl

in amdgpu_drm_ioctl the call to pm_runtime_get_sync increments the
counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix ref count leak in amdgpu_driver_open_kms
Navid Emamdoost [Sun, 14 Jun 2020 07:12:29 +0000 (02:12 -0500)]
drm/amdgpu: fix ref count leak in amdgpu_driver_open_kms

in amdgpu_driver_open_kms the call to pm_runtime_get_sync increments the
counter even in case of failure, leading to incorrect
ref count. In case of failure, decrement the ref count before returning.

Signed-off-by: Navid Emamdoost <navid.emamdoost@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/radeon: fix multiple reference count leak
Aditya Pakki [Sun, 14 Jun 2020 01:55:39 +0000 (20:55 -0500)]
drm/radeon: fix multiple reference count leak

On calling pm_runtime_get_sync() the reference count of the device
is incremented. In case of failure, decrement the
reference count before returning the error.

Signed-off-by: Aditya Pakki <pakki001@umn.edu>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/gfx9: Fix incorrect firmware size calculation
Lei Guo [Tue, 16 Jun 2020 14:03:27 +0000 (10:03 -0400)]
drm/amdgpu/gfx9: Fix incorrect firmware size calculation

[WHY]
The memcpy() function copies n bytes from memory area src to memory area
dest. So specify the firmware size in bytes.

[How]
Correct the calculation.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Lei Guo <raykwok1150@163.com>
Reviewed-by: Junwei Zhang <zjunweihit@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix documentation around busy_percentage
Alex Deucher [Mon, 15 Jun 2020 20:36:49 +0000 (16:36 -0400)]
drm/amdgpu: fix documentation around busy_percentage

Add rename the gpu busy percentage for consistency and
add the mem busy percentage documentation.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/pm: update comment to clarify Overdrive interfaces
Alex Deucher [Mon, 15 Jun 2020 18:29:55 +0000 (14:29 -0400)]
drm/amdgpu/pm: update comment to clarify Overdrive interfaces

Vega10 and previous asics use one interface, vega20 and newer
use another.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Fix reference count leaks.
Qiushi Wu [Sat, 13 Jun 2020 19:32:26 +0000 (14:32 -0500)]
drm/amdkfd: Fix reference count leaks.

kobject_init_and_add() takes reference even when it fails.
If this function returns an error, kobject_put() must be called to
properly clean up the memory associated with the object.

Signed-off-by: Qiushi Wu <wu000273@umn.edu>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Add eviction debug messages
Felix Kuehling [Fri, 12 Jun 2020 03:19:37 +0000 (23:19 -0400)]
drm/amdkfd: Add eviction debug messages

Use WARN to print messages with backtrace when evictions are triggered.
This can help determine the root cause of evictions and help spot driver
bugs triggering evictions unintentionally, or help with performance tuning
by avoiding conditions that cause evictions in a specific workload.

The messages are controlled by a new module parameter that can be changed
at runtime:

  echo Y > /sys/module/amdgpu/parameters/debug_evictions
  echo N > /sys/module/amdgpu/parameters/debug_evictions

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/amdgpu: Fix SQ_DEBUG_STS_GLOBAL* registers
Tom St Denis [Mon, 15 Jun 2020 16:17:46 +0000 (12:17 -0400)]
drm/amd/amdgpu:  Fix SQ_DEBUG_STS_GLOBAL* registers

Forgot to subtract the SOC15 IP offsetand add the BASE_IDX values.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Get num_chans from VBIOS table
Alvin Lee [Thu, 11 Jun 2020 20:37:13 +0000 (16:37 -0400)]
drm/amd/display: Get num_chans from VBIOS table

Get the values from VBIOS table

Signed-off-by: Alvin Lee <alvin.lee2@amd.com>
Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd: add missing fill of the array`s first element
Bernard Zhao [Fri, 12 Jun 2020 11:58:48 +0000 (19:58 +0800)]
drm/amd: add missing fill of the array`s first element

In function fill_iram_v_2, the ram_table->bright_neg_gain`s
first element [0][0] seems to be missing. This change is just
to make the code a bit readable.

Signed-off-by: Bernard Zhao <bernard@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Reconfigure ULV for gfx9 server SKUs
Joseph Greathouse [Wed, 10 Jun 2020 18:48:56 +0000 (13:48 -0500)]
drm/amdgpu: Reconfigure ULV for gfx9 server SKUs

SDMA ULV can benefit low-power modes, but can sometimes cause
latency increases in small SDMA transfers. Server SKUs have a
different trade-off space in this domain, so this configures
the server SKUs' ULV hysteresis times differently than consumer
SKUs'.

Signed-off-by: Joseph Greathouse <Joseph.Greathouse@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdkfd: Use correct major in devcgroup check
Lorenz Brun [Thu, 11 Jun 2020 20:11:21 +0000 (22:11 +0200)]
drm/amdkfd: Use correct major in devcgroup check

The existing code used the major version number of the DRM driver
instead of the device major number of the DRM subsystem for
validating access for a devices cgroup.

This meant that accesses allowed by the devices cgroup weren't
permitted and certain accesses denied by the devices cgroup were
permitted (if they matched the wrong major device number).

Signed-off-by: Lorenz Brun <lorenz@brun.one>
Fixes: 6b855f7b83d2f ("drm/amdkfd: Check against device cgroup")
Reviewed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: 3.2.89
Aric Cyr [Mon, 1 Jun 2020 15:49:54 +0000 (11:49 -0400)]
drm/amd/display: 3.2.89

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: [FW Promotion] Release 1.0.15
Anthony Koo [Fri, 29 May 2020 21:48:12 +0000 (17:48 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.15

[Header Changes]
- Add new initialization bits for driver to check
  firmware status
- Add command for HW locking via DMUB

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Not doing bios data pack.
Yongqiang Sun [Fri, 29 May 2020 17:05:11 +0000 (13:05 -0400)]
drm/amd/display: Not doing bios data pack.

[Why]
dmub FW running abnormal after resume from S0i3 due
to data aliagnment issue.

[How]
Before having a solution for this issue, temparory
not doing data pack.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Sung Lee <Sung.Lee@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: not reset dmub in driver.
Yongqiang Sun [Wed, 27 May 2020 17:57:55 +0000 (13:57 -0400)]
drm/amd/display: not reset dmub in driver.

[Why]
during S0i3, set power state is toggled a few times,
and dmub uC will restart with current reset/hw_init.

[How]
Remove reset in set power state, and before doing hw_init,
check if dmub is enabled, and doing FW autoload check only
if dmub is already enabled.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Disable pipe split for modes with borders
Dale Zhao [Fri, 29 May 2020 08:57:02 +0000 (16:57 +0800)]
drm/amd/display: Disable pipe split for modes with borders

[Why]
For some special timing with border, like DMT 640*480 72Hz,
pipe split can't handle well. Thus, it will be black screen
for these special timing.

[How]
Disable pipe split for these timing with borders as W/A.

Signed-off-by: Dale Zhao <dale.zhao@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: change global buffer to local buffer
Lewis Huang [Wed, 20 May 2020 10:03:05 +0000 (18:03 +0800)]
drm/amd/display: change global buffer to local buffer

[Why]
Multi-adapter calculate regamma table at the same time.
Two thread used the same global variable cause race
condition.

[How]
Change global buffer to local buffer

Signed-off-by: Lewis Huang <Lewis.Huang@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Improve DisplayPort monitor interop
Aric Cyr [Tue, 26 May 2020 17:56:53 +0000 (13:56 -0400)]
drm/amd/display: Improve DisplayPort monitor interop

[Why]
DC is very fast at link training and stream enablement
which causes issues such as blackscreens for non-compliant
monitors.

[How]
After debugging with scaler vendors we implement the
minimum delays at the necessary locations to ensure
the monitor does not hang.  Delays are generic due to
lack of IEEE OUI information on the failing displays.

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Acked-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Enable use of dmub iff dmcu is disabled
Aurabindo Pillai [Tue, 26 May 2020 19:55:06 +0000 (15:55 -0400)]
drm/amd/display: Enable use of dmub iff dmcu is disabled

[Why & How]
DMUB command table should be allowed to be used
only if dmcu is explicitly disabled.

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: make calculate watermarks a function pointer
Dmytro Laktyushkin [Wed, 27 May 2020 14:34:38 +0000 (10:34 -0400)]
drm/amd/display: make calculate watermarks a function pointer

To allow code reuse with minimal duplication watermark
calculation needs to be function pointer.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Add helper to convert DC status
Rodrigo Siqueira [Tue, 26 May 2020 20:53:38 +0000 (16:53 -0400)]
drm/amd/display: Add helper to convert DC status

During the debugging process related to a hot-plug
problem with 4k display, we realized that we had
some issues related to the global state validation.
This problem was not explicitly highlighted in the
dmesg log, for this reason, this commit adds a function
that converts `enum dc_status` to a human-readable
string and appends the proper warning message in case
of failure.

Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: add support for per-state dummy-pstate latency
Jun Lei [Tue, 26 May 2020 15:17:53 +0000 (11:17 -0400)]
drm/amd/display: add support for per-state dummy-pstate latency

[why]
Dummy pstate latency actually varies between different
UCLK frequencies, when calculating watermark C, if DAL
always assumes worst case, then it can lead to dummy
pstate not supported scenarios.

[how]
Rather than statically calculating dummy pstate using
worst case, we store the entire table of UCLK to dummy
pstate relationships.  On a per mode basis, we calculate
the actual UCLK lower limit, and use the dynamic worst
case dummy pstate latency.  This prevents the situation
where we don't support full p-state (which will force
high DPM), but still use low DPM dummy pstate latency.

Signed-off-by: Jun Lei <jun.lei@amd.com>
Reviewed-by: Joshua Aberback <Joshua.Aberback@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update"
Wenjing Liu [Mon, 25 May 2020 17:45:22 +0000 (13:45 -0400)]
drm/amd/display: Revert "DP link layer test 4.2.1.1 fix due to specs update"

[why]
The change causes some regression in a common use case.
Will need more investigation before fixing the original issue.

[how]
This reverts commit fb8cf277b16d3f8b16941d217f7bae4ed7e73bea.

Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: remove unnecessary mpcc updates
Dmytro Laktyushkin [Fri, 22 May 2020 15:36:27 +0000 (11:36 -0400)]
drm/amd/display: remove unnecessary mpcc updates

We were updating mpcc if there were tree changes which
is unnecessary since any mpcc being added or removed
will automatically update the tree.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Eric Bernstein <Eric.Bernstein@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: runtime select dmub emulatior.
Yongqiang Sun [Mon, 18 May 2020 22:36:47 +0000 (18:36 -0400)]
drm/amd/display: runtime select dmub emulatior.

[Why & How]
Add emul specific hw function to dmub, in case of
emulator is created, we can runtime switch between
dmub emulator or dmub uC via is_virtual flag in dmub.

Signed-off-by: Yongqiang Sun <yongqiang.sun@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Passing initial SDP deadline to dmub
po-tchen [Fri, 22 May 2020 03:46:34 +0000 (11:46 +0800)]
drm/amd/display: Passing initial SDP deadline to dmub

[Why]
The SDP deadline indicate the vertical time to send CRC
infopacket in PSR.

Signed-off-by: po-tchen <po-ting.chen@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Force delay after DP receive power up
Martin Tsai [Fri, 22 May 2020 07:50:11 +0000 (15:50 +0800)]
drm/amd/display: Force delay after DP receive power up

[Why]
Some sprcified monitor scalar cannot recognize timing
change on demand. Once the link phy disable and enable
during a short period then the Sink protection mechanism
could keep the screen in blank and cannot be recoverred.

[How]
To add 100ms delay between enable link phy and link training.

Signed-off-by: Martin Tsai <martin.tsai@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: 3.2.88
Aric Cyr [Mon, 25 May 2020 04:02:07 +0000 (00:02 -0400)]
drm/amd/display: 3.2.88

Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: [FW Promotion] Release 1.0.14
Anthony Koo [Fri, 22 May 2020 21:48:23 +0000 (17:48 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.14

[Header Changes]
       - Add SDP transmission deadline for PSR config cmd

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: update audio wall clock programming
Charlene Liu [Fri, 22 May 2020 15:29:36 +0000 (11:29 -0400)]
drm/amd/display: update audio wall clock programming

[why]
for audio on real TV issue.

[how]
-add wall clock programming for DPREF based when
Pixel clock is done by DP DTO.

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix VBA chroma calculation for pipe splitting
Nicholas Kazlauskas [Fri, 22 May 2020 17:24:06 +0000 (13:24 -0400)]
drm/amd/display: Fix VBA chroma calculation for pipe splitting

[Why]
DML failures occur for 420 modes with dynamic pipe
splitting enabled because the ChromaViewport exceeds
the ChromaSurfaceWidth.

This is caused by adding the viewport_width instead
of the viewport_width_c.

This similarly occurs for rotated modes due to the
use of viewport_height instead of viewport_height_c.

[How]
Correct the calculations.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Revert "enable plane if plane_status changed"
Hugo Hu [Wed, 20 May 2020 04:31:19 +0000 (12:31 +0800)]
drm/amd/display: Revert "enable plane if plane_status changed"

This reverts commmit fd0293dd5b68a67a8731d54a6b334945e4e95757.

Signed-off-by: Hugo Hu <hugo.hu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Remove unused macro from dcn21
Roman Li [Wed, 29 Apr 2020 14:54:21 +0000 (10:54 -0400)]
drm/amd/display: Remove unused macro from dcn21

[Why]
SOC_BOUNDING_BOX_VALID is unused and not required for dcn21.

[How]
Remove it.

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Use u16 for drm_bpp in DSC calculations
Nicholas Kazlauskas [Thu, 21 May 2020 16:32:45 +0000 (12:32 -0400)]
drm/amd/display: Use u16 for drm_bpp in DSC calculations

[Why]
DSC calculations fail because the u16 bits_per_pixel from
the DRM struct is being casted to the u8 drm_bpp parameters
and locals. Integer wraparound is happening because this
value is greater than 255.

[How]
Use u16 to match what's in the structure instead of u8.

Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Move call to disable DPG
Wesley Chalmers [Wed, 20 May 2020 19:32:31 +0000 (15:32 -0400)]
drm/amd/display: Move call to disable DPG

[WHY]
Disabling DPG should happen after setting watermarks and clocks

Signed-off-by: Wesley Chalmers <wchalmer@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: [FW Promotion] Release 1.0.13
Anthony Koo [Wed, 20 May 2020 14:38:44 +0000 (10:38 -0400)]
drm/amd/display: [FW Promotion] Release 1.0.13

[Header Changes]
       - Version bump to 1.0.13

Signed-off-by: Anthony Koo <Anthony.Koo@amd.com>
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Fix incorrect dcn1 bandwidth calculations
Michael Strauss [Fri, 8 May 2020 17:04:23 +0000 (13:04 -0400)]
drm/amd/display: Fix incorrect dcn1 bandwidth calculations

[WHY]
Typos cause bandwidth calculation errors, one
of which can cause infinite loop on dcn1 with eDP

Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: Rework dsc to isolate FPU operations
Rodrigo Siqueira [Wed, 29 Apr 2020 14:53:02 +0000 (10:53 -0400)]
drm/amd/display: Rework dsc to isolate FPU operations

When we want to use float point operation on Linux
we need to use within special kernel protection
(`kernel_fpu_{begin,end}()`.), otherwise the kernel
can clobber userspace FPU register state. For detecting
these issues we use a tool named objtool (with -Ffa
flags) to highlight the FPU problems, all warnings can
be summed up as follows:

./tools/objtool/objtool check -Ffa
drivers/gpu/drm/amd/display/dc/dml/dml_common_defs.o

[..] dc/dsc/rc_calc.o: warning: objtool: get_qp_set()+0x2f8:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: dsc_roundf()+0x5:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: dsc_ceil()+0x5:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: get_ofs_set()+0x3eb:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc.o: warning: objtool: calc_rc_params()+0x3c:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/dc_dsc.o: warning: objtool:
get_dsc_bandwidth_range.isra.0()+0x8d:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/dc_dsc.o: warning: objtool: setup_dsc_config()+0x2ef:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc_dpi.o: warning: objtool:copy_pps_fields()+0xbb:
FPU instruction outside of kernel_fpu_{begin,end}()
[..] dc/dsc/rc_calc_dpi.o: warning: objtool:
dscc_compute_dsc_parameters()+0x7b:
FPU instruction outside of kernel_fpu_{begin,end}()

This commit fixes the above issues by rework DSC as described:

1. Isolate all FPU operations in a single file;
2. Use FPU flags only in the file that handles FPU operations;
3. Isolate all functions that require float point operation in static
   functions;
4. Add a mid-layer function that does not use any float point operation,
   and that could be safely invoked in other parts of the code.
5. Keep float point operation under DC_FP_{START/END} macro.

CC: Christian König <christian.koenig@amd.com>
CC: Alexander Deucher <Alexander.Deucher@amd.com>
CC: Peter Zijlstra <peterz@infradead.org>
CC: Tony Cheng <tony.cheng@amd.com>
CC: Harry Wentland <hwentlan@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Reviewed-by: Mikita Lipski <Mikita.Lipski@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/display: correct alpha_en programming for new pixel format
Charlene Liu [Tue, 19 May 2020 19:35:58 +0000 (15:35 -0400)]
drm/amd/display: correct alpha_en programming for new pixel format

[why]
for following new format, no alpha
       SURFACE_PIXEL_FORMAT_GRPH_RGB111110_FLOAT/_FIX:
       SURFACE_PIXEL_FORMAT_GRPH_BGR101111_FLOAT/_FIX
       same as case SURFACE_PIXEL_FORMAT_GRPH_ARGB1555:

Signed-off-by: Charlene Liu <Charlene.Liu@amd.com>
Reviewed-by: Chris Park <Chris.Park@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits
Tom St Denis [Thu, 11 Jun 2020 11:54:13 +0000 (07:54 -0400)]
drm/amd/amdgpu: Add SQ_DEBUG_STS_GLOBAL* registers/bits

Even though they are technically MMIO registers I put the bits with the sqind block
for organizational purposes.

Requested for UMR debugging.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/jpeg: fix race condition issue for jpeg start
James Zhu [Wed, 10 Jun 2020 16:10:20 +0000 (12:10 -0400)]
drm/amdgpu/jpeg: fix race condition issue for jpeg start

Fix race condition issue when multiple jpeg starts are called.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sriov: Need to clear kiq position
Emily Deng [Thu, 11 Jun 2020 06:09:16 +0000 (14:09 +0800)]
drm/amdgpu/sriov: Need to clear kiq position

As will clear vf fw during unload driver, to avoid idle fail. Need
to clear KIQ portion also.

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Ack-by: Monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sriov: Disable pm for multiple vf sriov
Emily Deng [Thu, 11 Jun 2020 03:40:05 +0000 (11:40 +0800)]
drm/amdgpu/sriov: Disable pm for multiple vf sriov

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Ack-by: Monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu/sriov: Add clear vf fw support
Emily Deng [Thu, 11 Jun 2020 03:36:04 +0000 (11:36 +0800)]
drm/amdgpu/sriov: Add clear vf fw support

Guest VM issue the PSP clear_vf_fw command at 2 points:
1.On VF driver loading, after VF message PSP to setup rings,
the next command is “clear_vf_fw”
2.On VF driver unload before VF message to
destroy rings

Signed-off-by: Emily Deng <Emily.Deng@amd.com>
Ack-by: Monk.liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table
Prike.Liang [Fri, 5 Jun 2020 09:53:56 +0000 (17:53 +0800)]
drm/amdgpu: fix the nullptr issue as for PWR IP not existing in discovery table

Fixes: c1cf79ca5ced46 ("drm/amdgpu: use IP discovery table for renoir")
This nullptr issue should be specific on the Renoir series during try access the PWR_MISC_CNTL_STATUS
when PWR IP not been detected by discovery table. Moreover the PWR IP not existing in Renoir series is
expected therefore just avoid access PWR register in Renoir series.

Signed-off-by: Prike.Liang <Prike.Liang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Replace invalid device ID with a valid device ID
Sandeep Raghuraman [Wed, 10 Jun 2020 20:06:26 +0000 (01:36 +0530)]
drm/amdgpu: Replace invalid device ID with a valid device ID

Initializes Powertune data for a specific Hawaii card by fixing what
looks like a typo in the code. The device ID 66B1 is not a supported
device ID for this driver, and is not mentioned elsewhere. 67B1 is a
valid device ID, and is a Hawaii Pro GPU.

I have tested on my R9 390 which has device ID 67B1, and it works
fine without problems.

Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amdgpu: Fix a buffer overflow handling the serial number
Dan Carpenter [Wed, 10 Jun 2020 08:56:53 +0000 (11:56 +0300)]
drm/amdgpu: Fix a buffer overflow handling the serial number

The comments say that the serial number is a 16-digit HEX string so the
buffer needs to be at least 17 characters to hold the NUL terminator.

The other issue is that "size" returned from sprintf() is the number of
characters before the NUL terminator so the memcpy() wasn't copying the
terminator.  The serial number needs to be NUL terminated so that it
doesn't lead to a read overflow in amdgpu_device_get_serial_number().
Also it's just cleaner and faster to sprintf() directly to adev->serial[]
instead of using a temporary buffer.

Fixes: 81a16241114b ("drm/amdgpu: Add unique_id and serial_number for Arcturus v3")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
4 years agodrm/amd/powerplay: maximum code sharing on sensor reading
Evan Quan [Tue, 9 Jun 2020 04:25:07 +0000 (12:25 +0800)]
drm/amd/powerplay: maximum code sharing on sensor reading

Move the common code to amdgpu_smu.c instead of having one
copy in both smu_v11_0.c and smu_v12_0.c.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: revise the calling chain on sensor reading
Evan Quan [Tue, 9 Jun 2020 04:16:56 +0000 (12:16 +0800)]
drm/amd/powerplay: revise the calling chain on sensor reading

Update the calling chain from "amdgpu_smu.c -> ${asic}_ppt.c ->
smu_v11/12_0.c -> amdgpu_smu.c (smu_common_read_sensor())" to "
"amdgpu_smu.c -> ${asic}_ppt.c -> smu_v11/12_0.c". This can help
to maintain clear code layers. More similar changes will be coming.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: drop unnecessary SMU_MSG_GetDpmClockFreq check
Evan Quan [Tue, 9 Jun 2020 04:03:58 +0000 (12:03 +0800)]
drm/amd/powerplay: drop unnecessary SMU_MSG_GetDpmClockFreq check

Since SMU_MSG_GetDpmClockFreq is known to be supported for Vega20
and before ASICs only. For those ASICs supporting swSMU, it is not
supported.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
4 years agodrm/amd/powerplay: drop unnecessary wrapper .populate_smc_tables
Evan Quan [Mon, 8 Jun 2020 11:49:08 +0000 (19:49 +0800)]
drm/amd/powerplay: drop unnecessary wrapper .populate_smc_tables

Since .populate_smc_tables is just a wrapper of .set_default_dpm_table.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>