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21 months agoui/vdagent: always reset the clipboard serial on caps
Marc-André Lureau [Mon, 12 Sep 2022 10:24:53 +0000 (14:24 +0400)]
ui/vdagent: always reset the clipboard serial on caps

The guest agent doesn't know what is the current serial state. Reset the
serial value whenever a new agent connection is established.

Fixes:
https://bugzilla.redhat.com/show_bug.cgi?id=2124446

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220912102455.111765-4-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agoui/clipboard: fix serial priority
Marc-André Lureau [Mon, 12 Sep 2022 10:24:52 +0000 (14:24 +0400)]
ui/clipboard: fix serial priority

The incoming grab event should have a higher serial.
See also "vdagent: introduce VD_AGENT_CAP_CLIPBOARD_GRAB_SERIAL":
https://gitlab.freedesktop.org/spice/spice-protocol/-/commit/045a6978d6dbbf7046affc5c321fa8177c8cce56

This is only a relevant fix for the -display dbus, only user of that
function.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220912102455.111765-3-marcandre.lureau@redhat.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agoui: add some vdagent related traces
Marc-André Lureau [Mon, 12 Sep 2022 10:24:51 +0000 (14:24 +0400)]
ui: add some vdagent related traces

This helps debugging clipboard serial sync issues.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220912102455.111765-2-marcandre.lureau@redhat.com>

[ kraxel: code style fix ]

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agomeson: Allow to enable gtk and sdl while cocoa is enabled
Akihiko Odaki [Fri, 19 Aug 2022 13:27:56 +0000 (22:27 +0900)]
meson: Allow to enable gtk and sdl while cocoa is enabled

As ui/cocoa does no longer override main(), ui/gtk and ui/sdl
can be enabled even ui/cocoa is enabled.

Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220819132756.74641-4-akihiko.odaki@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agoRevert "main-loop: Disable block backend global state assertion on Cocoa"
Akihiko Odaki [Fri, 19 Aug 2022 13:27:55 +0000 (22:27 +0900)]
Revert "main-loop: Disable block backend global state assertion on Cocoa"

This reverts commit 47281859f66bdab1974fb122cab2cbb4a1c9af7f.

Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com>
Reviewed-by: Emanuele Giuseppe Esposito <eesposit@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Message-Id: <20220819132756.74641-3-akihiko.odaki@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agoui/cocoa: Run qemu_init in the main thread
Akihiko Odaki [Fri, 19 Aug 2022 13:27:54 +0000 (22:27 +0900)]
ui/cocoa: Run qemu_init in the main thread

This work is based on:
https://patchew.org/QEMU/20220317125534.38706-1-philippe.mathieu.daude@gmail.com/

Simplify the initialization dance by running qemu_init() in the main
thread before the Cocoa event loop starts. The secondary thread only
runs only qemu_main_loop() and qemu_cleanup().

This fixes a case where addRemovableDevicesMenuItems() calls
qmp_query_block() while expecting the main thread to still hold
the BQL.

Overriding the code after calling qemu_init() is done by dynamically
replacing a function pointer variable, qemu_main when initializing
ui/cocoa, which unifies the static implementation of main() for
builds with ui/cocoa and ones without ui/cocoa.

Signed-off-by: Akihiko Odaki <akihiko.odaki@gmail.com>
Message-Id: <20220819132756.74641-2-akihiko.odaki@gmail.com>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agoui/console: Get tab completion working again in the SDL monitor vc
Cal Peake [Thu, 11 Aug 2022 22:01:38 +0000 (18:01 -0400)]
ui/console: Get tab completion working again in the SDL monitor vc

Define a QEMU special key constant for the tab key and add an entry for
it in the qcode_to_keysym table. This allows tab completion to work again
in the SDL monitor virtual console, which has been broken ever since the
migration from SDL1 to SDL2.

Signed-off-by: Cal Peake <cp@absolutedigital.net>
Message-Id: <7054816e-99c-7e2-6737-7cf98cc56e2@absolutedigital.net>
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
21 months agoMerge tag 'edgar/xilinx-next-2022-09-21.for-upstream' of https://github.com/edgarigl...
Stefan Hajnoczi [Thu, 22 Sep 2022 17:24:27 +0000 (13:24 -0400)]
Merge tag 'edgar/xilinx-next-2022-09-21.for-upstream' of https://github.com/edgarigl/qemu into staging

Xilinx queue

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# gpg:                using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg:                 aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
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# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF  4151 29C5 9678 0F6B CA83

* tag 'edgar/xilinx-next-2022-09-21.for-upstream' of https://github.com/edgarigl/qemu:
  hw/microblaze: pass random seed to fdt

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agoMerge tag 'pull-hex-20220919' of https://github.com/quic/qemu into staging
Stefan Hajnoczi [Thu, 22 Sep 2022 17:21:50 +0000 (13:21 -0400)]
Merge tag 'pull-hex-20220919' of https://github.com/quic/qemu into staging

Hexagon update
    remove unused encodings
    add fmin/fmax tests for signed zero

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# gpg: Signature made Mon 19 Sep 2022 14:57:54 EDT
# gpg:                using RSA key 3635C788CE62B91FD4C59AB47B0244FB12DE4422
# gpg: Good signature from "Taylor Simpson (Rock on) <tsimpson@quicinc.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 3635 C788 CE62 B91F D4C5  9AB4 7B02 44FB 12DE 4422

* tag 'pull-hex-20220919' of https://github.com/quic/qemu:
  Hexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero
  Hexagon (target/hexagon) remove unused encodings

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agohw/microblaze: pass random seed to fdt
Jason A. Donenfeld [Thu, 8 Sep 2022 09:40:30 +0000 (11:40 +0200)]
hw/microblaze: pass random seed to fdt

If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
initialize early. Set this using the usual guest random number
generation function. This FDT node is part of the DT specification.

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
21 months agoMerge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k into...
Stefan Hajnoczi [Wed, 21 Sep 2022 17:12:36 +0000 (13:12 -0400)]
Merge tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k into staging

m68k pull request 20220921

- several fixes for SR
- implement TAS
- feature cleanup

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# gpg: Signature made Wed 21 Sep 2022 11:51:57 EDT
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* tag 'm68k-for-7.2-pull-request' of https://github.com/vivier/qemu-m68k:
  target/m68k: always call gen_exit_tb() after writes to SR
  target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K
  target/m68k: Perform writback before modifying SR
  target/m68k: Fix MACSR to CCR
  target/m68k: Implement atomic test-and-set

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agoMerge tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu into staging
Stefan Hajnoczi [Wed, 21 Sep 2022 17:11:57 +0000 (13:11 -0400)]
Merge tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2022-09-20:

This queue contains a implementation of PowerISA 3.1B hash insns, ppc
TCG insns cleanups and fixes, and miscellaneus fixes in the spapr and
pnv_phb models.

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# gpg: Signature made Tue 20 Sep 2022 15:37:56 EDT
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
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# Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164

* tag 'pull-ppc-20220920' of https://gitlab.com/danielhb/qemu:
  hw/ppc/spapr: Fix code style problems reported by checkpatch
  hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure
  hw/ppc: spapr: Use qemu_vfree() to free spapr->htab
  target/ppc: Clear fpstatus flags on helpers missing it
  target/ppc: Zero second doubleword of VSR registers for FPR insns
  target/ppc: Set OV32 when OV is set
  target/ppc: Zero second doubleword for VSX madd instructions
  target/ppc: Set result to QNaN for DENBCD when VXCVI occurs
  target/ppc: Zero second doubleword in DFP instructions
  target/ppc: Remove unused xer_* macros
  target/ppc: Remove extra space from s128 field in ppc_vsr_t
  target/ppc: Merge fsqrt and fsqrts helpers
  target/ppc: Move fsqrts to decodetree
  target/ppc: Move fsqrt to decodetree
  target/ppc: Implement hashstp and hashchkp
  target/ppc: Implement hashst and hashchk
  target/ppc: Add HASHKEYR and HASHPKEYR SPRs

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agoMerge tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu into staging
Stefan Hajnoczi [Wed, 21 Sep 2022 17:10:51 +0000 (13:10 -0400)]
Merge tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu into staging

Testing and CI changes:

  - reduce number of targets for cross_user_build
  - update avocado xlnx_versal test with new binaries
  - add explicit timeouts to a number of avocado TCG tests
  - reduce default timeout to 120s
  - update lcitool to support cross-amd64
  - flatten a number of docker cross containers
  - clean up stale qemu/debian10 dependencies
  - remove obsolete Fedora VM test
  - add configure workaround for meson --disable-pie bug
  - disable --static-pie for aarch64 gitlab runner
  - update aarch32/aarch64 jobs to 22.04
  - deprecate 32 bit big-endian MIPS as a host
  - remove FROM qemu/ support from docker.py
  - remove Debian base images now everything is flat

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# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
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# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-testing-next-200922-2' of https://github.com/stsquad/qemu: (30 commits)
  tests/docker: remove the Debian base images
  tests/docker: remove FROM qemu/ support from docker.py
  tests/docker: update and flatten debian-toolchain
  tests/docker: update and flatten debian-hexagon-cross
  tests/docker: update and flatten debian-loongarch-cross
  tests/docker: update and flatten debian-amd64-cross
  tests/lcitool: bump to latest version
  tests/docker: update and flatten debian-all-test-cross
  tests/docker: flatten debian-riscv64-test-cross
  Deprecate 32 bit big-endian MIPS
  gitlab-ci: update aarch32/aarch64 custom runner jobs
  gitlab-ci/custom-runners: Disable -static-pie for ubuntu-20.04-aarch64
  configure: explicitly set cflags for --disable-pie
  tests/vm: Remove obsolete Fedora VM test
  tests/docker: remove amd64 qemu/debian10 dependency
  tests/docker: remove tricore qemu/debian10 dependency
  tests/docker: flatten debian-powerpc-test-cross
  tests/docker: update and flatten debian-sparc64-cross
  tests/docker: update and flatten debian-sh4-cross
  tests/docker: update and flatten debian-mips64-cross
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agotarget/m68k: always call gen_exit_tb() after writes to SR
Mark Cave-Ayland [Sat, 17 Sep 2022 11:25:15 +0000 (12:25 +0100)]
target/m68k: always call gen_exit_tb() after writes to SR

Any write to SR can change the security state so always call gen_exit_tb() when
this occurs. In particular MacOS makes use of andiw/oriw in a few places to
handle the switch between user and supervisor mode.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220917112515.83905-5-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
21 months agotarget/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K
Mark Cave-Ayland [Sat, 17 Sep 2022 11:25:12 +0000 (12:25 +0100)]
target/m68k: rename M68K_FEATURE_M68000 to M68K_FEATURE_M68K

The M68K_FEATURE_M68000 feature is misleading in that its name suggests the feature
is defined just for Motorola 68000 CPUs, whilst in fact it is defined for all
Motorola 680X0 CPUs.

In order to avoid confusion with the other M68K_FEATURE_M680X0 constants which
define the features available for specific Motorola CPU models, rename
M68K_FEATURE_M68000 to M68K_FEATURE_M68K and add comments to clarify its usage.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220917112515.83905-2-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
21 months agotarget/m68k: Perform writback before modifying SR
Richard Henderson [Tue, 13 Sep 2022 14:28:18 +0000 (15:28 +0100)]
target/m68k: Perform writback before modifying SR

Writes to SR may change security state, which may involve
a swap of %ssp with %usp as reflected in %a7.  Finish the
writeback of %sp@+ before swapping stack pointers.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Message-Id: <20220913142818.7802-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
21 months agotarget/m68k: Fix MACSR to CCR
Richard Henderson [Tue, 13 Sep 2022 14:28:17 +0000 (15:28 +0100)]
target/m68k: Fix MACSR to CCR

First, we were writing to the entire SR register, instead
of only the flags portion.  Second, we were not clearing C
as per the documentation (X was cleared via the 0xf mask).

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220913142818.7802-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
21 months agotarget/m68k: Implement atomic test-and-set
Richard Henderson [Mon, 29 Aug 2022 05:17:46 +0000 (22:17 -0700)]
target/m68k: Implement atomic test-and-set

This is slightly more complicated than cas,
because tas is allowed on data registers.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220829051746.227094-1-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
21 months agoMerge tag 'pull-request-2022-09-20' of https://gitlab.com/thuth/qemu into staging
Stefan Hajnoczi [Tue, 20 Sep 2022 20:24:07 +0000 (16:24 -0400)]
Merge tag 'pull-request-2022-09-20' of https://gitlab.com/thuth/qemu into staging

* Skip tests if the corresponding feature is missing
* Update NetBSD VM test to version 9.3
* Update the FreeBSD CI to version 13.1
* Some small fixes for the qtests
* Update wordings in the QEMU guest-agent

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# gpg: Signature made Tue 20 Sep 2022 09:22:45 EDT
# gpg:                using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg:                issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg:                 aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* tag 'pull-request-2022-09-20' of https://gitlab.com/thuth/qemu:
  qga: Replace 'blacklist' and 'whitelist' in the guest agent sources
  qga: Replace 'blacklist' command line and config file options by 'block-rpcs'
  gitlab-ci: Update the FreeBSD 13 job from 13.0 to 13.1
  tests: sb16 has both pc and q35 tests
  tests: Only run intel-hda-tests if machine type is compiled in
  bios-tables-test: Only run test for machine types compiled in
  bios-tables-test: Sort all x86_64 tests by machine type
  bios-tables-test: Make oem-fields tests be consistent
  meson-build: Enable CONFIG_REPLICATION only when replication is set
  tests: Fix error strings
  qtest/fuzz-lsi53c895a-test: set guest RAM to 2G
  tests/qtest: npcm7xx-emc-test: Skip checking MAC
  .gitlab-ci.d/windows.yml: Drop the sed processing in the 64-bit build
  tests/vm: update NetBSD to 9.3
  tests: mark io-command test as skipped if socat is missing

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agoMerge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
Stefan Hajnoczi [Tue, 20 Sep 2022 20:22:26 +0000 (16:22 -0400)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* add help option for -audio and -audiodev
* another missing memory barrier for dirty pages
* target/i386: Raise #GP on unaligned m128 accesses
* coverity fixes + improvements to components
* add MMX and 3DNow! tests
* SSE4a fixes
* target/i386: TCG translation cleanups
* update qboot submodule

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# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (21 commits)
  qboot: update to latest submodule
  build: remove extra parentheses causing missing rebuilds
  target/i386: introduce insn_get_addr
  target/i386: REPZ and REPNZ are mutually exclusive
  target/i386: fix INSERTQ implementation
  target/i386: correctly mask SSE4a bit indices in register operands
  audio: add help option for -audio and -audiodev
  tests/tcg: remove old SSE tests
  tests/tcg: refine MMX support in SSE tests
  tests/tcg: i386: add MMX and 3DNow! tests
  tests/tcg: i386: fix typos in 3DNow! instructions
  tests: unit: add NULL-pointer check
  tests: test-qga: close socket on failure to connect
  tests: unit: simplify test-visitor-serialization list tests
  smbios: sanitize type from external type before checking have_fields_bitmap
  coverity: put NUBus under m68k component
  coverity: add new RISC-V component
  spapr_pci: fix leak in spapr_phb_vfio_get_loc_code
  kvm: fix memory leak on failure to read stats descriptors
  target/i386: Raise #GP on unaligned m128 accesses when required.
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agoMerge tag 'pull-loongarch-20220920' of https://gitlab.com/gaosong/qemu into staging
Stefan Hajnoczi [Tue, 20 Sep 2022 18:17:02 +0000 (14:17 -0400)]
Merge tag 'pull-loongarch-20220920' of https://gitlab.com/gaosong/qemu into staging

v2: fix compile error.

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# gpg: Can't check signature: No public key

* tag 'pull-loongarch-20220920' of https://gitlab.com/gaosong/qemu:
  hw/loongarch: Improve acpi dsdt table
  hw/loongarch: Support memory hotplug
  hw/loongarch: Fix acpi ged irq number in dsdt table
  hw/loongarch: Add RAMFB to dynamic_sysbus_devices list
  hw/loongarch: Add hotplug handler for machine
  hw/loongarch: Add platform bus support
  hw/loongarch: Add interrupt information to FDT table
  hw/loongarch: Support fw_cfg dma function
  hw/loongarch: Remove vga device when loongarch init

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
21 months agotests/docker: remove the Debian base images
Alex Bennée [Wed, 14 Sep 2022 15:59:50 +0000 (16:59 +0100)]
tests/docker: remove the Debian base images

We no longer use these in any of our images. Clean-up the remaining
comments and documentation that reference them and remove from the
build.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-31-alex.bennee@linaro.org>

21 months agotests/docker: remove FROM qemu/ support from docker.py
Alex Bennée [Wed, 14 Sep 2022 15:59:49 +0000 (16:59 +0100)]
tests/docker: remove FROM qemu/ support from docker.py

We want to migrate from docker.py to building our images directly with
docker/podman. Before we get there we need to make sure we don't
re-introduce our layered builds so bug out if we see FROM qemu/ in a
Dockerfile.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-30-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-toolchain
Alex Bennée [Wed, 14 Sep 2022 15:59:48 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-toolchain

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile as we do not need anything from the base image to
build the toolchain. This is used to build both the nios and
microblaze toolchains.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-29-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-hexagon-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:47 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-hexagon-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile as we do not some of the extraneous packages from
the base image to build the toolchain.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-28-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-loongarch-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:46 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-loongarch-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from the
QEMU base image just to compile test images. In this case it is a
binary distribution of the toolchain anyway.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-27-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-amd64-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:45 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-amd64-cross

Now lcitool has support for building a x86_64 cross image we can use
it for this.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-26-alex.bennee@linaro.org>

21 months agotests/lcitool: bump to latest version
Alex Bennée [Wed, 14 Sep 2022 15:59:44 +0000 (16:59 +0100)]
tests/lcitool: bump to latest version

We need this to be able to cleanly build the x86 cross images. There
are a few minor updates triggered by lcitool-refresh including adding
"libslirp" to the freebsd vars and opensuse-leap which will help when
we finally drop the slirp submodule from QEMU.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-25-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-all-test-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:43 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-all-test-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We also need to ensure we install clang as it is
used for those builds as well.

It would be nice to port this to lcitool but for now this will do.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-24-alex.bennee@linaro.org>

21 months agotests/docker: flatten debian-riscv64-test-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:42 +0000 (16:59 +0100)]
tests/docker: flatten debian-riscv64-test-cross

Flatten into a single dockerfile and update to match the rest of the
test cross compile dockerfiles.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-23-alex.bennee@linaro.org>

21 months agoDeprecate 32 bit big-endian MIPS
Alex Bennée [Wed, 14 Sep 2022 15:59:41 +0000 (16:59 +0100)]
Deprecate 32 bit big-endian MIPS

It's becoming harder to maintain a cross-compiler to test this host
architecture as the old stable Debian 10 ("Buster") moved into LTS
which supports fewer architectures. For now:

  - mark it's deprecation in the docs
  - downgrade the containers to build TCG tests only
  - drop the cross builds from our CI

Users with an appropriate toolchain and user-space can still take
their chances building it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Huacai Chen <chenhuacai@kernel.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-22-alex.bennee@linaro.org>

21 months agogitlab-ci: update aarch32/aarch64 custom runner jobs
Alex Bennée [Wed, 14 Sep 2022 15:59:40 +0000 (16:59 +0100)]
gitlab-ci: update aarch32/aarch64 custom runner jobs

The custom runner is now using 22.04 so we can drop our hacks to deal
with broken libssh and glusterfs. The provisioning scripts will be
updated in a separate commit.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-21-alex.bennee@linaro.org>

21 months agogitlab-ci/custom-runners: Disable -static-pie for ubuntu-20.04-aarch64
Richard Henderson [Wed, 14 Sep 2022 15:59:39 +0000 (16:59 +0100)]
gitlab-ci/custom-runners: Disable -static-pie for ubuntu-20.04-aarch64

The project has reached the magic size at which we see

/usr/aarch64-linux-gnu/lib/libc.a(init-first.o): in function `__libc_init_first':
(.text+0x10): relocation truncated to fit: R_AARCH64_LD64_GOTPAGE_LO15 against \
symbol `__environ' defined in .bss section in /usr/aarch64-linux-gnu/lib/libc.a(environ.o)
/usr/bin/ld: (.text+0x10): warning: too many GOT entries for -fpic, please recompile with -fPIC

The bug has been reported upstream, but in the meantime there is
nothing we can do except build a non-pie executable.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220823210329.1969895-1-richard.henderson@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-20-alex.bennee@linaro.org>

21 months agoconfigure: explicitly set cflags for --disable-pie
Alex Bennée [Wed, 14 Sep 2022 15:59:38 +0000 (16:59 +0100)]
configure: explicitly set cflags for --disable-pie

This is working around current limitation of Meson's handling of
--disable-pie.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-19-alex.bennee@linaro.org>

21 months agohw/ppc/spapr: Fix code style problems reported by checkpatch
Bernhard Beschow [Mon, 19 Sep 2022 23:17:15 +0000 (01:17 +0200)]
hw/ppc/spapr: Fix code style problems reported by checkpatch

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20220919231720.163121-5-shentey@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agohw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure
Xuzhou Cheng [Tue, 20 Sep 2022 10:31:48 +0000 (18:31 +0800)]
hw/pci-host: pnv_phb{3, 4}: Fix heap out-of-bound access failure

pnv_phb3_root_bus_info and pnv_phb4_root_bus_info are missing the
instance_size initialization. This results in accessing out-of-bound
memory when setting 'chip-id' and 'phb-id', and eventually crashes
glib's malloc functionality with the following message:

  "qemu-system-ppc64: GLib: ../glib-2.72.3/glib/gmem.c:131: failed to allocate 3232 bytes"

This issue was noticed only when running qtests with QEMU Windows
32-bit executable. Windows 64-bit, Linux 32/64-bit do not expose
this bug though.

Fixes: 9ae1329ee2fe ("ppc/pnv: Add models for POWER8 PHB3 PCIe Host bridge")
Fixes: 4f9924c4d4cf ("ppc/pnv: Add models for POWER9 PHB4 PCIe Host bridge")
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220920103159.1865256-29-bmeng.cn@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agohw/ppc: spapr: Use qemu_vfree() to free spapr->htab
Xuzhou Cheng [Tue, 20 Sep 2022 10:31:47 +0000 (18:31 +0800)]
hw/ppc: spapr: Use qemu_vfree() to free spapr->htab

spapr->htab is allocated by qemu_memalign(), hence we should use
qemu_vfree() to free it.

Fixes: c5f54f3e31bf ("pseries: Move hash page table allocation to reset time")
Fixes: b4db54132ffe ("target/ppc: Implement H_REGISTER_PROCESS_TABLE H_CALL"")
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Message-Id: <20220920103159.1865256-28-bmeng.cn@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotests/vm: Remove obsolete Fedora VM test
Thomas Huth [Wed, 14 Sep 2022 15:59:37 +0000 (16:59 +0100)]
tests/vm: Remove obsolete Fedora VM test

It's still based on Fedora 30 - which is not supported anymore by QEMU
since years. Seems like nobody is using (and refreshing) this, and it's
easier to test this via a container anyway, so let's remove this now.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220822175317.190551-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220914155950.804707-18-alex.bennee@linaro.org>

21 months agotests/docker: remove amd64 qemu/debian10 dependency
Alex Bennée [Wed, 14 Sep 2022 15:59:36 +0000 (16:59 +0100)]
tests/docker: remove amd64 qemu/debian10 dependency

We missed removing this dependency when we flattened the build.

Fixes 9e19fd7d4a (tests/docker: update debian-amd64 with lcitool)

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-17-alex.bennee@linaro.org>

21 months agotests/docker: remove tricore qemu/debian10 dependency
Alex Bennée [Wed, 14 Sep 2022 15:59:35 +0000 (16:59 +0100)]
tests/docker: remove tricore qemu/debian10 dependency

We missed removing this dependency when we flattened the build.

Fixes: 39ce923732 (gitlab: enable a very minimal build with the tricore container)
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-16-alex.bennee@linaro.org>

21 months agotests/docker: flatten debian-powerpc-test-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:34 +0000 (16:59 +0100)]
tests/docker: flatten debian-powerpc-test-cross

Flatten into a single dockerfile. We really don't need the rest of the
stuff from the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-15-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-sparc64-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:33 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-sparc64-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from
the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-14-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-sh4-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:32 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-sh4-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from
the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-13-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-mips64-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:31 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-mips64-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from
the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-12-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-m68k-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:30 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-m68k-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from
the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-11-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-hppa-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:29 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-hppa-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from
the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-10-alex.bennee@linaro.org>

21 months agotests/docker: update and flatten debian-alpha-cross
Alex Bennée [Wed, 14 Sep 2022 15:59:28 +0000 (16:59 +0100)]
tests/docker: update and flatten debian-alpha-cross

Update to the latest stable Debian. While we are at it flatten into a
single dockerfile. We really don't need the rest of the stuff from
the QEMU base image just to compile test images.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-9-alex.bennee@linaro.org>

21 months agotests/avocado: reduce the default timeout to 120s
Alex Bennée [Wed, 14 Sep 2022 15:59:27 +0000 (16:59 +0100)]
tests/avocado: reduce the default timeout to 120s

We should be aiming to keep our tests under 2 minutes so lets reduce
the default timeout to that. Tests that we know take longer should
explicitly set a longer timeout.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-8-alex.bennee@linaro.org>

21 months agotests/avocado: split the AST2x00Machine classes
Alex Bennée [Wed, 14 Sep 2022 15:59:26 +0000 (16:59 +0100)]
tests/avocado: split the AST2x00Machine classes

The SDK tests take a lot longer to run and hence need a longer
timeout. As they run well over the 60 second maximum for CI lets also
disable them for CI as well.

I suspect they also suffer from the inability to detect the login
prompt due to no newlines being processed.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-7-alex.bennee@linaro.org>

21 months agotests/avocado: add explicit timeout for ppc64le TCG tests
Alex Bennée [Wed, 14 Sep 2022 15:59:25 +0000 (16:59 +0100)]
tests/avocado: add explicit timeout for ppc64le TCG tests

We don't want to rely on the soon to be reduced default time. These
tests are still slow for something we want to run in CI though.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-6-alex.bennee@linaro.org>

21 months agotests/avocado: add explicit timeout for s390 TCG tests
Alex Bennée [Wed, 14 Sep 2022 15:59:24 +0000 (16:59 +0100)]
tests/avocado: add explicit timeout for s390 TCG tests

We don't want to rely on the soon to be reduced default time. These
tests are still slow for something we want to run in CI though.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20220914155950.804707-5-alex.bennee@linaro.org>

21 months agotests/avocado: add explicit timeout for Aarch64 TCG tests
Alex Bennée [Wed, 14 Sep 2022 15:59:23 +0000 (16:59 +0100)]
tests/avocado: add explicit timeout for Aarch64 TCG tests

We don't want to rely on the soon to be reduced default time. These
tests are still slow for something we want to run in CI though.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-4-alex.bennee@linaro.org>

21 months agotests/avocado/boot_linux_console: Fix the test_aarch64_xlnx_versal_virt test
Thomas Huth [Wed, 14 Sep 2022 15:59:22 +0000 (16:59 +0100)]
tests/avocado/boot_linux_console: Fix the test_aarch64_xlnx_versal_virt test

The assets that this test tries to download have been removed from the
server. Update to a newer version to get it working again.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20220829080940.110831-1-thuth@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20220914155950.804707-3-alex.bennee@linaro.org>

21 months agogitlab: reduce targets in cross_user_build_job
Alex Bennée [Wed, 14 Sep 2022 15:59:21 +0000 (16:59 +0100)]
gitlab: reduce targets in cross_user_build_job

We already limit the scope of the cross system build to reduce the
cross build times. With the recent addition of more targets we are
also running into timeout issues for some of the cross user builds.

I've selected a few of those linux-user targets which are less likely
to be in common use as distros don't have pre-built rootfs for them.
I've also added the same CROSS_SKIP_TARGETS variable as is
occasionally used to further limit cross system builds.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220914155950.804707-2-alex.bennee@linaro.org>

21 months agotarget/ppc: Clear fpstatus flags on helpers missing it
Víctor Colombo [Tue, 6 Sep 2022 12:55:23 +0000 (09:55 -0300)]
target/ppc: Clear fpstatus flags on helpers missing it

In ppc emulation, exception flags are not cleared at the end of an
instruction. Instead, the next instruction is responsible to clear
it before its emulation. However, some helpers are not doing it,
causing an issue where the previously set exception flags are being
used and leading to incorrect values being set in FPSCR.
Fix this by clearing fp_status before doing the instruction 'real' work
for the following helpers that were missing this behavior:

- VSX_CVT_INT_TO_FP_VECTOR
- VSX_CVT_FP_TO_FP
- VSX_CVT_FP_TO_INT_VECTOR
- VSX_CVT_FP_TO_INT2
- VSX_CVT_FP_TO_INT
- VSX_CVT_FP_TO_FP_HP
- VSX_CVT_FP_TO_FP_VECTOR
- VSX_CMP
- VSX_ROUND
- xscvqpdp
- xscvdpsp[n]

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-9-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Zero second doubleword of VSR registers for FPR insns
Víctor Colombo [Tue, 6 Sep 2022 12:55:22 +0000 (09:55 -0300)]
target/ppc: Zero second doubleword of VSR registers for FPR insns

FPR register are mapped to the first doubleword of the VSR registers.
Since PowerISA v3.1, the second doubleword of the target register
must be zeroed for FP instructions.

This patch does it by writting 0 to the second dw everytime the
first dw is being written using set_fpr.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-8-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Set OV32 when OV is set
Víctor Colombo [Tue, 6 Sep 2022 12:55:21 +0000 (09:55 -0300)]
target/ppc: Set OV32 when OV is set

According to PowerISA: "OV32 is set whenever OV is implicitly set, and
is set to the same value that OV is defined to be set to in 32-bit
mode".

This patch changes helper_update_ov_legacy to set/clear ov32 when
applicable.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-7-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Zero second doubleword for VSX madd instructions
Víctor Colombo [Tue, 6 Sep 2022 12:55:20 +0000 (09:55 -0300)]
target/ppc: Zero second doubleword for VSX madd instructions

In 205eb5a89e we updated most VSX instructions to zero the
second doubleword, as is requested by PowerISA since v3.1.
However, VSX_MADD helper was left behind unchanged, while it
is also affected and should be fixed as well.

This patch applies the fix for MADD instructions.

Fixes: 205eb5a89e ("target/ppc: Change VSX instructions behavior to fill with zeros")
Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-6-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Set result to QNaN for DENBCD when VXCVI occurs
Víctor Colombo [Tue, 6 Sep 2022 12:55:19 +0000 (09:55 -0300)]
target/ppc: Set result to QNaN for DENBCD when VXCVI occurs

According to the ISA, for instruction DENBCD:
"If an invalid BCD digit or sign code is detected in the source
operand, an invalid-operation exception (VXCVI) occurs."

In the Invalid Operation Exception section, there is the situation:
"When Invalid Operation Exception is disabled (VE=0) and Invalid
Operation occurs (...) If the operation is an (...) or format the
target FPR is set to a Quiet NaN". This was not being done in
QEMU.

This patch sets the result to QNaN when the instruction DENBCD causes
an Invalid Operation Exception.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-5-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Zero second doubleword in DFP instructions
Víctor Colombo [Tue, 6 Sep 2022 12:55:18 +0000 (09:55 -0300)]
target/ppc: Zero second doubleword in DFP instructions

Starting at PowerISA v3.1, the second doubleword of the registers
used to store results in DFP instructions are supposed to be zeroed.

From the ISA, chapter 7.2.1.1 Floating-Point Registers:
"""
Chapter 4. Floating-Point Facility provides 32 64-bit
FPRs. Chapter 5. Decimal Floating-Point also employs
FPRs in decimal floating-point (DFP) operations. When
VSX is implemented, the 32 FPRs are mapped to
doubleword 0 of VSRs 0-31. (...)
All instructions that operate on an FPR are redefined
to operate on doubleword element 0 of the
corresponding VSR. (...)
and the contents of doubleword element 1 of the
VSR corresponding to the target FPR or FPR pair for these
instructions are set to 0.
"""

Before, the result stored at doubleword 1 was said to be undefined.

With that, this patch changes the DFP facility to zero doubleword 1
when using set_dfp64 and set_dfp128. This fixes the behavior for ISA
3.1 while keeping the behavior correct for previous ones.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Remove unused xer_* macros
Víctor Colombo [Tue, 6 Sep 2022 12:55:17 +0000 (09:55 -0300)]
target/ppc: Remove unused xer_* macros

The macros xer_ov, xer_ca, xer_ov32, and xer_ca32 are both unused and
hiding the usage of env. Remove them.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-3-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Remove extra space from s128 field in ppc_vsr_t
Víctor Colombo [Tue, 6 Sep 2022 12:55:16 +0000 (09:55 -0300)]
target/ppc: Remove extra space from s128 field in ppc_vsr_t

Very trivial rogue space removal. There are two spaces between Int128
and s128 in ppc_vsr_t struct, where it should be only one.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220906125523.38765-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Merge fsqrt and fsqrts helpers
Víctor Colombo [Mon, 5 Sep 2022 12:37:46 +0000 (09:37 -0300)]
target/ppc: Merge fsqrt and fsqrts helpers

These two helpers are almost identical, differing only by the softfloat
operation it calls. Merge them into one using a macro.
Also, take this opportunity to capitalize the helper name as we moved
the instruction to decodetree in a previous patch.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220905123746.54659-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Move fsqrts to decodetree
Víctor Colombo [Mon, 5 Sep 2022 12:37:45 +0000 (09:37 -0300)]
target/ppc: Move fsqrts to decodetree

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220905123746.54659-3-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Move fsqrt to decodetree
Víctor Colombo [Mon, 5 Sep 2022 12:37:44 +0000 (09:37 -0300)]
target/ppc: Move fsqrt to decodetree

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220905123746.54659-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Implement hashstp and hashchkp
Víctor Colombo [Fri, 15 Jul 2022 20:54:39 +0000 (17:54 -0300)]
target/ppc: Implement hashstp and hashchkp

Implementation for instructions hashstp and hashchkp, the privileged
versions of hashst and hashchk, which were added in Power ISA 3.1B.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220715205439.161110-4-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Implement hashst and hashchk
Víctor Colombo [Fri, 15 Jul 2022 20:54:38 +0000 (17:54 -0300)]
target/ppc: Implement hashst and hashchk

Implementation for instructions hashst and hashchk, which were added
in Power ISA 3.1B.

It was decided to implement the hash algorithm from ground up in this
patch exactly as described in Power ISA.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220715205439.161110-3-victor.colombo@eldorado.org.br>
[danielhb: fix block comment in excp_helper.c]
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agotarget/ppc: Add HASHKEYR and HASHPKEYR SPRs
Víctor Colombo [Fri, 15 Jul 2022 20:54:37 +0000 (17:54 -0300)]
target/ppc: Add HASHKEYR and HASHPKEYR SPRs

Add the Special Purpose Registers HASHKEYR and HASHPKEYR, which were
introduced by the Power ISA 3.1B. They are used by the new instructions
hashchk(p) and hashst(p).

The ISA states that the Operating System should generate the value for
these registers when creating a process, so it's its responsability to
do so. We initialize it with 0 for qemu-softmmu, and set a random 64
bits value for linux-user.

Signed-off-by: Víctor Colombo <victor.colombo@eldorado.org.br>
Reviewed-by: Lucas Mateus Castro <lucas.araujo@eldorado.org.br>
Message-Id: <20220715205439.161110-2-victor.colombo@eldorado.org.br>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
21 months agoqga: Replace 'blacklist' and 'whitelist' in the guest agent sources
Thomas Huth [Wed, 27 Jul 2022 09:21:34 +0000 (11:21 +0200)]
qga: Replace 'blacklist' and 'whitelist' in the guest agent sources

Let's use better, more inclusive wording here.

Message-Id: <20220727092135.302915-3-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agoqga: Replace 'blacklist' command line and config file options by 'block-rpcs'
Thomas Huth [Wed, 27 Jul 2022 09:21:33 +0000 (11:21 +0200)]
qga: Replace 'blacklist' command line and config file options by 'block-rpcs'

Let's use a more appropriate wording for this command line and config
file option. The old ones are still accepted for compatibility reasons,
but marked as deprecated now so that it could be removed in a future
version of QEMU.

This change is based on earlier patches from Philippe Mathieu-Daudé,
with the idea for the new option name suggested by BALATON Zoltan.

And while we're at it, replace the "?" in the help text with "help"
since that does not have the problem of conflicting with the wildcard
character of the shells.

Message-Id: <20220727092135.302915-2-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agogitlab-ci: Update the FreeBSD 13 job from 13.0 to 13.1
Thomas Huth [Tue, 20 Sep 2022 09:27:10 +0000 (11:27 +0200)]
gitlab-ci: Update the FreeBSD 13 job from 13.0 to 13.1

The FreeBSD 13 job in our CI started failing since the python port
stopped working after 13.1 has been released. Thus update our CI
job to FreeBSD 13.1 to get it working again.

Suggested-by: Daniel P. Berrangé <berrange@redhat.com>
Message-Id: <20220920102041.45067-1-thuth@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agotests: sb16 has both pc and q35 tests
Juan Quintela [Fri, 2 Sep 2022 17:34:49 +0000 (19:34 +0200)]
tests: sb16 has both pc and q35 tests

Check that the machines are compiled in before calling it

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-6-quintela@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agotests: Only run intel-hda-tests if machine type is compiled in
Juan Quintela [Fri, 2 Sep 2022 17:34:48 +0000 (19:34 +0200)]
tests: Only run intel-hda-tests if machine type is compiled in

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-5-quintela@redhat.com>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agobios-tables-test: Only run test for machine types compiled in
Juan Quintela [Fri, 2 Sep 2022 17:34:47 +0000 (19:34 +0200)]
bios-tables-test: Only run test for machine types compiled in

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-4-quintela@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agobios-tables-test: Sort all x86_64 tests by machine type
Juan Quintela [Fri, 2 Sep 2022 17:34:46 +0000 (19:34 +0200)]
bios-tables-test: Sort all x86_64 tests by machine type

No code change here, just move test around.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-3-quintela@redhat.com>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agobios-tables-test: Make oem-fields tests be consistent
Juan Quintela [Fri, 2 Sep 2022 17:34:45 +0000 (19:34 +0200)]
bios-tables-test: Make oem-fields tests be consistent

Every other test function is named:

test_acpi_<machine>_<test>()

Just make this test the same.  Once there, rename "acpi/oem-fields" to
"acpi/piix4/oem-fields" so it is consistent with everything else.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902173452.1904-2-quintela@redhat.com>
Reviewed-by: Ani Sinha <ani@anisinha.ca>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agomeson-build: Enable CONFIG_REPLICATION only when replication is set
Juan Quintela [Fri, 2 Sep 2022 16:51:25 +0000 (18:51 +0200)]
meson-build: Enable CONFIG_REPLICATION only when replication is set

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902165126.1482-8-quintela@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agotests: Fix error strings
Juan Quintela [Fri, 2 Sep 2022 16:51:24 +0000 (18:51 +0200)]
tests: Fix error strings

They were copy-pasted from e1000e and never changed.

Signed-off-by: Juan Quintela <quintela@redhat.com>
Message-Id: <20220902165126.1482-7-quintela@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agohw/loongarch: Improve acpi dsdt table
Xiaojuan Yang [Thu, 25 Aug 2022 03:57:33 +0000 (11:57 +0800)]
hw/loongarch: Improve acpi dsdt table

Cleanup the previous pci information in acpi dsdt table.
And using the common acpi_dsdt_add_gpex function to build
the gpex and pci information.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-10-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agohw/loongarch: Support memory hotplug
Xiaojuan Yang [Thu, 25 Aug 2022 03:36:59 +0000 (11:36 +0800)]
hw/loongarch: Support memory hotplug

Add hotplug/unplug interface for memory device.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-9-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agohw/loongarch: Fix acpi ged irq number in dsdt table
Xiaojuan Yang [Fri, 19 Aug 2022 03:16:37 +0000 (11:16 +0800)]
hw/loongarch: Fix acpi ged irq number in dsdt table

In dsdt, acpi ged irq should use gsi number, and the
VIRT_SCI_IRQ means it.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-8-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agohw/loongarch: Add RAMFB to dynamic_sysbus_devices list
Xiaojuan Yang [Wed, 10 Aug 2022 08:41:52 +0000 (16:41 +0800)]
hw/loongarch: Add RAMFB to dynamic_sysbus_devices list

Add RAMFB device to dynamic_sysbus_devices list so that it can be
hotpluged to the machine.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-7-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agohw/loongarch: Add hotplug handler for machine
Xiaojuan Yang [Wed, 10 Aug 2022 08:37:21 +0000 (16:37 +0800)]
hw/loongarch: Add hotplug handler for machine

Add hotplug handler for LoongArch virt machine and now only support
the dynamic sysbus device.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-6-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agohw/loongarch: Add platform bus support
Xiaojuan Yang [Wed, 10 Aug 2022 07:50:35 +0000 (15:50 +0800)]
hw/loongarch: Add platform bus support

Add platform bus support and add the bus information such as address,
size, irq number to FDT table.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-5-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agohw/loongarch: Add interrupt information to FDT table
Xiaojuan Yang [Wed, 10 Aug 2022 07:33:57 +0000 (15:33 +0800)]
hw/loongarch: Add interrupt information to FDT table

Add interrupt information to FDT table, such as interrupt
controller info, compatiable info, etc.

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Acked-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220908094623.73051-4-yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
21 months agoHexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero
Matheus Tavares Bernardino [Fri, 16 Sep 2022 15:06:27 +0000 (12:06 -0300)]
Hexagon (tests/tcg/hexagon): add fmin/fmax tests for signed zero

Signed-off-by: Matheus Tavares Bernardino <quic_mathbern@quicinc.com>
Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Tested-by: Taylor Simpson <tsimpson@quicinc.com>
21 months agoHexagon (target/hexagon) remove unused encodings
Taylor Simpson [Mon, 6 Jun 2022 22:23:25 +0000 (15:23 -0700)]
Hexagon (target/hexagon) remove unused encodings

Remove encodings guarded by ifdef that is not defined

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220606222327.7682-4-tsimpson@quicinc.com>

21 months agoqboot: update to latest submodule
Paolo Bonzini [Mon, 19 Sep 2022 13:40:44 +0000 (15:40 +0200)]
qboot: update to latest submodule

Include patch "Place setup_data at location specified by host"
from Jason A. Donenfeld.

Cc: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agobuild: remove extra parentheses causing missing rebuilds
Paolo Bonzini [Wed, 14 Sep 2022 14:19:36 +0000 (16:19 +0200)]
build: remove extra parentheses causing missing rebuilds

Because of two stray parentheses at the end of the definition of
ninja-cmd-goals, the test that is last in the .check-TESTSUITENAME.deps
variable will not be rebuilt.  Fix that.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotarget/i386: introduce insn_get_addr
Paolo Bonzini [Tue, 23 Aug 2022 13:50:48 +0000 (15:50 +0200)]
target/i386: introduce insn_get_addr

The "O" operand type in the Intel SDM needs to load an 8- to 64-bit
unsigned value, while insn_get is limited to 32 bits.  Extract the code
out of disas_insn and into a separate function.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotarget/i386: REPZ and REPNZ are mutually exclusive
Paolo Bonzini [Wed, 24 Aug 2022 15:44:45 +0000 (17:44 +0200)]
target/i386: REPZ and REPNZ are mutually exclusive

The later prefix wins if both are present, make it show in s->prefix too.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotarget/i386: fix INSERTQ implementation
Paolo Bonzini [Sun, 18 Sep 2022 07:52:24 +0000 (09:52 +0200)]
target/i386: fix INSERTQ implementation

INSERTQ is defined to not modify any bits in the lower 64 bits of the
destination, other than the ones being replaced with bits from the
source operand.  QEMU instead is using unshifted bits from the source
for those bits.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotarget/i386: correctly mask SSE4a bit indices in register operands
Paolo Bonzini [Sun, 18 Sep 2022 07:15:22 +0000 (09:15 +0200)]
target/i386: correctly mask SSE4a bit indices in register operands

SSE4a instructions EXTRQ and INSERTQ have two bit index operands, that can be
immediates or taken from an XMM register.  In both cases, the fields are
6-bit wide and the top two bits in the byte are ignored.  translate.c is
doing that correctly for the immediate case, but not for the XMM case, so
fix it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agoaudio: add help option for -audio and -audiodev
Claudio Fontana [Thu, 8 Sep 2022 08:14:41 +0000 (10:14 +0200)]
audio: add help option for -audio and -audiodev

add a simple help option for -audio and -audiodev
to show the list of available drivers, and document them.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Message-Id: <20220908081441.7111-1-cfontana@suse.de>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotests/tcg: remove old SSE tests
Paolo Bonzini [Sun, 11 Sep 2022 13:04:54 +0000 (15:04 +0200)]
tests/tcg: remove old SSE tests

The new testsuite is much more comprehensive, so remove the old one;
it is also buggy (the pinsrw test uses incorrect constraints, with =
instead of +, and the golden output for the fxsave tests differs depending
on how the C library uses SSE and AVX instructions).

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotests/tcg: refine MMX support in SSE tests
Paolo Bonzini [Fri, 9 Sep 2022 08:21:31 +0000 (10:21 +0200)]
tests/tcg: refine MMX support in SSE tests

Extend the support to memory operands, and skip MMX instructions that
were introduced in SSE times, because they are now covered in test-mmx.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agotests/tcg: i386: add MMX and 3DNow! tests
Paolo Bonzini [Thu, 1 Sep 2022 23:38:07 +0000 (01:38 +0200)]
tests/tcg: i386: add MMX and 3DNow! tests

Adjust the test-avx.py generator to produce tests specifically for
MMX and 3DNow.  Using a separate generator introduces some code
duplication, but is a simpler approach because of test-avx's extra
complexity to support 3- and 4-operand AVX instructions.

If needed, a common library can be introduced later.

While at it, for consistency move all the -cpu max rules to the
same place.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
21 months agoqtest/fuzz-lsi53c895a-test: set guest RAM to 2G
Mauro Matteo Cascella [Fri, 2 Sep 2022 13:38:53 +0000 (15:38 +0200)]
qtest/fuzz-lsi53c895a-test: set guest RAM to 2G

test_lsi_do_msgout_cancel_req does not run on machines with small size
memory. Reduce guest memory from 4G to 2G to alleviate the problem.

Reported-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Mauro Matteo Cascella <mcascell@redhat.com>
Message-Id: <20220902133853.834065-1-mcascell@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months agotests/qtest: npcm7xx-emc-test: Skip checking MAC
Patrick Venture [Tue, 6 Sep 2022 16:31:38 +0000 (09:31 -0700)]
tests/qtest: npcm7xx-emc-test: Skip checking MAC

The register tests walks all the registers to verify they are initially
0 when appropriate.  However, if the MAC address is set in the register
space, this should not be checked against 0.

Reviewed-by: Hao Wu <wuhaotsh@google.com>
Signed-off-by: Patrick Venture <venture@google.com>
Message-Id: <20220906163138.2831353-1-venture@google.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
21 months ago.gitlab-ci.d/windows.yml: Drop the sed processing in the 64-bit build
Bin Meng [Thu, 8 Sep 2022 13:28:14 +0000 (21:28 +0800)]
.gitlab-ci.d/windows.yml: Drop the sed processing in the 64-bit build

The sed processing of build/config-host.mak seems to be no longer
needed, and there is no such in the 32-bit build too. Drop it.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Message-Id: <20220908132817.1831008-5-bmeng.cn@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>