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5 years agoMerge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2018-12-17' into...
Peter Maydell [Tue, 18 Dec 2018 14:31:06 +0000 (14:31 +0000)]
Merge remote-tracking branch 'remotes/huth-gitlab/tags/pull-request-2018-12-17' into staging

- Replace global_qtest in some tests
- Exit boot-serial-test loop if child dies
- Sanitize verbose output in biot-tables-test

# gpg: Signature made Mon 17 Dec 2018 16:08:07 GMT
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# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>"
# gpg:                 aka "Thomas Huth <thuth@redhat.com>"
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>"
# gpg:                 aka "Thomas Huth <th.huth@posteo.de>"
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* remotes/huth-gitlab/tags/pull-request-2018-12-17:
  tests/bios-tables-test: Sanitize test verbose output
  tests: acpi: remove not used ACPI_READ_GENERIC_ADDRESS macro
  tests: Exit boot-serial-test loop if child dies
  tests/pxe: Make test independent of global_qtest
  tests/prom-env: Make test independent of global_qtest
  tests/machine-none: Make test independent of global_qtest
  tests/test-filter: Make tests independent of global_qtest
  tests/boot-serial: Get rid of global_qtest variable
  tests/pvpanic: Make the pvpanic test independent of global_qtest
  tests/vmgenid: Make test independent of global_qtest
  tests/acpi-utils: Drop dependence on global_qtest
  ivshmem-test: Drop dependence on global_qtest
  tests/libqos/pci: Make PCI access functions independent of global_qtest

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/stsquad/tags/pull-hardfloat-and-gitdm-171218...
Peter Maydell [Mon, 17 Dec 2018 23:46:05 +0000 (23:46 +0000)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-hardfloat-and-gitdm-171218-3' into staging

Hardfloat + maintainers and gitdm

# gpg: Signature made Mon 17 Dec 2018 10:55:19 GMT
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# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>"
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-hardfloat-and-gitdm-171218-3:
  hardfloat: implement float32/64 comparison
  hardfloat: implement float32/64 square root
  hardfloat: implement float32/64 fused multiply-add
  hardfloat: implement float32/64 division
  hardfloat: implement float32/64 multiplication
  hardfloat: implement float32/64 addition and subtraction
  fpu: introduce hardfloat
  tests/fp: add fp-bench
  softfloat: add float{32,64}_is_zero_or_normal
  softfloat: rename canonicalize to sf_canonicalize
  target/tricore: use float32_is_denormal
  softfloat: add float{32,64}_is_{de,}normal
  fp-test: pick TARGET_ARM to get its specialization
  MAINTAINERS: update status of FPU emulation
  contrib: add a basic gitdm config

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agotests/bios-tables-test: Sanitize test verbose output
Philippe Mathieu-Daudé [Tue, 30 Oct 2018 00:18:40 +0000 (01:18 +0100)]
tests/bios-tables-test: Sanitize test verbose output

Fix the extraneous extra blank lines in the test output when running with V=1.

Before:

    TEST: tests/bios-tables-test... (pid=25678)
      /i386/acpi/piix4:
    Looking for expected file 'tests/acpi-test-data/pc/DSDT'

    Using expected file 'tests/acpi-test-data/pc/DSDT'

    Looking for expected file 'tests/acpi-test-data/pc/FACP'

    Using expected file 'tests/acpi-test-data/pc/FACP'

    Looking for expected file 'tests/acpi-test-data/pc/APIC'

    Using expected file 'tests/acpi-test-data/pc/APIC'

    Looking for expected file 'tests/acpi-test-data/pc/HPET'

    Using expected file 'tests/acpi-test-data/pc/HPET'
    OK

After:

    TEST: tests/bios-tables-test... (pid=667)
      /i386/acpi/piix4:
    Looking for expected file 'tests/acpi-test-data/pc/DSDT'
    Using expected file 'tests/acpi-test-data/pc/DSDT'
    Looking for expected file 'tests/acpi-test-data/pc/FACP'
    Using expected file 'tests/acpi-test-data/pc/FACP'
    Looking for expected file 'tests/acpi-test-data/pc/APIC'
    Using expected file 'tests/acpi-test-data/pc/APIC'
    Looking for expected file 'tests/acpi-test-data/pc/HPET'
    Using expected file 'tests/acpi-test-data/pc/HPET'
    OK

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests: acpi: remove not used ACPI_READ_GENERIC_ADDRESS macro
Igor Mammedov [Mon, 10 Dec 2018 18:10:07 +0000 (19:10 +0100)]
tests: acpi: remove not used ACPI_READ_GENERIC_ADDRESS macro

Signed-off-by: Igor Mammedov <imammedo@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[thuth: Fixed conflicts with additional "qts" parameter]
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests: Exit boot-serial-test loop if child dies
Richard Henderson [Mon, 17 Dec 2018 03:58:16 +0000 (19:58 -0800)]
tests: Exit boot-serial-test loop if child dies

There's no point in waiting 5 full minutes when there will be
no more output.  Compute timeout based on elapsed wall clock
time instead of N * delays, as the delay is a minimum sleep time.

Cc: Thomas Huth <thuth@redhat.com>
Cc: Laurent Vivier <lvivier@redhat.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
[thuth: Replaced global_qtest with local qts variable]
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/pxe: Make test independent of global_qtest
Thomas Huth [Mon, 19 Nov 2018 15:40:44 +0000 (16:40 +0100)]
tests/pxe: Make test independent of global_qtest

global_qtest is not really required here, since boot_sector_test()
is already independent from that global variable.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/prom-env: Make test independent of global_qtest
Thomas Huth [Mon, 19 Nov 2018 15:05:29 +0000 (16:05 +0100)]
tests/prom-env: Make test independent of global_qtest

global_qtest is only needed here for one readl(). Let's replace it
with qtest_readl() and we can remove the global_qtest variable here.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/machine-none: Make test independent of global_qtest
Thomas Huth [Tue, 13 Nov 2018 20:11:13 +0000 (21:11 +0100)]
tests/machine-none: Make test independent of global_qtest

Apart from using qmp() in one spot, this test does not have any
dependencies to the global_qtest variable, so we can simply get
rid of it here by replacing the qmp() with qtest_qmp().

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/test-filter: Make tests independent of global_qtest
Thomas Huth [Tue, 13 Nov 2018 19:52:55 +0000 (20:52 +0100)]
tests/test-filter: Make tests independent of global_qtest

Apart from using qmp() in the qmp_discard_response() macro, these
tests do not have any dependencies to the global_qtest variable,
so we can simply get rid of it here by replacing the qmp() with
qtest_qmp() in the macro.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/boot-serial: Get rid of global_qtest variable
Thomas Huth [Mon, 12 Nov 2018 18:56:47 +0000 (19:56 +0100)]
tests/boot-serial: Get rid of global_qtest variable

The test does not use any of the functions that require global_qtest,
so we can simply get rid of this global variable here.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/pvpanic: Make the pvpanic test independent of global_qtest
Thomas Huth [Mon, 5 Nov 2018 15:30:43 +0000 (16:30 +0100)]
tests/pvpanic: Make the pvpanic test independent of global_qtest

We want to get rid of global_qtest in the long run, thus do not
use the wrappers like inb() and outb() here anymore.

Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/vmgenid: Make test independent of global_qtest
Thomas Huth [Mon, 12 Nov 2018 18:46:20 +0000 (19:46 +0100)]
tests/vmgenid: Make test independent of global_qtest

The biggest part has already been done in the previous patch, we now
only have to replace some few qmp() and readb() calls with the
corresponding qtest_*() functions to get there.

Acked-by: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/acpi-utils: Drop dependence on global_qtest
Eric Blake [Mon, 11 Sep 2017 17:20:08 +0000 (12:20 -0500)]
tests/acpi-utils: Drop dependence on global_qtest

As a general rule, we prefer avoiding implicit global state
because it makes code harder to safely copy and paste without
thinking about the global state.  Adjust the helper code to
use explicit state instead, and update all callers.

bios-tables-test no longer depends on global_qtest, now that it
passes explicit state through the testsuite data; an assert
proves this fact (although we will get rid of it later, once
global_qtest is gone).

Signed-off-by: Eric Blake <eblake@redhat.com>
Acked-by: Igor Mammedov <imammedo@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
[thuth: adapted patch to current master branch]
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agoivshmem-test: Drop dependence on global_qtest
Eric Blake [Mon, 11 Sep 2017 17:20:03 +0000 (12:20 -0500)]
ivshmem-test: Drop dependence on global_qtest

Managing parallel connections to two different monitors via
the implicit global_qtest makes it hard to copy-and-paste code
to tests that are not aware of the implicit state.  Since we
have already fixed qpci to avoid global_qtest, we can now
simplify by not using global_qtest anywhere in ivshmem-test.

We can assert that the conversion is correct by checking that
global_qtest remains NULL throughout the test (a later patch
that changes global_qtest to not be a public global variable
will drop the assertions).

Signed-off-by: Eric Blake <eblake@redhat.com>
[thuth: Dropped the changes to test_ivshmem_hotplug() - will be fixed later]
Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agotests/libqos/pci: Make PCI access functions independent of global_qtest
Thomas Huth [Tue, 6 Nov 2018 19:15:38 +0000 (20:15 +0100)]
tests/libqos/pci: Make PCI access functions independent of global_qtest

QPCIBus already tracks QTestState, so use that state instead of an
implicit reliance on global_qtest.

Based on an earlier patch ("libqos: Use explicit QTestState for pci
operations") from Eric Blake.

Signed-off-by: Thomas Huth <thuth@redhat.com>
5 years agoMerge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181216' into staging
Peter Maydell [Mon, 17 Dec 2018 13:04:25 +0000 (13:04 +0000)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20181216' into staging

- Remove retranslation remenents
- Return success from patch_reloc
- Preserve 32-bit values as zero-extended on x86_64
- Make bswap during memory ops as optional
- Cleanup xxhash
- Revert constant pooling for tcg/sparc/

# gpg: Signature made Mon 17 Dec 2018 03:25:21 GMT
# gpg:                using RSA key 64DF38E8AF7E215F
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>"
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20181216: (33 commits)
  xxhash: match output against the original xxhash32
  include: move exec/tb-hash-xx.h to qemu/xxhash.h
  exec: introduce qemu_xxhash{2,4,5,6,7}
  qht-bench: document -p flag
  tcg: Drop nargs from tcg_op_insert_{before,after}
  tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS
  tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP
  tcg/optimize: Optimize bswap
  tcg: Clean up generic bswap64
  tcg: Clean up generic bswap32
  tcg/i386: Add setup_guest_base_seg for FreeBSD
  tcg/i386: Precompute all guest_base parameters
  tcg/i386: Assume 32-bit values are zero-extended
  tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests
  tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path
  tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct
  tcg/s390x: Return false on failure from patch_reloc
  tcg/ppc: Return false on failure from patch_reloc
  tcg/arm: Return false on failure from patch_reloc
  tcg/aarch64: Return false on failure from patch_reloc
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years ago.shippable.yml: disable the win cross tests
Alex Bennée [Fri, 14 Dec 2018 15:17:18 +0000 (15:17 +0000)]
.shippable.yml: disable the win cross tests

The pkg.mxe.cc package repositories have been down for the last two
weeks causing the builds to fail when shippable re-builds the
containers.

This is really just a sticking plaster until we can get our own docker
hub images properly setup so we can avoid having dependencies on
external repos.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181214151718.5041-1-alex.bennee@linaro.org
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agohardfloat: implement float32/64 comparison
Emilio G. Cota [Sat, 17 Mar 2018 06:14:53 +0000 (02:14 -0400)]
hardfloat: implement float32/64 comparison

Performance results for fp-bench:

Host: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
cmp-single: 110.98 MFlops
cmp-double: 107.12 MFlops
- after:
cmp-single: 506.28 MFlops
cmp-double: 524.77 MFlops

Note that flattening both eq and eq_signaling versions
would give us extra performance (695v506, 615v524 Mflops
for single/double, respectively) but this would emit two
essentially identical functions for each eq/signaling pair,
which is a waste.

Aggregate performance improvement for the last few patches:
[ all charts in png: https://imgur.com/a/4yV8p ]

1. Host: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz

                   qemu-aarch64 NBench score; higher is better
                 Host: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz

  16 +-+-----------+-------------+----===-------+---===-------+-----------+-+
  14 +-+..........................@@@&&.=.......@@@&&.=...................+-+
  12 +-+..........................@.@.&.=.......@.@.&.=.....+befor===     +-+
  10 +-+..........................@.@.&.=.......@.@.&.=.....+ad@@&& =     +-+
   8 +-+.......................$$$%.@.&.=.......@.@.&.=.....+  @@u& =     +-+
   6 +-+............@@@&&=+***##.$%.@.&.=***##$$%+@.&.=..###$$%%@i& =     +-+
   4 +-+.......###$%%.@.&=.*.*.#.$%.@.&.=*.*.#.$%.@.&.=+**.#+$ +@m& =     +-+
   2 +-+.....***.#$.%.@.&=.*.*.#.$%.@.&.=*.*.#.$%.@.&.=.**.#+$+sqr& =     +-+
   0 +-+-----***##$%%@@&&=-***##$$%@@&&==***##$$%@@&&==-**##$$%+cmp==-----+-+
            FOURIER    NEURAL NELU DECOMPOSITION         gmean

                              qemu-aarch64 SPEC06fp (test set) speedup over QEMU 4c2c1015905
                                      Host: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
                                            error bars: 95% confidence interval

  4.5 +-+---+-----+----+-----+-----+-&---+-----+----+-----+-----+-----+----+-----+-----+-----+-----+----+-----+---+-+
    4 +-+..........................+@@+...........................................................................+-+
  3.5 +-+..............%%@&.........@@..............%%@&............................................+++dsub       +-+
  2.5 +-+....&&+.......%%@&.......+%%@..+%%&+..@@&+.%%@&....................................+%%&+.+%@&++%%@&      +-+
    2 +-+..+%%&..+%@&+.%%@&...+++..%%@...%%&.+$$@&..%%@&..%%@&.......+%%&+.%%@&+......+%%@&.+%%&++$$@&++d%@&  %%@&+-+
  1.5 +-+**#$%&**#$@&**#%@&**$%@**#$%@**#$%&**#$@&**$%@&*#$%@**#$%@**#$%&**#%@&**$%@&*#$%@**#$%&**#$@&*+f%@&**$%@&+-+
  0.5 +-+**#$%&**#$@&**#%@&**$%@**#$%@**#$%&**#$@&**$%@&*#$%@**#$%@**#$%&**#%@&**$%@&*#$%@**#$%&**#$@&+sqr@&**$%@&+-+
    0 +-+**#$%&**#$@&**#%@&**$%@**#$%@**#$%&**#$@&**$%@&*#$%@**#$%@**#$%&**#%@&**$%@&*#$%@**#$%&**#$@&*+cmp&**$%@&+-+
  410.bw416.gam433.434.z435.436.cac437.lesli444.447.de450.so453454.ca459.GemsF465.tont470.lb4482.sphinxgeomean

2. Host: ARM Aarch64 A57 @ 2.4GHz

                    qemu-aarch64 NBench score; higher is better
                 Host: Applied Micro X-Gene, Aarch64 A57 @ 2.4 GHz

    5 +-+-----------+-------------+-------------+-------------+-----------+-+
  4.5 +-+........................................@@@&==...................+-+
  3 4 +-+..........................@@@&==........@.@&.=.....+before       +-+
    3 +-+..........................@.@&.=........@.@&.=.....+ad@@@&==     +-+
  2.5 +-+.....................##$$%%.@&.=........@.@&.=.....+  @m@& =     +-+
    2 +-+............@@@&==.***#.$.%.@&.=.***#$$%%.@&.=.***#$$%%d@& =     +-+
  1.5 +-+.....***#$$%%.@&.=.*.*#.$.%.@&.=.*.*#.$.%.@&.=.*.*#+$ +f@& =     +-+
  0.5 +-+.....*.*#.$.%.@&.=.*.*#.$.%.@&.=.*.*#.$.%.@&.=.*.*#+$+sqr& =     +-+
    0 +-+-----***#$$%%@@&==-***#$$%%@@&==-***#$$%%@@&==-***#$$%+cmp==-----+-+
             FOURIER    NEURAL NLU DECOMPOSITION         gmean

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agohardfloat: implement float32/64 square root
Emilio G. Cota [Sat, 17 Mar 2018 04:30:40 +0000 (00:30 -0400)]
hardfloat: implement float32/64 square root

Performance results for fp-bench:

Host: Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
sqrt-single: 42.30 MFlops
sqrt-double: 22.97 MFlops
- after:
sqrt-single: 311.42 MFlops
sqrt-double: 311.08 MFlops

Here USE_FP makes a huge difference for f64's, with throughput
going from ~200 MFlops to ~300 MFlops.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agohardfloat: implement float32/64 fused multiply-add
Emilio G. Cota [Sat, 17 Mar 2018 05:17:30 +0000 (01:17 -0400)]
hardfloat: implement float32/64 fused multiply-add

Performance results for fp-bench:

1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
fma-single: 74.73 MFlops
fma-double: 74.54 MFlops
- after:
fma-single: 203.37 MFlops
fma-double: 169.37 MFlops

2. ARM Aarch64 A57 @ 2.4GHz
- before:
fma-single: 23.24 MFlops
fma-double: 23.70 MFlops
- after:
fma-single: 66.14 MFlops
fma-double: 63.10 MFlops

3. IBM POWER8E @ 2.1 GHz
- before:
fma-single: 37.26 MFlops
fma-double: 37.29 MFlops
- after:
fma-single: 48.90 MFlops
fma-double: 59.51 MFlops

Here having 3FP64 set to 1 pays off for x86_64:
[1] 170.15 vs [0] 153.12 MFlops

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agohardfloat: implement float32/64 division
Emilio G. Cota [Sat, 17 Mar 2018 04:45:01 +0000 (00:45 -0400)]
hardfloat: implement float32/64 division

Performance results for fp-bench:

1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
div-single: 34.84 MFlops
div-double: 34.04 MFlops
- after:
div-single: 275.23 MFlops
div-double: 216.38 MFlops

2. ARM Aarch64 A57 @ 2.4GHz
- before:
div-single: 9.33 MFlops
div-double: 9.30 MFlops
- after:
div-single: 51.55 MFlops
div-double: 15.09 MFlops

3. IBM POWER8E @ 2.1 GHz
- before:
div-single: 25.65 MFlops
div-double: 24.91 MFlops
- after:
div-single: 96.83 MFlops
div-double: 31.01 MFlops

Here setting 2FP64_USE_FP to 1 pays off for x86_64:
[1] 215.97 vs [0] 62.15 MFlops

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agohardfloat: implement float32/64 multiplication
Emilio G. Cota [Mon, 26 Mar 2018 18:54:25 +0000 (14:54 -0400)]
hardfloat: implement float32/64 multiplication

Performance results for fp-bench:

1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
mul-single: 126.91 MFlops
mul-double: 118.28 MFlops
- after:
mul-single: 258.02 MFlops
mul-double: 197.96 MFlops

2. ARM Aarch64 A57 @ 2.4GHz
- before:
mul-single: 37.42 MFlops
mul-double: 38.77 MFlops
- after:
mul-single: 73.41 MFlops
mul-double: 76.93 MFlops

3. IBM POWER8E @ 2.1 GHz
- before:
mul-single: 58.40 MFlops
mul-double: 59.33 MFlops
- after:
mul-single: 60.25 MFlops
mul-double: 94.79 MFlops

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agohardfloat: implement float32/64 addition and subtraction
Emilio G. Cota [Fri, 16 Mar 2018 23:58:42 +0000 (19:58 -0400)]
hardfloat: implement float32/64 addition and subtraction

Performance results (single and double precision) for fp-bench:

1. Intel(R) Core(TM) i7-6700K CPU @ 4.00GHz
- before:
add-single: 135.07 MFlops
add-double: 131.60 MFlops
sub-single: 130.04 MFlops
sub-double: 133.01 MFlops
- after:
add-single: 443.04 MFlops
add-double: 301.95 MFlops
sub-single: 411.36 MFlops
sub-double: 293.15 MFlops

2. ARM Aarch64 A57 @ 2.4GHz
- before:
add-single: 44.79 MFlops
add-double: 49.20 MFlops
sub-single: 44.55 MFlops
sub-double: 49.06 MFlops
- after:
add-single: 93.28 MFlops
add-double: 88.27 MFlops
sub-single: 91.47 MFlops
sub-double: 88.27 MFlops

3. IBM POWER8E @ 2.1 GHz
- before:
add-single: 72.59 MFlops
add-double: 72.27 MFlops
sub-single: 75.33 MFlops
sub-double: 70.54 MFlops
- after:
add-single: 112.95 MFlops
add-double: 201.11 MFlops
sub-single: 116.80 MFlops
sub-double: 188.72 MFlops

Note that the IBM and ARM machines benefit from having
HARDFLOAT_2F{32,64}_USE_FP set to 0. Otherwise their performance
can suffer significantly:
- IBM Power8:
add-single: [1] 54.94 vs [0] 116.37 MFlops
add-double: [1] 58.92 vs [0] 201.44 MFlops
- Aarch64 A57:
add-single: [1] 80.72 vs [0] 93.24 MFlops
add-double: [1] 82.10 vs [0] 88.18 MFlops

On the Intel machine, having 2F64 set to 1 pays off, but it
doesn't for 2F32:
- Intel i7-6700K:
add-single: [1] 285.79 vs [0] 426.70 MFlops
add-double: [1] 302.15 vs [0] 278.82 MFlops

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agofpu: introduce hardfloat
Emilio G. Cota [Sat, 17 Mar 2018 06:13:59 +0000 (02:13 -0400)]
fpu: introduce hardfloat

The appended paves the way for leveraging the host FPU for a subset
of guest FP operations. For most guest workloads (e.g. FP flags
aren't ever cleared, inexact occurs often and rounding is set to the
default [to nearest]) this will yield sizable performance speedups.

The approach followed here avoids checking the FP exception flags register.
See the added comment for details.

This assumes that QEMU is running on an IEEE754-compliant FPU and
that the rounding is set to the default (to nearest). The
implementation-dependent specifics of the FPU should not matter; things
like tininess detection and snan representation are still dealt with in
soft-fp. However, this approach will break on most hosts if we compile
QEMU with flags that break IEEE compatibility. There is no way to detect
all of these flags at compilation time, but at least we check for
-ffast-math (which defines __FAST_MATH__) and disable hardfloat
(plus emit a #warning) when it is set.

This patch just adds common code. Some operations will be migrated
to hardfloat in subsequent patches to ease bisection.

Note: some architectures (at least PPC, there might be others) clear
the status flags passed to softfloat before most FP operations. This
precludes the use of hardfloat, so to avoid introducing a performance
regression for those targets, we add a flag to disable hardfloat.
In the long run though it would be good to fix the targets so that
at least the inexact flag passed to softfloat is indeed sticky.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/fp: add fp-bench
Emilio G. Cota [Wed, 28 Mar 2018 17:57:56 +0000 (13:57 -0400)]
tests/fp: add fp-bench

These microbenchmarks will allow us to measure the performance impact of
FP emulation optimizations. Note that we can measure both directly the impact
on the softfloat functions (with "-t soft"), or the impact on an
emulated workload (call with "-t host" and run under qemu user-mode).

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agosoftfloat: add float{32,64}_is_zero_or_normal
Emilio G. Cota [Thu, 29 Mar 2018 00:29:55 +0000 (20:29 -0400)]
softfloat: add float{32,64}_is_zero_or_normal

These will gain some users very soon.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agosoftfloat: rename canonicalize to sf_canonicalize
Emilio G. Cota [Tue, 27 Mar 2018 16:57:22 +0000 (12:57 -0400)]
softfloat: rename canonicalize to sf_canonicalize

glibc >= 2.25 defines canonicalize in commit eaf5ad0
(Add canonicalize, canonicalizef, canonicalizel., 2016-10-26).

Given that we'll be including <math.h> soon, prepare
for this by prefixing our canonicalize() with sf_ to avoid
clashing with the libc's canonicalize().

Reported-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Tested-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotarget/tricore: use float32_is_denormal
Emilio G. Cota [Tue, 27 Mar 2018 00:48:50 +0000 (20:48 -0400)]
target/tricore: use float32_is_denormal

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agosoftfloat: add float{32,64}_is_{de,}normal
Emilio G. Cota [Fri, 16 Mar 2018 21:58:56 +0000 (17:58 -0400)]
softfloat: add float{32,64}_is_{de,}normal

This paves the way for upcoming work.

Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agofp-test: pick TARGET_ARM to get its specialization
Emilio G. Cota [Sat, 13 Oct 2018 02:55:57 +0000 (22:55 -0400)]
fp-test: pick TARGET_ARM to get its specialization

This gets rid of the muladd errors due to not raising the invalid flag.

- Before:
Errors found in f64_mulAdd, rounding near_even, tininess before rounding:
+000.0000000000000  +7FF.0000000000000  +7FF.FFFFFFFFFFFFF
        => +7FF.FFFFFFFFFFFFF .....  expected -7FF.FFFFFFFFFFFFF v....
[...]

- After:
In 6133248 tests, no errors found in f64_mulAdd, rounding near_even, tininess before rounding.
[...]

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agoMAINTAINERS: update status of FPU emulation
Alex Bennée [Wed, 5 Dec 2018 12:48:12 +0000 (12:48 +0000)]
MAINTAINERS: update status of FPU emulation

Given I've spent a fair amount of time around this code now I'm
putting myself forward as a maintainer. Also given that the code has
been extensively re-written and has testing and new incoming features
it is probably more than just Odd Fixes.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocontrib: add a basic gitdm config
Alex Bennée [Fri, 14 Dec 2018 20:54:33 +0000 (20:54 +0000)]
contrib: add a basic gitdm config

This is a QEMU specific version of a gitdm config for generating
reports on the contributor base of the project. I've added enough
group maps and domain aliases to ensure the current top ten is as
reflective as it can be. As of this commit running:

  git log --numstat --since "Last Year" | gitdm -n -l 10

Reports:

  Top changeset contributors by employer
  Red Hat                   3172 (44.3%)
  Linaro                    1153 (16.1%)
  (None)                     549 (7.7%)
  IBM                        348 (4.9%)
  Academics (various)        170 (2.4%)
  Virtuozzo                  168 (2.3%)
  Wave Computing             118 (1.6%)
  Xilinx                     102 (1.4%)
  Igalia                      93 (1.3%)
  Cadence Design Systems      88 (1.2%)

  Top lines changed by employer
  Red Hat                   144092 (28.1%)
  Cadence Design Systems    126554 (24.6%)
  Linaro                    77480 (15.1%)
  Wave Computing            33134 (6.5%)
  SiFive                    14392 (2.8%)
  IBM                       12219 (2.4%)
  (None)                    11948 (2.3%)
  Academics (various)       10447 (2.0%)
  Virtuozzo                 10445 (2.0%)
  CodeWeavers               9179 (1.8%)

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
5 years agoxxhash: match output against the original xxhash32
Emilio G. Cota [Fri, 23 Nov 2018 22:41:43 +0000 (17:41 -0500)]
xxhash: match output against the original xxhash32

Change the order in which we extract a/b and c/d to
match the output of the upstream xxhash32.

Tested with:
  https://github.com/cota/xxhash/tree/qemu

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agoinclude: move exec/tb-hash-xx.h to qemu/xxhash.h
Emilio G. Cota [Sat, 20 Oct 2018 22:49:53 +0000 (18:49 -0400)]
include: move exec/tb-hash-xx.h to qemu/xxhash.h

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agoexec: introduce qemu_xxhash{2,4,5,6,7}
Emilio G. Cota [Sat, 20 Oct 2018 22:46:28 +0000 (18:46 -0400)]
exec: introduce qemu_xxhash{2,4,5,6,7}

Before moving them all to include/qemu/xxhash.h.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agoqht-bench: document -p flag
Emilio G. Cota [Fri, 23 Nov 2018 22:39:04 +0000 (17:39 -0500)]
qht-bench: document -p flag

Which we forgot to do in bd224fce60 ("qht-bench: add -p flag
to precompute hash values", 2018-09-26).

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg: Drop nargs from tcg_op_insert_{before,after}
Emilio G. Cota [Sun, 9 Dec 2018 19:37:19 +0000 (14:37 -0500)]
tcg: Drop nargs from tcg_op_insert_{before,after}

It's unused since 75e8b9b7aa0b95a761b9add7e2f09248b101a392.

Signed-off-by: Emilio G. Cota <cota@braap.org>
Message-Id: <20181209193749.12277-9-cota@braap.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS
Alistair Francis [Wed, 12 Dec 2018 20:58:11 +0000 (20:58 +0000)]
tcg/mips: Improve the add2/sub2 command to use TCG_TARGET_REG_BITS

Instead of hard coding 31 for the shift right use TCG_TARGET_REG_BITS - 1.

Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <7dfbddf7014a595150aa79011ddb342c3cc17ec3.1544648105.git.alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg: Add TCG_TARGET_HAS_MEMORY_BSWAP
Richard Henderson [Tue, 20 Nov 2018 07:37:42 +0000 (08:37 +0100)]
tcg: Add TCG_TARGET_HAS_MEMORY_BSWAP

For now, defined universally as true, since we previously required
backends to implement swapped memory operations.  Future patches
may now remove that support where it is onerous.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/optimize: Optimize bswap
Richard Henderson [Tue, 20 Nov 2018 07:53:34 +0000 (08:53 +0100)]
tcg/optimize: Optimize bswap

Somehow we forgot these operations, once upon a time.
This will allow immediate stores to have their bswap
optimized away.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg: Clean up generic bswap64
Richard Henderson [Tue, 20 Nov 2018 20:05:03 +0000 (21:05 +0100)]
tcg: Clean up generic bswap64

Based on the only current user, Sparc:

New code uses 2 constants that take 2 insns to load from constant pool,
plus 13.  Old code used 6 constants that took 1 or 2 insns to create,
plus 21.  The result is a new total of 17 vs an old total of 29.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg: Clean up generic bswap32
Richard Henderson [Tue, 20 Nov 2018 19:38:16 +0000 (20:38 +0100)]
tcg: Clean up generic bswap32

Based on the only current user, Sparc:

New code uses 1 constant that takes 2 insns to create, plus 8.
Old code used 2 constants that took 2 insns to create, plus 9.
The result is a new total of 10 vs an old total of 13.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Add setup_guest_base_seg for FreeBSD
Richard Henderson [Mon, 3 Dec 2018 15:25:10 +0000 (09:25 -0600)]
tcg/i386: Add setup_guest_base_seg for FreeBSD

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Precompute all guest_base parameters
Richard Henderson [Mon, 3 Dec 2018 15:22:57 +0000 (09:22 -0600)]
tcg/i386: Precompute all guest_base parameters

These values are constant between all qemu_ld/st invocations;
there is no need to figure this out each time.  If we cannot
use a segment or an offset directly for guest_base, load the
value into a register in the prologue.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Assume 32-bit values are zero-extended
Richard Henderson [Mon, 3 Dec 2018 14:43:17 +0000 (08:43 -0600)]
tcg/i386: Assume 32-bit values are zero-extended

We now have an invariant that all TCG_TYPE_I32 values are
zero-extended, which means that we do not need to extend
them again during qemu_ld/st, either explicitly via a separate
tcg_out_ext32u or implicitly via P_ADDR32.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests
Richard Henderson [Sat, 1 Dec 2018 00:31:15 +0000 (16:31 -0800)]
tcg/i386: Implement INDEX_op_extr{lh}_i64_i32 for 32-bit guests

This preserves the invariant that all TCG_TYPE_I32 values are
zero-extended in the 64-bit host register.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path
Richard Henderson [Fri, 14 Dec 2018 00:42:52 +0000 (18:42 -0600)]
tcg/i386: Propagate is64 to tcg_out_qemu_ld_slow_path

This helps preserve the invariant that all TCG_TYPE_I32 values
are stored zero-extended in the 64-bit host registers.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Propagate is64 to tcg_out_qemu_ld_direct
Richard Henderson [Tue, 20 Nov 2018 22:43:17 +0000 (23:43 +0100)]
tcg/i386: Propagate is64 to tcg_out_qemu_ld_direct

This helps preserve the invariant that all TCG_TYPE_I32 values
are stored zero-extended in the 64-bit host registers.

Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/s390x: Return false on failure from patch_reloc
Richard Henderson [Fri, 30 Nov 2018 21:41:51 +0000 (21:41 +0000)]
tcg/s390x: Return false on failure from patch_reloc

This does require an extra two checks within the slow paths
to replace the assert that we're moving.  Also add two checks
within existing functions that lacked any kind of assert for
out of range branch.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/ppc: Return false on failure from patch_reloc
Richard Henderson [Fri, 30 Nov 2018 21:25:13 +0000 (21:25 +0000)]
tcg/ppc: Return false on failure from patch_reloc

The reloc_pc{14,24}_val routines retain their asserts.
Use these directly within the slow paths.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/arm: Return false on failure from patch_reloc
Richard Henderson [Fri, 30 Nov 2018 21:01:57 +0000 (13:01 -0800)]
tcg/arm: Return false on failure from patch_reloc

This does require an extra two checks within the slow paths
to replace the assert that we're moving.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/aarch64: Return false on failure from patch_reloc
Richard Henderson [Fri, 30 Nov 2018 20:44:53 +0000 (12:44 -0800)]
tcg/aarch64: Return false on failure from patch_reloc

This does require an extra two checks within the slow paths
to replace the assert that we're moving.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Return false on failure from patch_reloc
Richard Henderson [Fri, 30 Nov 2018 20:31:59 +0000 (12:31 -0800)]
tcg/i386: Return false on failure from patch_reloc

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg: Return success from patch_reloc
Richard Henderson [Fri, 30 Nov 2018 19:52:48 +0000 (11:52 -0800)]
tcg: Return success from patch_reloc

This will move the assert for success from within (subroutines of)
patch_reloc into the callers.  It will also let new code do something
different when a relocation is out of range.

For the moment, all backends are trivially converted to return true.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/mips: Remove retranslation code
Richard Henderson [Fri, 30 Nov 2018 19:42:17 +0000 (11:42 -0800)]
tcg/mips: Remove retranslation code

There is no longer a need for preserving branch offset operands,
as we no longer re-translate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/sparc: Remove retranslation code
Richard Henderson [Fri, 30 Nov 2018 19:36:03 +0000 (11:36 -0800)]
tcg/sparc: Remove retranslation code

There is no longer a need for preserving branch offset operands,
as we no longer re-translate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/s390: Remove retranslation code
Richard Henderson [Fri, 30 Nov 2018 19:28:51 +0000 (19:28 +0000)]
tcg/s390: Remove retranslation code

There is no longer a need for preserving branch offset operands,
as we no longer re-translate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/ppc: Fold away "noaddr" branch routines
Richard Henderson [Thu, 29 Nov 2018 22:48:26 +0000 (22:48 +0000)]
tcg/ppc: Fold away "noaddr" branch routines

There is no longer a need for preserving branch offset operands,
as we no longer re-translate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/arm: Fold away "noaddr" branch routines
Richard Henderson [Thu, 29 Nov 2018 21:13:59 +0000 (13:13 -0800)]
tcg/arm: Fold away "noaddr" branch routines

There are one use apiece for these.  There is no longer a need for
preserving branch offset operands, as we no longer re-translate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/arm: Remove reloc_pc24_atomic
Richard Henderson [Thu, 29 Nov 2018 21:17:29 +0000 (13:17 -0800)]
tcg/arm: Remove reloc_pc24_atomic

It is unused since 3fb53fb4d12f2e7833bd1659e6013237b130ef20.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/aarch64: Fold away "noaddr" branch routines
Richard Henderson [Thu, 29 Nov 2018 20:52:47 +0000 (20:52 +0000)]
tcg/aarch64: Fold away "noaddr" branch routines

There are one use apiece for these.  There is no longer a need for
preserving branch offset operands, as we no longer re-translate.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/aarch64: Remove reloc_pc26_atomic
Richard Henderson [Thu, 29 Nov 2018 20:41:14 +0000 (20:41 +0000)]
tcg/aarch64: Remove reloc_pc26_atomic

It is unused since b68686bd4bfeb70040b4099df993dfa0b4f37b03.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Move TCG_REG_CALL_STACK from define to enum
Richard Henderson [Tue, 30 Oct 2018 21:55:43 +0000 (21:55 +0000)]
tcg/i386: Move TCG_REG_CALL_STACK from define to enum

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/i386: Always use %ebp for TCG_AREG0
Richard Henderson [Tue, 30 Oct 2018 21:52:44 +0000 (21:52 +0000)]
tcg/i386: Always use %ebp for TCG_AREG0

For x86_64, this can remove a REX prefix resulting in smaller code
when manipulating globals of type i32, as we move them between backing
store via cpu_env, aka TCG_AREG0.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Emilio G. Cota <cota@braap.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/sparc: Remove the constant pool
Richard Henderson [Sun, 16 Dec 2018 21:30:21 +0000 (00:30 +0300)]
target/sparc: Remove the constant pool

Partially reverts ab20bdc1162.  The 14-bit displacement that we
allowed to reach the constant pool is not always sufficient.
Retain the tb-relative addressing, as that is how most return
values from the tb are computed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into staging
Peter Maydell [Sun, 16 Dec 2018 16:32:42 +0000 (16:32 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-misc-20181214' into staging

miscellaneous patches:
 * checkpatch.pl: Enforce multiline comment syntax
 * Rename cpu_physical_memory_write_rom() to address_space_write_rom()
 * disas, monitor, elf_ops: Use address_space_read() to read memory
 * Remove load_image() in favour of load_image_size()
 * Fix some minor memory leaks in arm boards/devices
 * virt: fix broken indentation

# gpg: Signature made Fri 14 Dec 2018 14:41:20 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-misc-20181214: (22 commits)
  virt: Fix broken indentation
  target/arm: Create timers in realize, not init
  tests/test-arm-mptimer: Don't leak string memory
  hw/sd/sdhci: Don't leak memory region in sdhci_sysbus_realize()
  hw/arm/mps2-tz.c: Free mscname string in make_dma()
  target/arm: Free name string in ARMCPRegInfo hashtable entries
  include/hw/loader.h: Document load_image_size()
  hw/core/loader.c: Remove load_image()
  device_tree.c: Don't use load_image()
  hw/block/tc58128.c: Don't use load_image()
  hw/i386/multiboot.c: Don't use load_image()
  hw/i386/pc.c: Don't use load_image()
  hw/pci/pci.c: Don't use load_image()
  hw/smbios/smbios.c: Don't use load_image()
  hw/ppc/ppc405_boards: Don't use load_image()
  hw/ppc/mac_newworld, mac_oldworld: Don't use load_image()
  elf_ops.h: Use address_space_write() to write memory
  monitor: Use address_space_read() to read memory
  disas.c: Use address_space_read() to read memory
  Rename cpu_physical_memory_write_rom() to address_space_write_rom()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
Peter Maydell [Sun, 16 Dec 2018 12:49:06 +0000 (12:49 +0000)]
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging

Block layer patches:

- qcow2: Decompression worker threads
- dmg: lzfse compression support
- file-posix: Simplify delegation to worker thread
- Don't pass flags to bdrv_reopen_queue()
- iotests: make 235 work on s390 (and others)

# gpg: Signature made Fri 14 Dec 2018 10:55:09 GMT
# gpg:                using RSA key 7F09B272C88F2FD6
# gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>"
# Primary key fingerprint: DC3D EB15 9A9A F95D 3D74  56FE 7F09 B272 C88F 2FD6

* remotes/kevin/tags/for-upstream: (42 commits)
  block/mirror: add missing coroutine_fn annotations
  iotests: make 235 work on s390 (and others)
  block: Assert that flags are up-to-date in bdrv_reopen_prepare()
  block: Remove assertions from update_flags_from_options()
  block: Stop passing flags to bdrv_reopen_queue_child()
  block: Remove flags parameter from bdrv_reopen_queue()
  block: Clean up reopen_backing_file() in block/replication.c
  qemu-io: Put flag changes in the options QDict in reopen_f()
  block: Drop bdrv_reopen()
  block: Use bdrv_reopen_set_read_only() in the mirror driver
  block: Use bdrv_reopen_set_read_only() in external_snapshot_commit()
  block: Use bdrv_reopen_set_read_only() in qmp_change_backing_file()
  block: Use bdrv_reopen_set_read_only() in stream_start/complete()
  block: Use bdrv_reopen_set_read_only() in bdrv_commit()
  block: Use bdrv_reopen_set_read_only() in commit_start/complete()
  block: Use bdrv_reopen_set_read_only() in bdrv_backing_update_filename()
  block: Add bdrv_reopen_set_read_only()
  file-posix: Avoid aio_worker() for QEMU_AIO_IOCTL
  file-posix: Switch to .bdrv_co_ioctl
  file-posix: Remove paio_submit_co()
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/kraxel/tags/usb-20181214-pull-request' into...
Peter Maydell [Sun, 16 Dec 2018 12:05:08 +0000 (12:05 +0000)]
Merge remote-tracking branch 'remotes/kraxel/tags/usb-20181214-pull-request' into staging

usb: fixes for mtp, ehci, usb-host and pvusb (xen).

# gpg: Signature made Fri 14 Dec 2018 10:38:33 GMT
# gpg:                using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>"
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>"
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>"
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* remotes/kraxel/tags/usb-20181214-pull-request:
  usb-mtp: Limit filename to object information size
  usb-mtp: use O_NOFOLLOW and O_CLOEXEC.
  ehci: fix fetch qtd race
  usb-host: reset and close libusb_device_handle before qemu exit
  pvusb: set max grants only in initialise

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2018-12-13-v2' into staging
Peter Maydell [Sat, 15 Dec 2018 21:19:06 +0000 (21:19 +0000)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2018-12-13-v2' into staging

QAPI patches for 2018-12-13

# gpg: Signature made Fri 14 Dec 2018 05:53:51 GMT
# gpg:                using RSA key 3870B400EB918653
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>"
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>"
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-qapi-2018-12-13-v2: (32 commits)
  qapi: add conditions to REPLICATION type/commands on the schema
  qapi: add more conditions to SPICE
  qapi: add condition to variants documentation
  qapi: add 'If:' condition to struct members documentation
  qapi: add 'If:' condition to enum values documentation
  qapi: Add #if conditions to generated code members
  qapi: add 'if' to alternate members
  qapi: add 'if' to union members
  qapi: Add 'if' to implicit struct members
  qapi: add a dictionary form for TYPE
  qapi-events: add 'if' condition to implicit event enum
  qapi: add 'if' to enum members
  qapi: add a dictionary form with 'name' key for enum members
  qapi: improve reporting of unknown or missing keys
  qapi: factor out checking for keys
  tests: print enum type members more like object type members
  qapi: change enum visitor and gen_enum* to take QAPISchemaMember
  qapi: Do not define enumeration value explicitly
  qapi: break long lines at 'data' member
  qapi: rename QAPISchemaEnumType.values to .members
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
Peter Maydell [Fri, 14 Dec 2018 17:30:06 +0000 (17:30 +0000)]
Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging

Most notable change in this PR is the full removal of the "handle" fsdev
backend.

# gpg: Signature made Wed 12 Dec 2018 13:20:42 GMT
# gpg:                using RSA key 71D4D5E5822F73D6
# gpg: Good signature from "Greg Kurz <groug@kaod.org>"
# gpg:                 aka "Gregory Kurz <gregory.kurz@free.fr>"
# gpg:                 aka "[jpeg image of size 3330]"
# Primary key fingerprint: B482 8BAF 9431 40CE F2A3  4910 71D4 D5E5 822F 73D6

* remotes/gkurz/tags/for-upstream:
  9p: remove support for the "handle" backend
  xen/9pfs: use g_new(T, n) instead of g_malloc(sizeof(T) * n)
  9p: use g_new(T, n) instead of g_malloc(sizeof(T) * n)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20181213' into...
Peter Maydell [Fri, 14 Dec 2018 16:03:33 +0000 (16:03 +0000)]
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20181213' into staging

target-arm queue:
 * Convert various devices from sysbus init to instance_init
 * Remove the now unused sysbus init support entirely
 * Allow AArch64 processors to boot from a kernel placed over 4GB
 * hw: arm: musicpal: drop TYPE_WM8750 in object_property_set_link()
 * versal: minor fixes to virtio-mmio instantation
 * arm: Implement the ARMv8.1-HPD extension
 * arm: Implement the ARMv8.2-AA32HPD extension
 * arm: Implement the ARMv8.1-LOR extension (as the trivial
   "no limited ordering regions provided" minimum)

# gpg: Signature made Thu 13 Dec 2018 14:52:25 GMT
# gpg:                using RSA key 3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20181213: (37 commits)
  target/arm: Implement the ARMv8.1-LOR extension
  target/arm: Use arm_hcr_el2_eff more places
  target/arm: Introduce arm_hcr_el2_eff
  target/arm: Implement the ARMv8.2-AA32HPD extension
  target/arm: Implement the ARMv8.1-HPD extension
  target/arm: Tidy scr_write
  target/arm: Fix HCR_EL2.TGE check in arm_phys_excp_target_el
  target/arm: Add SCR_EL3 bits up to ARMv8.5
  target/arm: Add HCR_EL2 bits up to ARMv8.5
  target/arm: Move id_aa64mmfr* to ARMISARegisters
  hw/arm: versal: Correct the nr of IRQs to 192
  hw/arm: versal: Use IRQs 111 - 118 for virtio-mmio
  hw/arm: versal: Reduce number of virtio-mmio instances
  hw/arm: versal: Remove bogus virtio-mmio creation
  core/sysbus: remove the SysBusDeviceClass::init path
  xen_backend: remove xen_sysdev_init() function
  usb/tusb6010: Convert sysbus init function to realize function
  timer/puv3_ost: Convert sysbus init function to realize function
  timer/grlib_gptimer: Convert sysbus init function to realize function
  timer/etraxfs_timer: Convert sysbus init function to realize function
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agovirt: Fix broken indentation
Eduardo Habkost [Fri, 14 Dec 2018 13:30:55 +0000 (13:30 +0000)]
virt: Fix broken indentation

I introduced indentation using tabs instead of spaces in another
commit.  Peter reported the problem, and I failed to fix that
before sending my pull request.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181212003147.29604-1-ehabkost@redhat.com
Fixes: 951597607696 ("virt: Eliminate separate instance_init functions")
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agotarget/arm: Create timers in realize, not init
Peter Maydell [Fri, 14 Dec 2018 13:30:55 +0000 (13:30 +0000)]
target/arm: Create timers in realize, not init

The timer_new() function allocates memory; this means that
if we call it in the CPU's init method we would need
to provide an instance_finalize method to free it. Defer
the timer creation to the realize function instead.

This fixes a memory leak spotted by clang LeakSanitizer
when a CPU object is created for introspection.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20181204132952.2601-6-peter.maydell@linaro.org

5 years agotests/test-arm-mptimer: Don't leak string memory
Peter Maydell [Fri, 14 Dec 2018 13:30:54 +0000 (13:30 +0000)]
tests/test-arm-mptimer: Don't leak string memory

The test-arm-mptimer setup creates a lot of test names using
g_strdup_printf() and never frees them. This is entirely
harmless since it's one-shot test code, but it clutters
up the output from clang's LeakSanitizer. Refactor to
use a helper function so we can free the memory.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181204132952.2601-5-peter.maydell@linaro.org

5 years agohw/sd/sdhci: Don't leak memory region in sdhci_sysbus_realize()
Peter Maydell [Fri, 14 Dec 2018 13:30:54 +0000 (13:30 +0000)]
hw/sd/sdhci: Don't leak memory region in sdhci_sysbus_realize()

In sdhci_sysbus_realize() we override the initialization of
s->iomem that sdhci_common_realize() performs. However we
don't destroy the old memory region before reinitializing
it, which means that the memory allocated for mr->name in
memory_region_do_init() is leaked.

Since sdhci_initfn() already initializes s->io_ops to
&sdhci_mmio_ops, always use that in sdhci_common_realize()
and remove the now-unnecessary reinitialization of the
MMIO region from sdhci_sysbus_realize().

Spotted by clang's leak sanitizer.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181204132952.2601-4-peter.maydell@linaro.org

5 years agohw/arm/mps2-tz.c: Free mscname string in make_dma()
Peter Maydell [Fri, 14 Dec 2018 13:30:54 +0000 (13:30 +0000)]
hw/arm/mps2-tz.c: Free mscname string in make_dma()

The clang leak sanitizer spots a (one-off, trivial) memory
leak in make_dma() due to a missing free.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181204132952.2601-3-peter.maydell@linaro.org

5 years agotarget/arm: Free name string in ARMCPRegInfo hashtable entries
Peter Maydell [Fri, 14 Dec 2018 13:30:53 +0000 (13:30 +0000)]
target/arm: Free name string in ARMCPRegInfo hashtable entries

When we add a new entry to the ARMCPRegInfo hash table in
add_cpreg_to_hashtable(), we allocate memory for tehe
ARMCPRegInfo struct itself, and we also g_strdup() the
name string. So the hashtable's value destructor function
must free the name string as well as the struct.

Spotted by clang's leak sanitizer. The leak here is a
small one-off leak at startup, because we don't support
CPU hotplug, and so the only time when we destroy
hash table entries is for the case where ARM_CP_OVERRIDE
means we register a wildcard entry and then override it later.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181204132952.2601-2-peter.maydell@linaro.org

5 years agoinclude/hw/loader.h: Document load_image_size()
Peter Maydell [Fri, 14 Dec 2018 13:30:53 +0000 (13:30 +0000)]
include/hw/loader.h: Document load_image_size()

Add a documentation comment for load_image_size().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-11-peter.maydell@linaro.org

5 years agohw/core/loader.c: Remove load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:53 +0000 (13:30 +0000)]
hw/core/loader.c: Remove load_image()

The load_image() function is now no longer used anywhere, so
we can remove it completely. (Use load_image_size() or
g_file_get_contents() instead.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-10-peter.maydell@linaro.org

5 years agodevice_tree.c: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:52 +0000 (13:30 +0000)]
device_tree.c: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Instead use load_image_size().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-9-peter.maydell@linaro.org

5 years agohw/block/tc58128.c: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:52 +0000 (13:30 +0000)]
hw/block/tc58128.c: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Instead use load_image_size().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-8-peter.maydell@linaro.org

5 years agohw/i386/multiboot.c: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:51 +0000 (13:30 +0000)]
hw/i386/multiboot.c: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Instead use load_image_size().

While we are converting the code, add the missing error check.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-7-peter.maydell@linaro.org

5 years agohw/i386/pc.c: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:51 +0000 (13:30 +0000)]
hw/i386/pc.c: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Use the glib g_file_get_contents() function instead, which does
the whole "allocate memory for the file and read it in" operation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-6-peter.maydell@linaro.org

5 years agohw/pci/pci.c: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:51 +0000 (13:30 +0000)]
hw/pci/pci.c: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Instead use load_image_size().

While we are converting this code, add an error-check
for read failure.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-5-peter.maydell@linaro.org

5 years agohw/smbios/smbios.c: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:50 +0000 (13:30 +0000)]
hw/smbios/smbios.c: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Instead use load_image_size().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-id: 20181130151712.2312-4-peter.maydell@linaro.org

5 years agohw/ppc/ppc405_boards: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:50 +0000 (13:30 +0000)]
hw/ppc/ppc405_boards: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Instead use load_image_size().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-id: 20181130151712.2312-3-peter.maydell@linaro.org

5 years agohw/ppc/mac_newworld, mac_oldworld: Don't use load_image()
Peter Maydell [Fri, 14 Dec 2018 13:30:50 +0000 (13:30 +0000)]
hw/ppc/mac_newworld, mac_oldworld: Don't use load_image()

The load_image() function is deprecated, as it does not let the
caller specify how large the buffer to read the file into is.
Use the glib g_file_get_contents() function instead, which does
the whole "allocate memory for the file and read it in" operation.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-id: 20181130151712.2312-2-peter.maydell@linaro.org

5 years agoelf_ops.h: Use address_space_write() to write memory
Peter Maydell [Fri, 14 Dec 2018 13:30:49 +0000 (13:30 +0000)]
elf_ops.h: Use address_space_write() to write memory

Currently the load_elf function in elf_ops.h uses
cpu_physical_memory_write() to write the ELF file to
memory if it is not handling it as a ROM blob. This
means we ignore the AddressSpace that the function
is passed to define where it should be loaded.
Use address_space_write() instead.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181122172653.3413-4-peter.maydell@linaro.org

5 years agomonitor: Use address_space_read() to read memory
Peter Maydell [Fri, 14 Dec 2018 13:30:49 +0000 (13:30 +0000)]
monitor: Use address_space_read() to read memory

Currently monitor.c reads physical memory using
cpu_physical_memory_read(). This effectively hard-codes
assuming that all CPUs have the same view of physical
memory. Switch to address_space_read() instead, which
lets us use the AddressSpace for the CPU we're
reading memory for (falling back to address_space_memory
if there is no CPU, as happens with the "none" board).
As a bonus, this allows us to detect failures to read memory.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181122172653.3413-3-peter.maydell@linaro.org

5 years agodisas.c: Use address_space_read() to read memory
Peter Maydell [Fri, 14 Dec 2018 13:30:49 +0000 (13:30 +0000)]
disas.c: Use address_space_read() to read memory

Currently disas.c reads physical memory using
cpu_physical_memory_read(). This effectively hard-codes
assuming that all CPUs have the same view of physical
memory. Switch to address_space_read() instead, which
lets us use the AddressSpace for the CPU we're
disassembling for.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-id: 20181122172653.3413-2-peter.maydell@linaro.org

5 years agoRename cpu_physical_memory_write_rom() to address_space_write_rom()
Peter Maydell [Fri, 14 Dec 2018 13:30:48 +0000 (13:30 +0000)]
Rename cpu_physical_memory_write_rom() to address_space_write_rom()

The API of cpu_physical_memory_write_rom() is odd, because it
takes an AddressSpace, unlike all the other cpu_physical_memory_*
access functions. Rename it to address_space_write_rom(), and
bring its API into line with address_space_write().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 20181122133507.30950-3-peter.maydell@linaro.org

5 years agoexec.c: Rename cpu_physical_memory_write_rom_internal()
Peter Maydell [Fri, 14 Dec 2018 13:30:48 +0000 (13:30 +0000)]
exec.c: Rename cpu_physical_memory_write_rom_internal()

Rename cpu_physical_memory_write_rom_internal() to
address_space_write_rom_internal(), and make it take
MemTxAttrs and return a MemTxResult. This brings its
API into line with address_space_write().

This is an internal function to exec.c; fixing its API
will allow us to change the global function
cpu_physical_memory_write_rom().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Message-id: 20181122133507.30950-2-peter.maydell@linaro.org

5 years agoscripts/checkpatch.pl: Enforce multiline comment syntax
Peter Maydell [Fri, 14 Dec 2018 13:30:48 +0000 (13:30 +0000)]
scripts/checkpatch.pl: Enforce multiline comment syntax

We now require Linux-kernel-style multiline comments:
    /*
     * line one
     * line two
     */

Enforce this in checkpatch.pl, by backporting the relevant
parts of the Linux kernel's checkpatch.pl. (The only changes
needed are that Linux's checkpatch.pl WARN() function takes
an extra argument that ours does not, and the kernel has a
special case for networking code we don't want.)"

The kernel's checkpatch does not enforce "leading /* on
a line of its own, so that part is unique to QEMU's checkpatch.

Sample warning output:

WARNING: Block comments use a leading /* on a separate line
#34: FILE: hw/intc/arm_gicv3_common.c:39:
+    /* Older versions of QEMU had a bug in the handling of state save/restore

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
5 years agoblock/mirror: add missing coroutine_fn annotations
Stefan Hajnoczi [Thu, 13 Dec 2018 11:24:34 +0000 (11:24 +0000)]
block/mirror: add missing coroutine_fn annotations

Marking a function coroutine_fn currently has no effect on the compiler,
but it documents that this function must be called from coroutine
context and it may yield.  This is important information for the
programmer.

Also, if we ever transition to a stackless coroutine implementation,
then it's likely that the annotation will become mandatory so the
compiler can use the correct calling convention for coroutine functions.

Cc: Max Reitz <mreitz@redhat.com>
Cc: John Snow <jsnow@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
5 years agoiotests: make 235 work on s390 (and others)
Christian Borntraeger [Wed, 5 Dec 2018 08:43:08 +0000 (09:43 +0100)]
iotests: make 235 work on s390 (and others)

"-machine pc" will not work all architectures. Lets fall back to the
default machine by not specifying it.

In addition we also need to specify -no-shutdown on s390 as qemu will
exit otherwise.

Cc: qemu-stable@nongnu.org
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
5 years agoblock: Assert that flags are up-to-date in bdrv_reopen_prepare()
Alberto Garcia [Mon, 12 Nov 2018 14:00:47 +0000 (16:00 +0200)]
block: Assert that flags are up-to-date in bdrv_reopen_prepare()

Towards the end of bdrv_reopen_queue_child(), before starting to
process the children, the update_flags_from_options() function is
called in order to have BDRVReopenState.flags in sync with the options
from the QDict.

This is necessary because during the reopen process flags must be
updated for all nodes in the queue so bdrv_is_writable_after_reopen()
and the permission checks work correctly.

Because of that, calling update_flags_from_options() again in
bdrv_reopen_prepare() doesn't really change the flags (they are
already up-to-date). But we need to call it in order to remove those
options from QemuOpts and that way indicate that they have been
processed.

Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
5 years agoblock: Remove assertions from update_flags_from_options()
Alberto Garcia [Mon, 12 Nov 2018 14:00:46 +0000 (16:00 +0200)]
block: Remove assertions from update_flags_from_options()

This function takes four options (cache.direct, cache.no-flush,
read-only and auto-read-only) from a QemuOpts object and updates the
flags accordingly.

If any of those options is not set (because it was missing from the
original QDict or because it had an invalid value) then the function
aborts with a failed assertion:

   $ qemu-io -c 'reopen -o read-only=foo' hd.qcow2
   block.c:1126: update_flags_from_options: Assertion `qemu_opt_find(opts, BDRV_OPT_CACHE_DIRECT)' failed.
   Aborted

This assertion is unnecessary, and it forces any caller of
bdrv_reopen() to pass all the aforementioned four options. This may
have made sense in order to remove ambiguity when bdrv_reopen() was
taking both flags and options, but that's not the case anymore.

It's also unnecessary if we want to validate the option values,
because bdrv_reopen_prepare() already takes care of that, as we can
see if we remove the assertions:

   $ qemu-io -c 'reopen -o read-only=foo' hd.qcow2
   Parameter 'read-only' expects 'on' or 'off'

Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
5 years agoblock: Stop passing flags to bdrv_reopen_queue_child()
Alberto Garcia [Mon, 12 Nov 2018 14:00:45 +0000 (16:00 +0200)]
block: Stop passing flags to bdrv_reopen_queue_child()

Now that all callers are passing the new options using the QDict we no
longer need the 'flags' parameter.

This patch makes the following changes:

   1) The update_options_from_flags() call is no longer necessary
      so it can be removed.

   2) The update_flags_from_options() call is now used in all cases,
      and is moved down a few lines so it happens after the options
      QDict contains the final set of values.

   3) The flags parameter is removed. Now the flags are initialized
      using the current value (for the top-level node) or the parent
      flags (after inherit_options()). In both cases the initial
      values are updated to reflect the new options in the QDict. This
      happens in bdrv_reopen_queue_child() (as explained above) and in
      bdrv_reopen_prepare().

Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
5 years agoblock: Remove flags parameter from bdrv_reopen_queue()
Alberto Garcia [Mon, 12 Nov 2018 14:00:44 +0000 (16:00 +0200)]
block: Remove flags parameter from bdrv_reopen_queue()

Now that all callers are passing all flag changes as QDict options,
the flags parameter is no longer necessary, so we can get rid of it.

Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
5 years agoblock: Clean up reopen_backing_file() in block/replication.c
Alberto Garcia [Mon, 12 Nov 2018 14:00:43 +0000 (16:00 +0200)]
block: Clean up reopen_backing_file() in block/replication.c

This function is used to put the hidden and secondary disks in
read-write mode before launching the backup job, and back in read-only
mode afterwards.

This patch does the following changes:

  - Use an options QDict with the "read-only" option instead of
    passing the changes as flags only.

  - Simplify the code (it was unnecessarily complicated and verbose).

  - Fix a bug due to which the secondary disk was not being put back
    in read-only mode when writable=false (because in this case
    orig_secondary_flags always had the BDRV_O_RDWR flag set).

  - Stop clearing the BDRV_O_INACTIVE flag.

The flags parameter to bdrv_reopen_queue() becomes redundant and we'll
be able to get rid of it in a subsequent patch.

Signed-off-by: Alberto Garcia <berto@igalia.com>
Reviewed-by: Max Reitz <mreitz@redhat.com>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>