Alexander Graf [Thu, 17 May 2012 23:53:01 +0000 (01:53 +0200)]
dt: add helper for 64bit cell adds
Some times in the device tree, we find an array of 2 u32 cells that
really are a single u64 value. This patch adds a helper to make the
creation of these easy.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
Alexander Graf [Thu, 17 May 2012 14:58:55 +0000 (16:58 +0200)]
dt: add helper for phandle allocation
Phandle references work by having 2 pieces:
- a "phandle" 1-cell property in the device tree node
- a reference to the same value in a property we want to point
to the other node
To generate the 1-cell property, we need an allocation mechanism that
gives us a unique number space. This patch adds an allocator for these
properties.
Alexander Graf [Thu, 17 May 2012 13:33:54 +0000 (15:33 +0200)]
dt: add helper for empty dt creation
We want to get rid of the concept of loading an external device tree and instead
generate our own. However, to do this we need to also create a device tree
template programatically.
This patch adds a helper to create an empty device tree in memory.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
Alexander Graf [Thu, 17 May 2012 13:23:39 +0000 (15:23 +0200)]
dt: add helper for phandle enumeration
This patch adds a helper to search for a node's phandle by its path. This
is especially useful when the phandle is part of an array, not just a single
cell in which case qemu_devtree_setprop_phandle would be the easy choice.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
Usually we want to know when creating a subtree fails. However, while
introducing this patch set we have to modify the device tree and some
times have the code to create a subtree in both the binary tree and
the dynamically created tree.
So ignore failures about this for now and enable them once we got rid
of the binary device tree.
Alexander Graf [Thu, 17 May 2012 12:11:52 +0000 (14:11 +0200)]
dt: add helper for phandle references
Phandles are the fancy device tree name for "pointer to another node".
To create a phandle property, we most likely want to reference to the
node we're pointing to by its path. So create a helper that allows
us to do so.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
Alexander Graf [Thu, 17 May 2012 10:47:57 +0000 (12:47 +0200)]
dt: add helpers for multi-cell adds
We have device tree helpers that allow us to create single cell (u32)
wide properties. However, when creating properties that contain an array of
cells, we need to jump through hoops, manually passing in an array with
converted endianness.
To ease the pain of this, create a generic macro helper that allows us
to pass the cells as arguments.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
Alexander Graf [Thu, 17 May 2012 09:40:42 +0000 (11:40 +0200)]
dt: allow add_subnode to create root subnodes
Our subnode creation helper can't handle creation of root subnodes,
like "/memory". Fix this by allowing the parent node to be an empty
string, indicating the root node.
Signed-off-by: Alexander Graf <agraf@suse.de> Reviewed-by: Peter Crosthwaite <peter.crosthwaite@petalogix.com>
This adds a qemu-specific hypervisor call to the pseries machine
which allows to do what amounts to memmove, memcpy and xor over
regions of physical memory such as the framebuffer.
This is the simplest way to get usable framebuffer speed from
SLOF since the framebuffer isn't mapped in the VRMA and so would
otherwise require an hcall per 8 bytes access.
The performance is still not great but usable, and can be improved
with a more complex implementation of the hcall itself if needed.
This also adds some documentation for the qemu-specific hypercalls
that we add to PAPR along with a new qemu,hypertas-functions property
that mirrors ibm,hypertas-functions and provides some discoverability
for the new calls.
Note: I chose note to advertise H_RTAS to the guest via that mechanism.
This is done on purpose, the guest uses the normal RTAS interfaces
provided by qemu (including SLOF) which internally calls H_RTAS.
We might in the future implement part (or even all) of RTAS inside the
guest like IBM's firmware does and replace H_RTAS with some finer grained
set of private hypercalls.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alexander Graf <agraf@suse.de>
The core tcg/kvm code for ppc64 now has at least the outline
capability to support pagesizes beyond the standard 4k and 16MB. The
CPUState is initialized with information advertising the available
pagesizes and their correct encodings, and under the right KVM setup
this will be populated with page sizes beyond the standard.
Obviously guests can't use the extra page sizes unless they know
they're present. For the pseries machine, at least, there is a
defined method for conveying exactly this information, the
"ibm-segment-page-sizes" property in the guest device tree.
This patch generates this property using the supported page size
information that's already in the CPUState.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Alexander Graf <agraf@suse.de>
ppc64: Rudimentary Support for extra page sizes on server CPUs
More recent Power server chips (i.e. based on the 64 bit hash MMU)
support more than just the traditional 4k and 16M page sizes. This
can get quite complicated, because which page sizes are supported,
which combinations are supported within an MMU segment and how these
page sizes are encoded both in the SLB entry and the hash PTE can vary
depending on the CPU model (they are not specified by the
architecture). In addition the firmware or hypervisor may not permit
use of certain page sizes, for various reasons. Whether various page
sizes are supported on KVM, for example, depends on whether the PR or
HV variant of KVM is in use, and on the page size of the memory
backing the guest's RAM.
This patch adds information to the CPUState and cpu defs to describe
the supported page sizes and encodings. Since TCG does not yet
support any extended page sizes, we just set this to NULL in the
static CPU definitions, expanding this to the default 4k and 16M page
sizes when we initialize the cpu state. When using KVM, however, we
instead determine available page sizes using the new
KVM_PPC_GET_SMMU_INFO call. For old kernels without that call, we use
some defaults, with some guesswork which should do the right thing for
existing HV and PR implementations. The fallback might not be correct
for future versions, but that's ok, because they'll have
KVM_PPC_GET_SMMU_INFO.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
Fabien Chouteau [Mon, 21 May 2012 06:11:06 +0000 (06:11 +0000)]
booke_206_tlbwe: Discard invalid bits in MAS2
The size of EPN field in MAS2 depends on page size. This patch adds a
mask to discard invalid bits in EPN field.
Definition of EPN field from e500v2 RM:
EPN Effective page number: Depending on page size, only the bits
associated with a page boundary are valid. Bits that represent offsets
within a page are ignored and should be cleared.
There is a similar (but more complicated) definition in PowerISA V2.06.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Fri, 18 May 2012 22:48:50 +0000 (00:48 +0200)]
PPC: mpc8544ds: Span initial TLB entry over as much RAM as we need
The initial TLB entry is supposed to help us run the guest -kernel payload.
This means the guest needs to be able to access its own memory, the initrd
memory and the device tree.
So far we only statically reserved a TLB entry from [0;256M[. This patch
fixes it to span from [0;dt_end[, allowing the guest payload to access
everything initially.
Reported-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:42 +0000 (04:23 +0000)]
ppc: Make hbrev table const
Lookup table 'hbrev' is never written to, so add a 'const' qualifier.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:41 +0000 (04:23 +0000)]
ppc: Add missing break
Add obviously missing 'break' statement.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:40 +0000 (04:23 +0000)]
ppc: Move load and store helpers, switch to AREG0 free mode
Add an explicit CPUPPCState parameter instead of relying on AREG0
and rename op_helper.c (which only contains load and store helpers)
to mem_helper.c. Remove AREG0 swapping in
tlb_fill().
Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation
and interrupt handling, cpu_{ld,st}{l,uw}_data in loads and stores.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:39 +0000 (04:23 +0000)]
ppc: Move misc helpers from helper.c to misc_helper.c
Move more misc helpers from helper.c to misc_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:38 +0000 (04:23 +0000)]
ppc: Avoid AREG0 for misc helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:37 +0000 (04:23 +0000)]
ppc: Split off misc helpers
Move misc helpers from op_helper.c to misc_helpers.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:36 +0000 (04:23 +0000)]
ppc: Avoid AREG0 for timebase helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:35 +0000 (04:23 +0000)]
ppc: Split off timebase helpers
Move decrementer and timebase helpers to a dedicated file.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:34 +0000 (04:23 +0000)]
ppc: Cleanup MMU merge
Remove useless wrappers. In some cases 'int' parameters are
changed to uint32_t.
Make internal functions static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
[agraf: fix kvm compilation] Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:33 +0000 (04:23 +0000)]
ppc: Move MMU helpers from helper.c to mmu_helper.c
Move more MMU helpers from helper.c to mmu_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
[update to current helper.c state] Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:32 +0000 (04:23 +0000)]
ppc: Avoid a warning with the next patch
When the code is moved together by the next patch, compiler
detects a possible uninitialized variable use. Avoid the warning
by initializing the variables.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:31 +0000 (04:23 +0000)]
ppc: Avoid AREG0 for MMU etc. helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:30 +0000 (04:23 +0000)]
ppc: Split MMU etc. helpers from op_helper.c
Move MMU, TLB, SLB and BAT ops to mmu_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:29 +0000 (04:23 +0000)]
ppc: Avoid AREG0 for integer and vector helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de>
[fix unwanted whitespace line in Makefile.target] Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:28 +0000 (04:23 +0000)]
ppc: Split integer and vector ops
Move integer and vector ops to int_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:27 +0000 (04:23 +0000)]
ppc: Avoid AREG0 for FPU and SPE helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:26 +0000 (04:23 +0000)]
ppc: Split FPU and SPE ops
Move FPU and SPE helpers from op_helper.c to fpu_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:25 +0000 (04:23 +0000)]
ppc: Move exception helpers from helper.c to excp_helper.c
Move exception helpers from helper.c to excp_helper.c and
make cpu_dump_rfi() static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:24 +0000 (04:23 +0000)]
ppc: Fix coding style in helper.c
helper.c will be spilt by the next patches, fix
style issues before that.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:23 +0000 (04:23 +0000)]
ppc: Avoid AREG0 for exception helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:22 +0000 (04:23 +0000)]
ppc: Split exception helpers
Move exception helpers from op_helper.c to excp_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Blue Swirl [Wed, 30 May 2012 04:23:21 +0000 (04:23 +0000)]
ppc: Fix coding style in op_helper.c
op_helper.c will be split by the next patches, fix
style issues before that.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
Peter Maydell [Tue, 19 Jun 2012 14:55:38 +0000 (15:55 +0100)]
Makefile.hw: avoid overly large 'make clean' rm command
Avoid 'make clean' producing an 'rm' command which has a lot
of duplicate 'hw//*.o' arguments, by using $(sort $(dir ..))
rather than $(dir $(sort ..)) so Make's sort function will
remove the duplicates for us. We can also remove the double
'//' safely because $(dir ..) is guaranteed to return a string
ending in '/'.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Alon Levy [Sun, 10 Jun 2012 15:05:06 +0000 (18:05 +0300)]
qxl: add vgamem_size_mb and vgamem_size
In preperation for supporting a larger framebuffer for multiple monitors
on a single card, add a property to qxl vgamem_size_mb, and corresponding
byte sized vgamem_size, and use instead of VGA_RAM_SIZE.
Gerd Hoffmann [Thu, 24 May 2012 07:59:44 +0000 (09:59 +0200)]
vga: make vram size configurable
Zap the global VGA_RAM_SIZE #define, make the vga ram size configurable
for standard vga and vmware vga. cirrus and qxl are left with a fixed
size (and private VGA_RAM_SIZE #define) for now.
qxl needs some non-trivial adjustments in the mode list handling deal
with a runtime-configurable size, which calls for a separate qxl patch.
cirrus emulates cards which have 2 MB (isa) and 4 MB (pci), so I guess
it would make sense to use these sizes. That change would break
migration though, so I left it fixed at 8 MB size. Making it
configurabls is pretty pointless for cirrus as we have to match real
hardware.
Gerd Hoffmann [Thu, 24 May 2012 07:16:29 +0000 (09:16 +0200)]
vga: raise xres+yres limits
The vgabios will check whenever any given video mode will fit into the
given video memory before adding it to the list of available modes, so
there is no need to keep xmax * ymax * 32bpp lower than VGA_RAM_SIZE.
Lets raise the limits a bit. Should be good for a few years, display
sizes are not growing that fast.
Alon Levy [Thu, 24 May 2012 16:18:53 +0000 (19:18 +0300)]
qxl: stop dirty loging when not in vga mode
Tested with linux guest. Not sure how to check actual performance affect
of this. Checked with the previously send traceevent that the kvm ioctl
to start/stop dirty logging is being called.
(KVM_SET_USER_MEMORY_REGION).
Signed-off-by: Alon Levy <alevy@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Alon Levy [Thu, 24 May 2012 09:38:11 +0000 (12:38 +0300)]
ui/spice-display.c: add missing initialization for valgrind
We can't initialize QXLDevSurfaceCreate field by field because it has a
pa hole, and so 4 bytes remain uninitialized when building on x86-64, so
just memset.
Signed-off-by: Alon Levy <alevy@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Andreas Färber [Sat, 9 Jun 2012 11:56:42 +0000 (13:56 +0200)]
Makefile.user: Define CONFIG_USER_ONLY for libuser/
In *-*-user/ build dirs CONFIG_USER_ONLY is defined via config-target.h.
In libuser/ it is not defined.
Add it via QEMU_CFLAGS.
Signed-off-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Stefan Weil [Sat, 9 Jun 2012 07:08:38 +0000 (09:08 +0200)]
Makefile: Remove BUILD_DIR from qapi-dir
qapi-dir does not need an absolute path. All other build directories
are relative. When BUILD_DIR is removed, the build output looks better
(no long lines with absolute paths when everything else uses short
lines):
GEN qapi-generated/qga-qapi-types.c
CC qapi-generated/qga-qapi-types.o
GEN qapi-generated/qga-qapi-visit.c
CC qapi-generated/qga-qapi-visit.o
GEN qapi-generated/qga-qmp-marshal.c
CC qapi-generated/qga-qmp-marshal.o
Using a relative path also avoids potential problems when BUILD_DIR
includes blanks.
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Install 'bepo' keymap already included in Qemu source
The 'bepo' layout (a french dvorak-like keyboard layout) was added
about one year ago, (see commit 2a3c633c1eb8692716220195b6d3fe78b7e411d0),
but I missed to declare to install it.
Signed-off-by: Frédéric Boiteux <fboiteux@free.fr> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Paolo Bonzini [Wed, 13 Jun 2012 05:41:28 +0000 (07:41 +0200)]
qemu-ga: add guest-fstrim command
FITRIM is a mounted filesystem feature to discard (or "trim") blocks which
are not in use by the filesystem. This is useful for solid-state drives
(SSDs) and thinly-provisioned storage. Provide access to the feature
from the host so that filesystems can be trimmed periodically or before
migration.
Here is an example using scsi_debug:
# modprobe scsi_debug lbpu=1 lbpws=1
# sg_vpd -p0xb2 /dev/sdb
Logical block provisioning VPD page (SBC):
Unmap command supported (LBPU): 1
Write same (16) with unmap bit supported (LBWS): 1
Write same (10) with unmap bit supported (LBWS10): 0
# mke2fs /dev/sdb
# cat /sys/bus/pseudo/drivers/scsi_debug/map
1-616,16257-16383
# mount /dev/sdb /run/media/pbonzini/test
# dd if=/dev/zero of=/run/media/pbonzini/test/file
# cat map
1-616,645-1588,1599-4026,4029-16383
# rm /run/media/pbonzini/test/file
# ./qemu-ga /dev/fd/0
{"execute":"guest-fstrim"}
{"return": {}}
# cat map
1-612
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Luiz Capitulino <lcapitulino@redhat.com> Reviewed-by: Michal Privoznik <mprivozn@redhat.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
Blue Swirl [Sun, 10 Jun 2012 10:18:54 +0000 (10:18 +0000)]
libcacard: build fixes
Link trace objects to fix these errors:
LINK vscclient
oslib-posix.o: In function `trace_qemu_vfree':
/src/qemu/obj-amd64/./trace.h:39: undefined reference to `trace1'
oslib-posix.o: In function `trace_qemu_memalign':
/src/qemu/obj-amd64/./trace.h:31: undefined reference to `trace3'
oslib-posix.o: In function `trace_qemu_vmalloc':
/src/qemu/obj-amd64/./trace.h:35: undefined reference to `trace2'
Add LDFLAGS to vscclient link command.
Clean up also in subdirectories of libcacard.
Use quiet-command for sed invocation.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Acked-by: Alon Levy <alevy@redhat.com>
Anthony PERARD [Thu, 21 Jun 2012 15:41:28 +0000 (15:41 +0000)]
Introduce apic-msidef.h
This patch move the msi definition from apic.c to apic-msidef.h. So it can be
used also by other .c files.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
Allen Kay [Thu, 21 Jun 2012 15:40:48 +0000 (15:40 +0000)]
Introduce Xen PCI Passthrough, PCI config space helpers
A more complete history can be found here:
git://xenbits.xensource.com/qemu-xen-unstable.git
Signed-off-by: Allen Kay <allen.m.kay@intel.com> Signed-off-by: Guy Zana <guy@neocleus.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Allen Kay [Thu, 21 Jun 2012 15:40:09 +0000 (15:40 +0000)]
Introduce Xen PCI Passthrough, qdevice
A more complete history can be found here:
git://xenbits.xensource.com/qemu-xen-unstable.git
Signed-off-by: Allen Kay <allen.m.kay@intel.com> Signed-off-by: Guy Zana <guy@neocleus.com> Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Anthony PERARD [Thu, 21 Jun 2012 15:36:23 +0000 (15:36 +0000)]
qdev-properties: Introduce pci-host-devaddr.
This new property will be used to specify a host pci device address.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Anthony PERARD [Thu, 21 Jun 2012 15:35:28 +0000 (15:35 +0000)]
pci.c: Add opaque argument to pci_for_each_device.
The purpose is to have a more generic pci_for_each_device by passing an extra
argument to the function called on every device.
This patch will be used in a next patch.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Anthony PERARD [Thu, 21 Jun 2012 15:31:47 +0000 (15:31 +0000)]
pci_ids: Add INTEL_82599_SFP_VF id.
We are using this in our quirk lookup provided by patch
titled: Introduce Xen PCI Passthrough, PCI config space helpers.
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
The timer was deadlocking when the interval was set too low. It would cause a
flood of timer events and the CPU would halt indefinately. This is a known issue
and theres a generic workaround in place in ptimer on ptimer_set_limit(),
however the Xilinx timer uses ptimer_set_count() instead of set_limit. Changed
the call to set_count() to an equivalent call of set_limit() instead, which
brings the workaround into play.
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Peter Maydell [Wed, 20 Jun 2012 11:57:23 +0000 (11:57 +0000)]
target-arm: Remove ARM_CPUID_* macros
All the uses of ARM_CPUID() to vary behaviour have now been
removed, so we can delete the ARM_CPUID_* macros now.
The one exception is the TI915T/925T, because of its odd behaviour
where the MIDR value can be changed at runtime.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Andreas Färber <afaerber@suse.de>
Peter Maydell [Wed, 20 Jun 2012 11:57:22 +0000 (11:57 +0000)]
target-arm: Move block cache ops to new cp15 framework
Move the v6 optional block cache ops to the new cp15 framework.
This includes only providing them on the CPUs which implemented
them, rather than the previous blunderbuss approach of making
all MCRR instructions on all CPUs act as NOPs.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 20 Jun 2012 11:57:21 +0000 (11:57 +0000)]
target-arm: Remove c0_cachetype CPUARMState field
Remove the no-longer-used CPUARMState c0_cachetype field.
Although this was a constant register we had it in our
migration state. Drop this (with resulting version bump)
because for ARM currently we prefer cleaner migration
code and have not stabilised migration format yet.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 20 Jun 2012 11:57:18 +0000 (11:57 +0000)]
target-arm: Convert cp15 crn=9 registers
Convert cp15 crn=9 registers (mostly cache lockdown) to the new scheme.
Note that this change makes OMAPCP cores RAZ/WI the whole c9 space. This is
a change from previous behaviour, but a return to the behaviour of commit c3d2689d when OMAP1 support was first added -- subsequent commits have
clearly accidentally relegated the OMAPCP RAZ condition to only a subset of
the crn=9 space when adding support for other cores.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Peter Maydell [Wed, 20 Jun 2012 11:57:17 +0000 (11:57 +0000)]
target-arm: Convert cp15 crn=6 registers
Convert the cp15 crn=6 registers to the new scheme.
Note that this includes some minor tidyup: drop an unnecessary
underdecoding of op2 on OMAPCP cores, and only implement the
pre-v6 c6,c0,0,1 IFAR on the 1026 and not on the other ARMv5
cores, which didn't have it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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