Kevin Wolf [Fri, 2 Oct 2009 20:28:57 +0000 (22:28 +0200)]
target-i386: Fix exceptions for fxsave/fxrstor
This patch corrects the following aspects of exception generation in
fxsave/fxrstor:
* Generate #GP if the operand is not aligned to a 16 byte boundary
* Generate #UD if the LOCK prefix is used
* For CR0.EM = 1 #NM is generated, not #UD
Signed-off-by: Kevin Wolf <mail@kevin-wolf.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Stefan Weil [Sat, 19 Sep 2009 11:02:09 +0000 (13:02 +0200)]
eepro100: Add more i825xx devices
The new devices added here are still not functional -
partially because some patches are still missing,
partially because I cannot test them. Nevertheless
they belong to the same family and will be supported
by this driver some day.
As soon as they work, they will also be added to hw/pci.c.
Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Andre Przywara [Fri, 18 Sep 2009 22:30:49 +0000 (00:30 +0200)]
target-i386: add RDTSCP support
RDTSCP reads the time stamp counter and atomically also the content
of a 32-bit MSR, which can be freely set by the OS. This allows CPU
local data to be queried by userspace.
Linux uses this to allow a fast implementation of the getcpu()
syscall, which uses the vsyscall page to avoid a context switch.
AMD CPUs since K8RevF and Intel CPUs since Nehalem support this
instruction.
RDTSCP is guarded by the RDTSCP CPUID bit (Fn8000_0001:EDX[27]).
Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Andre Przywara [Fri, 18 Sep 2009 22:30:48 +0000 (00:30 +0200)]
target-i386: add SSE4a instruction support
This adds support for the AMD Phenom/Barcelona's SSE4a instructions.
Those include insertq and extrq, which are doing shift and mask on
XMM registers, in two versions (immediate shift/length values and
stored in another XMM register).
Additionally it implements movntss, movntsd, which are scalar
non-temporal stores (avoiding cache trashing). These are implemented
as normal stores, though.
SSE4a is guarded by the SSE4A CPUID bit (Fn8000_0001:ECX[6]).
Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Andre Przywara [Fri, 18 Sep 2009 22:30:47 +0000 (00:30 +0200)]
target-i386: add lock mov cr0 = cr8
AMD CPUs featuring a shortcut to access CR8 even from 32-bit mode.
If you use the LOCK prefix with "mov CR0", it accesses CR8 instead.
This behavior is guarded by the CR8_LEGACY CPUID bit
(Fn8000_0001:ECX[1]).
Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Currently zero extensions ops are implemented by a and op with a
constant. This is then catched in some backend, and replaced by
a zero extension instruction. While this works well on RISC
machines, this adds a useless register move on non-RISC machines.
Example on x86:
ext16u_i32 r1, r2
is translated into
mov %eax,%ebx
movzwl %bx, %ebx
while the optimized version should be:
movzwl %ax, %ebx
This patch adds ext{8,16,32}u_i{32,64} TCG ops that can be
implemented in the backends to avoid emitting useless register
moves.
Paul Bolle [Fri, 2 Oct 2009 12:06:47 +0000 (14:06 +0200)]
linux-user: fix "#if 0"'d printf()
Make an "#if 0"'d printf() in load_elf_binary(), probably left to aid in
debugging, reflect what the actual code does. The current printf() will
only confuse those who "#if 1" it (it certainly confused me enough to
write this trivial patch).
Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
MULTI_REQ is never defined, so it doesn't matter much, but since
we have an if statement there, let's add {} to clarify what it
should do if it's uncommented, and indent the code properly.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Blue Swirl [Fri, 2 Oct 2009 19:32:12 +0000 (19:32 +0000)]
Fix warning about undefined madvise() on OpenSolaris
OpenSolaris headers can't export madvise() with a sane set of #defines.
For background, see MySQL bug #7156 (http://bugs.mysql.com/bug.php?id=7156)
for discussion about Solaris header problems.
Looks like linux-user code was correct, just unreadable: what it wanted
to do with "-=" was really assign a negative number, not decrement. Fix
up accordingly.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Anthony Liguori [Thu, 1 Oct 2009 21:12:16 +0000 (16:12 -0500)]
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Something
like this _must_ be presented on the list first so people can provide input
and cope with it.
Pierre Riteau [Tue, 8 Sep 2009 09:53:37 +0000 (11:53 +0200)]
Fix and improve qint_from_int64_test
Use a long long integer constant to fix a compilation error (integer
constant is too large for 'long' type).
Use a better value for testing, as -1 makes the test pass even if
qi->value is of type uint32_t, float or double. This was suggested by
Reimar Döffinger <Reimar.Doeffinger@gmx.de>.
Also, make the test fail when qi->value is of type double or float by
casting qi->value to int64_t, to avoid value being promoted to the type
of qi->value.
Mark McLoughlin [Wed, 23 Sep 2009 10:24:05 +0000 (11:24 +0100)]
Fix coding style issue
Replace:
if (-1 == foo())
with:
if (foo() == -1)
While this coding style is not in direct contravention of our currently
ratified CODING_STYLE treaty, it could be argued that the Article 3 of
the European Convention on Human Rights (prohibiting torture and "inhuman
or degrading treatment") reads on the matter.
[This commit message was brought to you without humour, as is evidenced
by the absence of any emoticons]
Signed-off-by: Mark McLoughlin <markmc@redhat.com> Cc: Avi Kivity <avi@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Changes:
* Re-add the 'dev->fd = fd;' line which the qdev patches dropped
by mistake.
* call qdev_init() so the newly created usb device is plugged into
a usb port and thus actually visible to the guest.
Sparc64 alternate space load/store helpers expect 8 bit ASI value,
while wrasi implementation sign-extends ASI operand causing
for example 0x80 to appear as 0xFFFFFF80. Resulting value falls
out of switch in helpers and causes obscure load/store faults.
- correct wrasi by masking lower 8 bits of xor result
- use lower 8 bits of ASI register in helpers
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
exec-all.h: increase MAX_OP_PER_INSTR to 96 from 64
The x86_64 ror instruction on a 32-bit host can generate up to 77 TCG
ops. Some more space should be left for opc that are added at the end
of the translation.
Thanks to Laurent Desnogues for the debugging help.