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8 months agoMerge tag 'pull-testing-200923-1' of https://gitlab.com/stsquad/qemu into staging
Stefan Hajnoczi [Thu, 21 Sep 2023 13:30:20 +0000 (09:30 -0400)]
Merge tag 'pull-testing-200923-1' of https://gitlab.com/stsquad/qemu into staging

testing updates:

  - update most Debian to bookworm
  - fix some typos
  - update loongarch toolchain
  - fix microbit test
  - handle GitLab/Cirrus timeout discrepancy
  - improve avocado console handling
  - disable mips avocado images pending bugfix

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# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown]
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* tag 'pull-testing-200923-1' of https://gitlab.com/stsquad/qemu:
  tests/avocado: Disable MIPS Malta tests due to GitLab issue #1884
  tests/avocado: Fix console data loss
  gitlab: make Cirrus CI jobs gating
  gitlab: make Cirrus CI timeout explicit
  qtest: kill orphaned qtest QEMU processes on FreeBSD
  microbit: add missing qtest_quit() call
  tests/docker: Update docker-loongarch-cross toolchain
  gitlab: fix typo/spelling in comments
  tests: update most Debian images to Bookworm

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'pull-block-2023-09-01' of https://gitlab.com/hreitz/qemu into staging
Stefan Hajnoczi [Thu, 21 Sep 2023 13:05:09 +0000 (09:05 -0400)]
Merge tag 'pull-block-2023-09-01' of https://gitlab.com/hreitz/qemu into staging

Block patches

- Fix for file-posix's zoning code crashing on I/O errors
- Throttling refactoring

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# gpg:                using RSA key CB62D7A0EE3829E45F004D34A1FA40D098019CDF
# gpg:                issuer "hreitz@redhat.com"
# gpg: Good signature from "Hanna Reitz <hreitz@redhat.com>" [unknown]
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# Primary key fingerprint: CB62 D7A0 EE38 29E4 5F00  4D34 A1FA 40D0 9801 9CDF

* tag 'pull-block-2023-09-01' of https://gitlab.com/hreitz/qemu:
  tests/file-io-error: New test
  file-posix: Simplify raw_co_prw's 'out' zone code
  file-posix: Fix zone update in I/O error path
  file-posix: Check bs->bl.zoned for zone info
  file-posix: Clear bs->bl.zoned on error
  block/throttle-groups: Use ThrottleDirection instread of bool is_write
  fsdev: Use ThrottleDirection instread of bool is_write
  throttle: use THROTTLE_MAX/ARRAY_SIZE for hard code
  throttle: use enum ThrottleDirection instead of bool is_write
  cryptodev: use NULL throttle timer cb for read direction
  test-throttle: test read only and write only
  throttle: support read-only and write-only
  test-throttle: use enum ThrottleDirection
  throttle: introduce enum ThrottleDirection

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'pull-loongarch-20230920' of https://gitlab.com/gaosong/qemu into staging
Stefan Hajnoczi [Wed, 20 Sep 2023 17:56:18 +0000 (13:56 -0400)]
Merge tag 'pull-loongarch-20230920' of https://gitlab.com/gaosong/qemu into staging

Add LASX instructions support.

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* tag 'pull-loongarch-20230920' of https://gitlab.com/gaosong/qemu: (57 commits)
  target/loongarch: CPUCFG support LASX
  target/loongarch: Move simply DO_XX marcos togther
  target/loongarch: Implement xvld xvst
  target/loongarch: Implement xvshuf xvperm{i} xvshuf4i
  target/loongarch: Implement xvpack xvpick xvilv{l/h}
  target/loongarch: Implement xvreplve xvinsve0 xvpickve
  target/loongarch: Implement xvinsgr2vr xvpickve2gr
  target/loongarch: Implement xvbitsel xvset
  target/loongarch: Implement xvfcmp
  target/loongarch: Implement xvseq xvsle xvslt
  target/loongarch: Implement LASX fpu fcvt instructions
  target/loongarch: Implement LASX fpu arith instructions
  target/loongarch: Implement xvfrstp
  target/loongarch: Implement xvbitclr xvbitset xvbitrev
  target/loongarch: Implement xvpcnt
  target/loongarch: Implement xvclo xvclz
  target/loongarch: Implement xvssrlrn xvssrarn
  target/loongarch: Implement xvssrln xvssran
  target/loongarch: Implement xvsrlrn xvsrarn
  target/loongarch: Implement xvsrln xvsran
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'hppa-btlb-pull-request' of https://github.com/hdeller/qemu-hppa into staging
Stefan Hajnoczi [Wed, 20 Sep 2023 17:56:01 +0000 (13:56 -0400)]
Merge tag 'hppa-btlb-pull-request' of https://github.com/hdeller/qemu-hppa into staging

Block-TLB support and linux-user fixes for hppa target

All 32-bit hppa CPUs allow a fixed number of TLB entries to have a
different page size than the default 4k.
Those are called "Block-TLBs" and are created at startup by the
operating system and managed by the firmware of hppa machines
through the firmware PDC_BLOCK_TLB call.

This patchset adds the necessary glue to SeaBIOS-hppa and
qemu to allow up to 16 BTLB entries in the emulation.

Two patches from Mikulas Patocka fix signal delivery issues
in linux-user on hppa.

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# gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown]
# gpg:                 aka "Helge Deller <deller@kernel.org>" [unknown]
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* tag 'hppa-btlb-pull-request' of https://github.com/hdeller/qemu-hppa:
  linux-user/hppa: lock both words of function descriptor
  linux-user/hppa: clear the PSW 'N' bit when delivering signals
  target/hppa: Wire up diag instruction to support BTLB
  target/hppa: Extract diagnose immediate value
  target/hppa: Add BTLB support to hppa TLB functions
  target/hppa: Report and clear BTLBs via fw_cfg at startup
  target/hppa: Allow up to 16 BTLB entries
  target/hppa: Update to SeaBIOS-hppa version 9

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agotests/avocado: Disable MIPS Malta tests due to GitLab issue #1884
Philippe Mathieu-Daudé [Thu, 14 Sep 2023 15:54:22 +0000 (16:54 +0100)]
tests/avocado: Disable MIPS Malta tests due to GitLab issue #1884

Commit 0d58c66068 ("softmmu: Use async_run_on_cpu in tcg_commit")
introduced a regression which is only triggered by the MIPS Malta
machine. Since those tests are gatting and disturb the CI workflow,
disable them until https://gitlab.com/qemu-project/qemu/-/issues/1866
is fixed.

  $ make check-avocado \
      AVOCADO_TAGS='arch:mipsel arch:mips64el' \
      AVOCADO_ALLOW_UNTRUSTED_CODE=1 \
      AVOCADO_TIMEOUT_EXPECTED=1
    AVOCADO tests/avocado
   (04/24) tests/avocado/boot_linux_console.py:BootLinuxConsole.test_mips_malta32el_nanomips_4k: INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred: Timeout reached\nOriginal status: ERROR\n... (90.39 s)
   (05/24) tests/avocado/boot_linux_console.py:BootLinuxConsole.test_mips_malta32el_nanomips_16k_up: INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred: Timeout reached\nOriginal status: ERROR\n... (90.29 s)
   (06/24) tests/avocado/boot_linux_console.py:BootLinuxConsole.test_mips_malta32el_nanomips_64k_dbg: INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred: Timeout reached\nOriginal status: ERROR\n... (92.53 s)
   (11/24) tests/avocado/machine_mips_malta.py:MaltaMachineFramebuffer.test_mips_malta_i6400_framebuffer_logo_1core: INTERRUPTED: Test interrupted by SIGTERM\nRunner error occurred: Timeout reached\nOriginal status: ERROR\n... (25.78 s)
  RESULTS    : PASS 8 | ERROR 0 | FAIL 0 | SKIP 7 | WARN 2 | INTERRUPT 5 | CANCEL 2
  JOB TIME   : 525.60 s                                      ^^^^^^^^^^^

Reported-by: Thomas Huth <thuth@redhat.com>
Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20230913135339.9128-1-philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-10-alex.bennee@linaro.org>

8 months agotests/avocado: Fix console data loss
Nicholas Piggin [Thu, 14 Sep 2023 15:54:21 +0000 (16:54 +0100)]
tests/avocado: Fix console data loss

Occasionally some avocado tests will fail waiting for console line
despite the machine running correctly. Console data goes missing, as can
be seen in the console log. This is due to _console_interaction calling
makefile() on the console socket each time it is invoked, which must be
losing old buffer contents when going out of scope.

It is not enough to makefile() with buffered=0. That helps significantly
but data loss is still possible. My guess is that readline() has a line
buffer even when the file is in unbuffered mode, that can eat data.

Fix this by providing a console file that persists for the life of the
console.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: "Daniel P. Berrangé" <berrange@redhat.com>
Message-Id: <20230912131340.405619-1-npiggin@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Acked-by: John Snow <jsnow@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-9-alex.bennee@linaro.org>

8 months agogitlab: make Cirrus CI jobs gating
Daniel P. Berrangé [Thu, 14 Sep 2023 15:54:20 +0000 (16:54 +0100)]
gitlab: make Cirrus CI jobs gating

The Cirrus CI jobs have been non-gating for a while to let us build
confidence in their reliability. Aside from periodic dependancy
problems when FreeBSD Ports switches to be based on a new FreeBSD
image version, the jobs have been reliable. It is thus worth making
them gating to prevent build failures being missed during merges.

Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230912184130.3056054-5-berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-8-alex.bennee@linaro.org>

8 months agogitlab: make Cirrus CI timeout explicit
Daniel P. Berrangé [Thu, 14 Sep 2023 15:54:19 +0000 (16:54 +0100)]
gitlab: make Cirrus CI timeout explicit

On the GitLab side we're invoking the Cirrus CI job using the
cirrus-run tool which speaks to the Cirrus REST API. Cirrus
sometimes tasks 5-10 minutes to actually schedule the task,
and thus the execution time of 'cirrus-run' inside GitLab will
be slightly longer than the execution time of the Cirrus CI
task.

Setting the timeout in the GitLab CI job should thus be done
in relation to the timeout set for the Cirrus CI job. While
Cirrus CI defaults to 60 minutes, it is better to set this
explicitly, and make the relationship between the jobs
explicit

Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230912184130.3056054-4-berrange@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-7-alex.bennee@linaro.org>

8 months agoqtest: kill orphaned qtest QEMU processes on FreeBSD
Daniel P. Berrangé [Thu, 14 Sep 2023 15:54:18 +0000 (16:54 +0100)]
qtest: kill orphaned qtest QEMU processes on FreeBSD

On Linux we use PR_SET_PDEATHSIG to kill orphaned QEMU processes
if we fail to call qtest_quit(), or the test program aborts/segvs.
This prevents meson from hanging forever due to the orphaned
process keeping stdout open.

On FreeBSD we can achieve the same using PROC_PDEATHSIG_CTL, which
gives us the equivalent protection against hangs.

Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230912184130.3056054-3-berrange@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-6-alex.bennee@linaro.org>

8 months agomicrobit: add missing qtest_quit() call
Daniel P. Berrangé [Thu, 14 Sep 2023 15:54:17 +0000 (16:54 +0100)]
microbit: add missing qtest_quit() call

Without this call, the QEMU process is being left running which on
FreeBSD 13.2 at least, makes meson think the test is still running,
and thus execution of "make check" continues forever.

This fixes the regression introduced in:

  commit a9c9bbee855877293683012942d3485d50f286af
  Author: Chris Laplante <chris@laplante.io>
  Date:   Tue Aug 22 17:31:02 2023 +0100

    qtest: microbit-test: add tests for nRF51 DETECT

Fixes: https://gitlab.com/qemu-project/qemu/-/issues/1882
Signed-off-by: "Daniel P. Berrangé" <berrange@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-Id: <20230912184130.3056054-2-berrange@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-5-alex.bennee@linaro.org>

8 months agotests/docker: Update docker-loongarch-cross toolchain
Richard Henderson [Thu, 14 Sep 2023 15:54:16 +0000 (16:54 +0100)]
tests/docker: Update docker-loongarch-cross toolchain

Update from clfs 5.0 to clfs 8.1, which includes updates
to binutils 2.41, gcc 13.2, and glibc 2.38.

See https://github.com/loongson/build-tools

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230829220228.928506-2-richard.henderson@linaro.org>
Message-Id: <20230914155422.426639-4-alex.bennee@linaro.org>

8 months agogitlab: fix typo/spelling in comments
Alex Bennée [Thu, 14 Sep 2023 15:54:15 +0000 (16:54 +0100)]
gitlab: fix typo/spelling in comments

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-3-alex.bennee@linaro.org>

8 months agotests: update most Debian images to Bookworm
Alex Bennée [Thu, 14 Sep 2023 15:54:14 +0000 (16:54 +0100)]
tests: update most Debian images to Bookworm

Bookworm has been out a while now. Time to update our containers to
the current stable. This requires the latest lcitool repo so update
the sub-module too.

For some reason the MIPs containers won't build so skip those for now.
We also have to skip the armel builds due to a stuck libc update.

Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20230914155422.426639-2-alex.bennee@linaro.org>

8 months agotarget/loongarch: CPUCFG support LASX
Song Gao [Thu, 14 Sep 2023 02:26:45 +0000 (10:26 +0800)]
target/loongarch: CPUCFG support LASX

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-58-gaosong@loongson.cn>

8 months agotarget/loongarch: Move simply DO_XX marcos togther
Song Gao [Thu, 14 Sep 2023 02:26:44 +0000 (10:26 +0800)]
target/loongarch: Move simply DO_XX marcos togther

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-57-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvld xvst
Song Gao [Thu, 14 Sep 2023 02:26:43 +0000 (10:26 +0800)]
target/loongarch: Implement xvld xvst

This patch includes:
- XVLD[X], XVST[X];
- XVLDREPL.{B/H/W/D};
- XVSTELM.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-56-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvshuf xvperm{i} xvshuf4i
Song Gao [Thu, 14 Sep 2023 02:26:42 +0000 (10:26 +0800)]
target/loongarch: Implement xvshuf xvperm{i} xvshuf4i

This patch includes:
- XVSHUF.{B/H/W/D};
- XVPERM.W;
- XVSHUF4i.{B/H/W/D};
- XVPERMI.{W/D/Q};
- XVEXTRINS.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-55-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvpack xvpick xvilv{l/h}
Song Gao [Thu, 14 Sep 2023 02:26:41 +0000 (10:26 +0800)]
target/loongarch: Implement xvpack xvpick xvilv{l/h}

This patch includes:
- XVPACK{EV/OD}.{B/H/W/D};
- XVPICK{EV/OD}.{B/H/W/D};
- XVILV{L/H}.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-54-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvreplve xvinsve0 xvpickve
Song Gao [Thu, 14 Sep 2023 02:26:40 +0000 (10:26 +0800)]
target/loongarch: Implement xvreplve xvinsve0 xvpickve

This patch includes:
- XVREPLVE.{B/H/W/D};
- XVREPL128VEI.{B/H/W/D};
- XVREPLVE0.{B/H/W/D/Q};
- XVINSVE0.{W/D};
- XVPICKVE.{W/D};
- XVBSLL.V, XVBSRL.V.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-53-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvinsgr2vr xvpickve2gr
Song Gao [Thu, 14 Sep 2023 02:26:39 +0000 (10:26 +0800)]
target/loongarch: Implement xvinsgr2vr xvpickve2gr

This patch includes:
- XVINSGR2VR.{W/D};
- XVPICKVE2GR.{W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-52-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvbitsel xvset
Song Gao [Thu, 14 Sep 2023 02:26:38 +0000 (10:26 +0800)]
target/loongarch: Implement xvbitsel xvset

This patch includes:
- XVBITSEL.V;
- XVBITSELI.B;
- XVSET{EQZ/NEZ}.V;
- XVSETANYEQZ.{B/H/W/D};
- XVSETALLNEZ.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-51-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvfcmp
Song Gao [Thu, 14 Sep 2023 02:26:37 +0000 (10:26 +0800)]
target/loongarch: Implement xvfcmp

This patch includes:
- XVFCMP.cond.{S/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-50-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvseq xvsle xvslt
Song Gao [Thu, 14 Sep 2023 02:26:36 +0000 (10:26 +0800)]
target/loongarch: Implement xvseq xvsle xvslt

This patch includes:
- XVSEQ[I].{B/H/W/D};
- XVSLE[I].{B/H/W/D}[U];
- XVSLT[I].{B/H/W/D/}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-49-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement LASX fpu fcvt instructions
Song Gao [Thu, 14 Sep 2023 02:26:35 +0000 (10:26 +0800)]
target/loongarch: Implement LASX fpu fcvt instructions

This patch includes:
- XVFCVT{L/H}.{S.H/D.S};
- XVFCVT.{H.S/S.D};
- XVFRINT[{RNE/RZ/RP/RM}].{S/D};
- XVFTINT[{RNE/RZ/RP/RM}].{W.S/L.D};
- XVFTINT[RZ].{WU.S/LU.D};
- XVFTINT[{RNE/RZ/RP/RM}].W.D;
- XVFTINT[{RNE/RZ/RP/RM}]{L/H}.L.S;
- XVFFINT.{S.W/D.L}[U];
- X[CVFFINT.S.L, VFFINT{L/H}.D.W.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-48-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement LASX fpu arith instructions
Song Gao [Thu, 14 Sep 2023 02:26:34 +0000 (10:26 +0800)]
target/loongarch: Implement LASX fpu arith instructions

This patch includes:
- XVF{ADD/SUB/MUL/DIV}.{S/D};
- XVF{MADD/MSUB/NMADD/NMSUB}.{S/D};
- XVF{MAX/MIN}.{S/D};
- XVF{MAXA/MINA}.{S/D};
- XVFLOGB.{S/D};
- XVFCLASS.{S/D};
- XVF{SQRT/RECIP/RSQRT}.{S/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-47-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvfrstp
Song Gao [Thu, 14 Sep 2023 02:26:33 +0000 (10:26 +0800)]
target/loongarch: Implement xvfrstp

This patch includes:
- XVFRSTP[I].{B/H}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-46-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvbitclr xvbitset xvbitrev
Song Gao [Thu, 14 Sep 2023 02:26:32 +0000 (10:26 +0800)]
target/loongarch: Implement xvbitclr xvbitset xvbitrev

This patch includes:
- XVBITCLR[I].{B/H/W/D};
- XVBITSET[I].{B/H/W/D};
- XVBITREV[I].{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-45-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvpcnt
Song Gao [Thu, 14 Sep 2023 02:26:31 +0000 (10:26 +0800)]
target/loongarch: Implement xvpcnt

This patch includes:
- VPCNT.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-44-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvclo xvclz
Song Gao [Thu, 14 Sep 2023 02:26:30 +0000 (10:26 +0800)]
target/loongarch: Implement xvclo xvclz

This patch includes:
- XVCLO.{B/H/W/D};
- XVCLZ.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-43-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvssrlrn xvssrarn
Song Gao [Thu, 14 Sep 2023 02:26:29 +0000 (10:26 +0800)]
target/loongarch: Implement xvssrlrn xvssrarn

This patch includes:
- XVSSRLRN.{B.H/H.W/W.D};
- XVSSRARN.{B.H/H.W/W.D};
- XVSSRLRN.{BU.H/HU.W/WU.D};
- XVSSRARN.{BU.H/HU.W/WU.D};
- XVSSRLRNI.{B.H/H.W/W.D/D.Q};
- XVSSRARNI.{B.H/H.W/W.D/D.Q};
- XVSSRLRNI.{BU.H/HU.W/WU.D/DU.Q};
- XVSSRARNI.{BU.H/HU.W/WU.D/DU.Q}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-42-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvssrln xvssran
Song Gao [Thu, 14 Sep 2023 02:26:28 +0000 (10:26 +0800)]
target/loongarch: Implement xvssrln xvssran

This patch includes:
- XVSSRLN.{B.H/H.W/W.D};
- XVSSRAN.{B.H/H.W/W.D};
- XVSSRLN.{BU.H/HU.W/WU.D};
- XVSSRAN.{BU.H/HU.W/WU.D};
- XVSSRLNI.{B.H/H.W/W.D/D.Q};
- XVSSRANI.{B.H/H.W/W.D/D.Q};
- XVSSRLNI.{BU.H/HU.W/WU.D/DU.Q};
- XVSSRANI.{BU.H/HU.W/WU.D/DU.Q}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-41-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsrlrn xvsrarn
Song Gao [Thu, 14 Sep 2023 02:26:27 +0000 (10:26 +0800)]
target/loongarch: Implement xvsrlrn xvsrarn

This patch includes:
- XVSRLRN.{B.H/H.W/W.D};
- XVSRARN.{B.H/H.W/W.D};
- XVSRLRNI.{B.H/H.W/W.D/D.Q};
- XVSRARNI.{B.H/H.W/W.D/D.Q}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-40-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsrln xvsran
Song Gao [Thu, 14 Sep 2023 02:26:26 +0000 (10:26 +0800)]
target/loongarch: Implement xvsrln xvsran

This patch includes:
- XVSRLN.{B.H/H.W/W.D};
- XVSRAN.{B.H/H.W/W.D};
- XVSRLNI.{B.H/H.W/W.D/D.Q};
- XVSRANI.{B.H/H.W/W.D/D.Q}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-39-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsrlr xvsrar
Song Gao [Thu, 14 Sep 2023 02:26:25 +0000 (10:26 +0800)]
target/loongarch: Implement xvsrlr xvsrar

This patch includes:
- XVSRLR[I].{B/H/W/D};
- XVSRAR[I].{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-38-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsllwil xvextl
Song Gao [Thu, 14 Sep 2023 02:26:24 +0000 (10:26 +0800)]
target/loongarch: Implement xvsllwil xvextl

This patch includes:
- XVSLLWIL.{H.B/W.H/D.W};
- XVSLLWIL.{HU.BU/WU.HU/DU.WU};
- XVEXTL.Q.D, VEXTL.QU.DU.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-37-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsll xvsrl xvsra xvrotr
Song Gao [Thu, 14 Sep 2023 02:26:23 +0000 (10:26 +0800)]
target/loongarch: Implement xvsll xvsrl xvsra xvrotr

This patch includes:
- XVSLL[I].{B/H/W/D};
- XVSRL[I].{B/H/W/D};
- XVSRA[I].{B/H/W/D};
- XVROTR[I].{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-36-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement LASX logic instructions
Song Gao [Thu, 14 Sep 2023 02:26:22 +0000 (10:26 +0800)]
target/loongarch: Implement LASX logic instructions

This patch includes:
- XV{AND/OR/XOR/NOR/ANDN/ORN}.V;
- XV{AND/OR/XOR/NOR}I.B.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-35-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvldi
Song Gao [Thu, 14 Sep 2023 02:26:21 +0000 (10:26 +0800)]
target/loongarch: Implement xvldi

This patch includes:
- XVLDI.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-34-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvmskltz/xvmskgez/xvmsknz
Song Gao [Thu, 14 Sep 2023 02:26:20 +0000 (10:26 +0800)]
target/loongarch: Implement xvmskltz/xvmskgez/xvmsknz

This patch includes:
- XVMSKLTZ.{B/H/W/D};
- XVMSKGEZ.B;
- XVMSKNZ.B.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-33-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsigncov
Song Gao [Thu, 14 Sep 2023 02:26:19 +0000 (10:26 +0800)]
target/loongarch: Implement xvsigncov

This patch includes:
- XVSIGNCOV.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-32-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement vext2xv
Song Gao [Thu, 14 Sep 2023 02:26:18 +0000 (10:26 +0800)]
target/loongarch: Implement vext2xv

This patch includes:
- VEXT2XV.{H/W/D}.B, VEXT2XV.{HU/WU/DU}.BU;
- VEXT2XV.{W/D}.B, VEXT2XV.{WU/DU}.HU;
- VEXT2XV.D.W, VEXT2XV.DU.WU.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-31-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvexth
Song Gao [Thu, 14 Sep 2023 02:26:17 +0000 (10:26 +0800)]
target/loongarch: Implement xvexth

This patch includes:
- XVEXTH.{H.B/W.H/D.W/Q.D};
- XVEXTH.{HU.BU/WU.HU/DU.WU/QU.DU}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-30-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsat
Song Gao [Thu, 14 Sep 2023 02:26:16 +0000 (10:26 +0800)]
target/loongarch: Implement xvsat

This patch includes:
- XVSAT.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-29-gaosong@loongson.cn>

8 months agotarget/loongarch; Implement xvdiv/xvmod
Song Gao [Thu, 14 Sep 2023 02:26:15 +0000 (10:26 +0800)]
target/loongarch; Implement xvdiv/xvmod

This patch includes:
- XVDIV.{B/H/W/D}[U];
- XVMOD.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-28-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od}
Song Gao [Thu, 14 Sep 2023 02:26:14 +0000 (10:26 +0800)]
target/loongarch: Implement xvmadd/xvmsub/xvmaddw{ev/od}

This patch includes:
- XVMADD.{B/H/W/D};
- XVMSUB.{B/H/W/D};
- XVMADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVMADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-27-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od}
Song Gao [Thu, 14 Sep 2023 02:26:13 +0000 (10:26 +0800)]
target/loongarch: Implement xvmul/xvmuh/xvmulw{ev/od}

This patch includes:
- XVMUL.{B/H/W/D};
- XVMUH.{B/H/W/D}[U];
- XVMULW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVMULW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-26-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvmax/xvmin
Song Gao [Thu, 14 Sep 2023 02:26:12 +0000 (10:26 +0800)]
target/loongarch: Implement xvmax/xvmin

This patch includes:
- XVMAX[I].{B/H/W/D}[U];
- XVMIN[I].{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-25-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvadda
Song Gao [Thu, 14 Sep 2023 02:26:11 +0000 (10:26 +0800)]
target/loongarch: Implement xvadda

This patch includes:
- XVADDA.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-24-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvabsd
Song Gao [Thu, 14 Sep 2023 02:26:10 +0000 (10:26 +0800)]
target/loongarch: Implement xvabsd

This patch includes:
- XVABSD.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-23-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xavg/xvagr
Song Gao [Thu, 14 Sep 2023 02:26:09 +0000 (10:26 +0800)]
target/loongarch: Implement xavg/xvagr

This patch includes:
- XVAVG.{B/H/W/D/}[U];
- XVAVGR.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-22-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvaddw/xvsubw
Song Gao [Thu, 14 Sep 2023 02:26:08 +0000 (10:26 +0800)]
target/loongarch: Implement xvaddw/xvsubw

This patch includes:
- XVADDW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVSUBW{EV/OD}.{H.B/W.H/D.W/Q.D}[U];
- XVADDW{EV/OD}.{H.BU.B/W.HU.H/D.WU.W/Q.DU.D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-21-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvhaddw/xvhsubw
Song Gao [Thu, 14 Sep 2023 02:26:07 +0000 (10:26 +0800)]
target/loongarch: Implement xvhaddw/xvhsubw

This patch includes:
- XVHADDW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU};
- XVHSUBW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-20-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvsadd/xvssub
Song Gao [Thu, 14 Sep 2023 02:26:06 +0000 (10:26 +0800)]
target/loongarch: Implement xvsadd/xvssub

This patch includes:
- XVSADD.{B/H/W/D}[U];
- XVSSUB.{B/H/W/D}[U].

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-19-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvneg
Song Gao [Thu, 14 Sep 2023 02:26:05 +0000 (10:26 +0800)]
target/loongarch: Implement xvneg

This patch includes:
- XVNEG.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-18-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvaddi/xvsubi
Song Gao [Thu, 14 Sep 2023 02:26:04 +0000 (10:26 +0800)]
target/loongarch: Implement xvaddi/xvsubi

This patch includes:
- XVADDI.{B/H/W/D}U;
- XVSUBI.{B/H/W/D}U.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-17-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvreplgr2vr
Song Gao [Thu, 14 Sep 2023 02:26:03 +0000 (10:26 +0800)]
target/loongarch: Implement xvreplgr2vr

This patch includes:
- XVREPLGR2VR.{B/H/W/D}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-16-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement xvadd/xvsub
Song Gao [Thu, 14 Sep 2023 02:26:02 +0000 (10:26 +0800)]
target/loongarch: Implement xvadd/xvsub

This patch includes:
- XVADD.{B/H/W/D/Q};
- XVSUB.{B/H/W/D/Q}.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-15-gaosong@loongson.cn>

8 months agotarget/loongarch: Add avail_LASX to check LASX instructions
Song Gao [Thu, 14 Sep 2023 02:26:01 +0000 (10:26 +0800)]
target/loongarch: Add avail_LASX to check LASX instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-14-gaosong@loongson.cn>

8 months agotarget/loongarch: check_vec support check LASX instructions
Song Gao [Thu, 14 Sep 2023 02:26:00 +0000 (10:26 +0800)]
target/loongarch: check_vec support check LASX instructions

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230914022645.1151356-13-gaosong@loongson.cn>

8 months agotarget/loongarch: Add LASX data support
Song Gao [Thu, 14 Sep 2023 02:25:59 +0000 (10:25 +0800)]
target/loongarch: Add LASX data support

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-12-gaosong@loongson.cn>

8 months agotarget/loongarch: Replace CHECK_SXE to check_vec(ctx, 16)
Song Gao [Thu, 14 Sep 2023 02:25:58 +0000 (10:25 +0800)]
target/loongarch: Replace CHECK_SXE to check_vec(ctx, 16)

Introduce a new function check_vec to replace CHECK_SXE

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-11-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_2i for 2OP + imm vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:57 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_2i for 2OP + imm vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-10-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_2 for 2OP vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:56 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_2 for 2OP vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-9-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_2_ptr for 2OP + env vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:55 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_2_ptr for 2OP + env vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-8-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_3 for 3OP vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:54 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_3 for 3OP vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-7-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_3_ptr for 3OP + env vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:53 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_3_ptr for 3OP + env vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-6-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_4 for 4OP vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:52 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_4 for 4OP vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-5-gaosong@loongson.cn>

8 months agotarget/loongarch: Use gen_helper_gvec_4_ptr for 4OP + env vector instructions
Song Gao [Thu, 14 Sep 2023 02:25:51 +0000 (10:25 +0800)]
target/loongarch: Use gen_helper_gvec_4_ptr for 4OP + env vector instructions

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-4-gaosong@loongson.cn>

8 months agotarget/loongarch: Implement gvec_*_vl functions
Song Gao [Thu, 14 Sep 2023 02:25:50 +0000 (10:25 +0800)]
target/loongarch: Implement gvec_*_vl functions

Create gvec_*_vl functions in order to hide oprsz.
This is used by gvec_v* functions for oprsz 16,
and will be used by gvec_x* functions for oprsz 32.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-3-gaosong@loongson.cn>

8 months agotarget/loongarch: Renamed lsx*.c to vec* .c
Song Gao [Thu, 14 Sep 2023 02:25:49 +0000 (10:25 +0800)]
target/loongarch: Renamed lsx*.c to vec* .c

Renamed lsx_helper.c to vec_helper.c and trans_lsx.c.inc to trans_vec.c.inc
So LASX can used them.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230914022645.1151356-2-gaosong@loongson.cn>

8 months agolinux-user/hppa: lock both words of function descriptor
Mikulas Patocka [Sat, 16 Sep 2023 16:32:45 +0000 (18:32 +0200)]
linux-user/hppa: lock both words of function descriptor

The code in setup_rt_frame reads two words at haddr, but locks only one.
This patch fixes it to lock both.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Acked-by: Helge Deller <deller@gmx.de>
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller <deller@gmx.de>
8 months agolinux-user/hppa: clear the PSW 'N' bit when delivering signals
Mikulas Patocka [Sat, 16 Sep 2023 13:49:42 +0000 (15:49 +0200)]
linux-user/hppa: clear the PSW 'N' bit when delivering signals

qemu-hppa may crash when delivering a signal. It can be demonstrated with
this program. Compile the program with "hppa-linux-gnu-gcc -O2 signal.c"
and run it with "qemu-hppa -one-insn-per-tb a.out". It reports that the
address of the flag is 0xb4 and it crashes when attempting to touch it.

#include <stdio.h>
#include <stdlib.h>
#include <sys/time.h>
#include <signal.h>

sig_atomic_t flag;

void sig(int n)
{
printf("&flag: %p\n", &flag);
flag = 1;
}

int main(void)
{
struct sigaction sa;
struct itimerval it;

sa.sa_handler = sig;
sigemptyset(&sa.sa_mask);
sa.sa_flags = SA_RESTART;
if (sigaction(SIGALRM, &sa, NULL)) perror("sigaction"), exit(1);

it.it_interval.tv_sec = 0;
it.it_interval.tv_usec = 100;
it.it_value.tv_sec = it.it_interval.tv_sec;
it.it_value.tv_usec = it.it_interval.tv_usec;

if (setitimer(ITIMER_REAL, &it, NULL)) perror("setitimer"), exit(1);

while (1) {
}
}

The reason for the crash is that the signal handling routine doesn't clear
the 'N' flag in the PSW. If the signal interrupts a thread when the 'N'
flag is set, the flag remains set at the beginning of the signal handler
and the first instruction of the signal handler is skipped.

Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Acked-by: Helge Deller <deller@gmx.de>
Cc: qemu-stable@nongnu.org
Signed-off-by: Helge Deller <deller@gmx.de>
8 months agotarget/hppa: Wire up diag instruction to support BTLB
Helge Deller [Wed, 13 Sep 2023 09:25:09 +0000 (11:25 +0200)]
target/hppa: Wire up diag instruction to support BTLB

Wire up the hppa diag instruction to support Block-TLBs
when called with the 0x100 value.

The diag_btlb() helper function does all necessary steps
to emulate the PDC BTLB firmware function, which includes
providing BTLB info, adding a new BTLB, deleting a BTLB
and removing all BTLBs.

Signed-off-by: Helge Deller <deller@gmx.de>
8 months agoMerge tag 'mem-2023-09-19' of https://github.com/davidhildenbrand/qemu into staging
Stefan Hajnoczi [Tue, 19 Sep 2023 17:22:18 +0000 (13:22 -0400)]
Merge tag 'mem-2023-09-19' of https://github.com/davidhildenbrand/qemu into staging

Hi,

"Host Memory Backends" and "Memory devices" queue ("mem"):
- Support and document VM templating with R/O files using a new "rom"
  parameter for memory-backend-file
- Some cleanups and fixes around NVDIMMs and R/O file handling for guest
  RAM
- Optimize ioeventfd updates by skipping address spaces that are not
  applicable

# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 19 Sep 2023 06:25:45 EDT
# gpg:                using RSA key 1BD9CAAD735C4C3A460DFCCA4DDE10F700FF835A
# gpg:                issuer "david@redhat.com"
# gpg: Good signature from "David Hildenbrand <david@redhat.com>" [unknown]
# gpg:                 aka "David Hildenbrand <davidhildenbrand@gmail.com>" [full]
# gpg:                 aka "David Hildenbrand <hildenbr@in.tum.de>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 1BD9 CAAD 735C 4C3A 460D  FCCA 4DDE 10F7 00FF 835A

* tag 'mem-2023-09-19' of https://github.com/davidhildenbrand/qemu:
  memory: avoid updating ioeventfds for some address_space
  machine: Improve error message when using default RAM backend id
  softmmu/physmem: Hint that "readonly=on,rom=off" exists when opening file R/W for private mapping fails
  docs: Start documenting VM templating
  docs: Don't mention "-mem-path" in multi-process.rst
  softmmu/physmem: Never return directories from file_ram_open()
  softmmu/physmem: Fail creation of new files in file_ram_open() with readonly=true
  softmmu/physmem: Bail out early in ram_block_discard_range() with readonly files
  softmmu/physmem: Remap with proper protection in qemu_ram_remap()
  backends/hostmem-file: Add "rom" property to support VM templating with R/O files
  softmmu/physmem: Distinguish between file access mode and mmap protection
  nvdimm: Reject writing label data to ROM instead of crashing QEMU

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'firmware/edk2-20230918-pull-request' of https://gitlab.com/kraxel/qemu...
Stefan Hajnoczi [Tue, 19 Sep 2023 17:22:10 +0000 (13:22 -0400)]
Merge tag 'firmware/edk2-20230918-pull-request' of https://gitlab.com/kraxel/qemu into staging

edk2: update to edk2-stable202308

v2: include acpi test data updates

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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 18 Sep 2023 09:32:53 EDT
# gpg:                using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg:                 aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg:                 aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901  FE7D 4CB6 D8EE D3E8 7138

* tag 'firmware/edk2-20230918-pull-request' of https://gitlab.com/kraxel/qemu:
  tests/acpi: disallow virt/SSDT.memhp updates
  tests/acpi: update virt/SSDT.memhp
  edk2: update binaries to edk2-stable202308
  edk2: update submodule to edk2-stable202308
  edk2: workaround edk-stable202308 bug
  edk2: update build config
  edk2: update build script
  tests/acpi: allow virt/SSDT.memhp updates

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'pull-ppc-20230918' of https://gitlab.com/danielhb/qemu into staging
Stefan Hajnoczi [Tue, 19 Sep 2023 17:22:02 +0000 (13:22 -0400)]
Merge tag 'pull-ppc-20230918' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2023-09-18:

In this short queue we're making two important changes:

- Nicholas Piggin is now the qemu-ppc maintainer. Cédric Le Goater and
Daniel Barboza will act as backup during Nick's transition to this new
role.

- Support for NVIDIA V100 GPU with NVLink2 is dropped from qemu-ppc.
Linux removed the same support back in 5.13, we're following suit now.

A xive Coverity fix is also included.

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# gpg: Signature made Mon 18 Sep 2023 09:24:44 EDT
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg:                issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 17EB FF99 23D0 1800 AF28  3819 3CD9 CA96 DE03 3164

* tag 'pull-ppc-20230918' of https://gitlab.com/danielhb/qemu:
  spapr: Remove support for NVIDIA V100 GPU with NVLink2
  ppc/xive: Fix uint32_t overflow
  MAINTAINERS: Nick Piggin PPC maintainer, other PPC changes

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging
Stefan Hajnoczi [Tue, 19 Sep 2023 17:21:49 +0000 (13:21 -0400)]
Merge tag 'net-pull-request' of https://github.com/jasowang/qemu into staging

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# gpg: Signature made Mon 18 Sep 2023 02:56:11 EDT
# gpg:                using RSA key EF04965B398D6211
# gpg: Good signature from "Jason Wang (Jason Wang on RedHat) <jasowang@redhat.com>" [full]
# Primary key fingerprint: 215D 46F4 8246 689E C77F  3562 EF04 965B 398D 6211

* tag 'net-pull-request' of https://github.com/jasowang/qemu:
  net/tap: Avoid variable-length array
  net/dump: Avoid variable length array
  hw/net/rocker: Avoid variable length array
  hw/net/fsl_etsec/rings.c: Avoid variable length array
  net: add initial support for AF_XDP network backend
  tests: bump libvirt-ci for libasan and libxdp
  e1000e: rename e1000e_ba_state and e1000e_write_hdr_to_rx_buffers
  igb: packet-split descriptors support
  igb: add IPv6 extended headers traffic detection
  igb: RX payload guest writting refactoring
  igb: RX descriptors guest writting refactoring
  igb: rename E1000E_RingInfo_st
  igb: remove TCP ACK detection
  virtio-net: Add support for USO features
  virtio-net: Add USO flags to vhost support.
  tap: Add check for USO features
  tap: Add USO support to tap device.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agoMerge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi [Tue, 19 Sep 2023 17:20:54 +0000 (13:20 -0400)]
Merge tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu into staging

*: Delete checks for old host definitions
tcg/loongarch64: Generate LSX instructions
fpu: Add conversions between bfloat16 and [u]int8
fpu: Handle m68k extended precision denormals properly
accel/tcg: Improve cputlb i/o organization
accel/tcg: Simplify tlb_plugin_lookup
accel/tcg: Remove false-negative halted assertion
tcg: Add gvec compare with immediate and scalar operand
tcg/aarch64: Emit BTI insns at jump landing pads

[Resolved conflict between CPUINFO_PMULL and CPUINFO_BTI.
--Stefan]

* tag 'pull-tcg-20230915-2' of https://gitlab.com/rth7680/qemu: (39 commits)
  tcg: Map code_gen_buffer with PROT_BTI
  tcg/aarch64: Emit BTI insns at jump landing pads
  util/cpuinfo-aarch64: Add CPUINFO_BTI
  tcg: Add tcg_out_tb_start backend hook
  fpu: Handle m68k extended precision denormals properly
  fpu: Add conversions between bfloat16 and [u]int8
  accel/tcg: Introduce do_st16_mmio_leN
  accel/tcg: Introduce do_ld16_mmio_beN
  accel/tcg: Merge io_writex into do_st_mmio_leN
  accel/tcg: Merge io_readx into do_ld_mmio_beN
  accel/tcg: Replace direct use of io_readx/io_writex in do_{ld,st}_1
  accel/tcg: Merge cpu_transaction_failed into io_failed
  plugin: Simplify struct qemu_plugin_hwaddr
  accel/tcg: Use CPUTLBEntryFull.phys_addr in io_failed
  accel/tcg: Split out io_prepare and io_failed
  accel/tcg: Simplify tlb_plugin_lookup
  target/arm: Use tcg_gen_gvec_cmpi for compare vs 0
  tcg: Add gvec compare with immediate and scalar operand
  tcg/loongarch64: Implement 128-bit load & store
  tcg/loongarch64: Lower rotli_vec to vrotri
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agomemory: avoid updating ioeventfds for some address_space
hongmianquan [Wed, 30 Aug 2023 03:29:06 +0000 (11:29 +0800)]
memory: avoid updating ioeventfds for some address_space

When updating ioeventfds, we need to iterate all address spaces,
but some address spaces do not register eventfd_add|del call when
memory_listener_register() and they do nothing when updating ioeventfds.
So we can skip these AS in address_space_update_ioeventfds().

The overhead of memory_region_transaction_commit() can be significantly
reduced. For example, a VM with 8 vhost net devices and each one has
64 vectors, can reduce the time spent on memory_region_transaction_commit by 20%.

Message-ID: <20230830032906.12488-1-hongmianquan@bytedance.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: hongmianquan <hongmianquan@bytedance.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agomachine: Improve error message when using default RAM backend id
David Hildenbrand [Wed, 6 Sep 2023 12:05:03 +0000 (14:05 +0200)]
machine: Improve error message when using default RAM backend id

For migration purposes, users might want to reuse the default RAM
backend id, but specify a different memory backend.

For example, to reuse "pc.ram" on q35, one has to set
    -machine q35,memory-backend=pc.ram
Only then, can a memory backend with the id "pc.ram" be created
manually.

Let's improve the error message by improving the hint. Use
error_append_hint() -- which in turn requires ERRP_GUARD().

Message-ID: <20230906120503.359863-12-david@redhat.com>
Suggested-by: ThinerLogoer <logoerthiner1@163.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Tested-by: Mario Casquero <mcasquer@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agosoftmmu/physmem: Hint that "readonly=on,rom=off" exists when opening file R/W for...
David Hildenbrand [Wed, 6 Sep 2023 12:05:02 +0000 (14:05 +0200)]
softmmu/physmem: Hint that "readonly=on,rom=off" exists when opening file R/W for private mapping fails

It's easy to miss that memory-backend-file with "share=off" (default)
will always try opening the file R/W as default, and fail if we don't
have write permissions to the file.

In that case, the user has to explicit specify "readonly=on,rom=off" to
get usable RAM, for example, for VM templating.

Let's hint that '-object memory-backend-file,readonly=on,rom=off,...'
exists to consume R/O files in a private mapping to create writable RAM,
but only if we have permissions to open the file read-only.

Message-ID: <20230906120503.359863-11-david@redhat.com>
Suggested-by: ThinerLogoer <logoerthiner1@163.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agodocs: Start documenting VM templating
David Hildenbrand [Wed, 6 Sep 2023 12:05:01 +0000 (14:05 +0200)]
docs: Start documenting VM templating

Let's add some details about VM templating, focusing on the VM memory
configuration only.

There is much more to VM templating (VM state? block devices?), but I leave
that as future work.

Message-ID: <20230906120503.359863-10-david@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agodocs: Don't mention "-mem-path" in multi-process.rst
David Hildenbrand [Wed, 6 Sep 2023 12:05:00 +0000 (14:05 +0200)]
docs: Don't mention "-mem-path" in multi-process.rst

"-mem-path" corresponds to "memory-backend-file,share=off" and,
therefore, creates a private COW mapping of the file. For multi-proces
QEMU, we need proper shared file-backed memory.

Let's make that clearer.

Message-ID: <20230906120503.359863-9-david@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agosoftmmu/physmem: Never return directories from file_ram_open()
David Hildenbrand [Wed, 6 Sep 2023 12:04:59 +0000 (14:04 +0200)]
softmmu/physmem: Never return directories from file_ram_open()

open() does not fail on directories when opening them readonly (O_RDONLY).

Currently, we succeed opening such directories and fail later during
mmap(), resulting in a misleading error message.

$ ./qemu-system-x86_64 \
    -object memory-backend-file,id=ram0,mem-path=tmp,readonly=true,size=1g
 qemu-system-x86_64: unable to map backing store for guest RAM: No such device

To identify directories and handle them accordingly in file_ram_open()
also when readonly=true was specified, detect if we just opened a directory
using fstat() instead. Then, fail file_ram_open() right away, similarly
to how we now fail if the file does not exist and we want to open the
file readonly.

With this change, we get a nicer error message:
 qemu-system-x86_64: can't open backing store tmp for guest RAM: Is a directory

Note that the only memory-backend-file will end up calling
memory_region_init_ram_from_file() -> qemu_ram_alloc_from_file() ->
file_ram_open().

Message-ID: <20230906120503.359863-8-david@redhat.com>
Reported-by: Thiner Logoer <logoerthiner1@163.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Tested-by: Mario Casquero <mcasquer@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agosoftmmu/physmem: Fail creation of new files in file_ram_open() with readonly=true
David Hildenbrand [Wed, 6 Sep 2023 12:04:58 +0000 (14:04 +0200)]
softmmu/physmem: Fail creation of new files in file_ram_open() with readonly=true

Currently, if a file does not exist yet, file_ram_open() will create new
empty file and open it writable. However, it even does that when
readonly=true was specified.

Specifying O_RDONLY instead to create a new readonly file would
theoretically work, however, ftruncate() will refuse to resize the new
empty file and we'll get a warning:
    ftruncate: Invalid argument
And later eventually more problems when actually mmap'ing that file and
accessing it.

If someone intends to let QEMU open+mmap a file read-only, better
create+resize+fill that file ahead of time outside of QEMU context.

We'll now fail with:
./qemu-system-x86_64 \
    -object memory-backend-file,id=ram0,mem-path=tmp,readonly=true,size=1g
qemu-system-x86_64: can't open backing store tmp for guest RAM: No such file or directory

All use cases of readonly files (R/O NVDIMMs, VM templating) work on
existing files, so silently creating new files might just hide user
errors when accidentally specifying a non-existent file.

Note that the only memory-backend-file will end up calling
memory_region_init_ram_from_file() -> qemu_ram_alloc_from_file() ->
file_ram_open().

Move error reporting to the single caller.

Message-ID: <20230906120503.359863-7-david@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agosoftmmu/physmem: Bail out early in ram_block_discard_range() with readonly files
David Hildenbrand [Wed, 6 Sep 2023 12:04:57 +0000 (14:04 +0200)]
softmmu/physmem: Bail out early in ram_block_discard_range() with readonly files

fallocate() will fail, let's print a nicer error message.

Message-ID: <20230906120503.359863-6-david@redhat.com>
Suggested-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agosoftmmu/physmem: Remap with proper protection in qemu_ram_remap()
David Hildenbrand [Wed, 6 Sep 2023 12:04:56 +0000 (14:04 +0200)]
softmmu/physmem: Remap with proper protection in qemu_ram_remap()

Let's remap with the proper protection that we can derive from
RAM_READONLY.

Message-ID: <20230906120503.359863-5-david@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agobackends/hostmem-file: Add "rom" property to support VM templating with R/O files
David Hildenbrand [Wed, 6 Sep 2023 12:04:55 +0000 (14:04 +0200)]
backends/hostmem-file: Add "rom" property to support VM templating with R/O files

For now, "share=off,readonly=on" would always result in us opening the
file R/O and mmap'ing the opened file MAP_PRIVATE R/O -- effectively
turning it into ROM.

Especially for VM templating, "share=off" is a common use case. However,
that use case is impossible with files that lack write permissions,
because "share=off,readonly=on" will not give us writable RAM.

The sole user of ROM via memory-backend-file are R/O NVDIMMs, but as we
have users (Kata Containers) that rely on the existing behavior --
malicious VMs should not be able to consume COW memory for R/O NVDIMMs --
we cannot change the semantics of "share=off,readonly=on"

So let's add a new "rom" property with on/off/auto values. "auto" is
the default and what most people will use: for historical reasons, to not
change the old semantics, it defaults to the value of the "readonly"
property.

For VM templating, one can now use:
    -object memory-backend-file,share=off,readonly=on,rom=off,...

But we'll disallow:
    -object memory-backend-file,share=on,readonly=on,rom=off,...
because we would otherwise get an error when trying to mmap the R/O file
shared and writable. An explicit error message is cleaner.

We will also disallow for now:
    -object memory-backend-file,share=off,readonly=off,rom=on,...
    -object memory-backend-file,share=on,readonly=off,rom=on,...
It's not harmful, but also not really required for now.

Alternatives that were abandoned:
* Make "unarmed=on" for the NVDIMM set the memory region container
  readonly. We would still see a change of ROM->RAM and possibly run
  into memslot limits with vhost-user. Further, there might be use cases
  for "unarmed=on" that should still allow writing to that memory
  (temporary files, system RAM, ...).
* Add a new "readonly=on/off/auto" parameter for NVDIMMs. Similar issues
  as with "unarmed=on".
* Make "readonly" consume "on/off/file" instead of being a 'bool' type.
  This would slightly changes the behavior of the "readonly" parameter:
  values like true/false (as accepted by a 'bool'type) would no longer be
  accepted.

Message-ID: <20230906120503.359863-4-david@redhat.com>
Acked-by: Markus Armbruster <armbru@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agosoftmmu/physmem: Distinguish between file access mode and mmap protection
David Hildenbrand [Wed, 6 Sep 2023 12:04:54 +0000 (14:04 +0200)]
softmmu/physmem: Distinguish between file access mode and mmap protection

There is a difference between how we open a file and how we mmap it,
and we want to support writable private mappings of readonly files. Let's
define RAM_READONLY and RAM_READONLY_FD flags, to replace the single
"readonly" parameter for file-related functions.

In memory_region_init_ram_from_fd() and memory_region_init_ram_from_file(),
initialize mr->readonly based on the new RAM_READONLY flag.

While at it, add some RAM_* flags we missed to add to the list of accepted
flags in the documentation of some functions.

No change in functionality intended. We'll make use of both flags next
and start setting them independently for memory-backend-file.

Message-ID: <20230906120503.359863-3-david@redhat.com>
Acked-by: Peter Xu <peterx@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agonvdimm: Reject writing label data to ROM instead of crashing QEMU
David Hildenbrand [Wed, 6 Sep 2023 12:04:53 +0000 (14:04 +0200)]
nvdimm: Reject writing label data to ROM instead of crashing QEMU

Currently, when using a true R/O NVDIMM (ROM memory backend) with a label
area, the VM can easily crash QEMU by trying to write to the label area,
because the ROM memory is mmap'ed without PROT_WRITE.

    [root@vm-0 ~]# ndctl disable-region region0
    disabled 1 region
    [root@vm-0 ~]# ndctl zero-labels nmem0
    -> QEMU segfaults

Let's remember whether we have a ROM memory backend and properly
reject the write request:

    [root@vm-0 ~]# ndctl disable-region region0
    disabled 1 region
    [root@vm-0 ~]# ndctl zero-labels nmem0
    zeroed 0 nmem

In comparison, on a system with a R/W NVDIMM:

    [root@vm-0 ~]# ndctl disable-region region0
    disabled 1 region
    [root@vm-0 ~]# ndctl zero-labels nmem0
    zeroed 1 nmem

For ACPI, just return "unsupported", like if no label exists. For spapr,
return "H_P2", similar to when no label area exists.

Could we rely on the "unarmed" property? Maybe, but it looks cleaner to
only disallow what certainly cannot work.

After all "unarmed=on" primarily means: cannot accept persistent writes. In
theory, there might be setups where devices with "unarmed=on" set could
be used to host non-persistent data (temporary files, system RAM, ...); for
example, in Linux, admins can overwrite the "readonly" setting and still
write to the device -- which will work as long as we're not using ROM.
Allowing writing label data in such configurations can make sense.

Message-ID: <20230906120503.359863-2-david@redhat.com>
Fixes: dbd730e85987 ("nvdimm: check -object memory-backend-file, readonly=on option")
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
8 months agoMerge tag 'pull-crypto-20230915' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi [Mon, 18 Sep 2023 15:04:21 +0000 (11:04 -0400)]
Merge tag 'pull-crypto-20230915' of https://gitlab.com/rth7680/qemu into staging

Unify implementation of carry-less multiply.
Accelerate carry-less multiply for 64x64->128.

# -----BEGIN PGP SIGNATURE-----
#
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# jqzAtg==
# =8nnk
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 15 Sep 2023 12:40:26 EDT
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* tag 'pull-crypto-20230915' of https://gitlab.com/rth7680/qemu:
  host/include/aarch64: Implement clmul.h
  host/include/i386: Implement clmul.h
  target/ppc: Use clmul_64
  target/s390x: Use clmul_64
  target/i386: Use clmul_64
  target/arm: Use clmul_64
  crypto: Add generic 64-bit carry-less multiply routine
  target/ppc: Use clmul_32* routines
  target/s390x: Use clmul_32* routines
  target/arm: Use clmul_32* routines
  crypto: Add generic 32-bit carry-less multiply routines
  target/ppc: Use clmul_16* routines
  target/s390x: Use clmul_16* routines
  target/arm: Use clmul_16* routines
  crypto: Add generic 16-bit carry-less multiply routines
  target/ppc: Use clmul_8* routines
  target/s390x: Use clmul_8* routines
  target/arm: Use clmul_8* routines
  crypto: Add generic 8-bit carry-less multiply routines

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
8 months agotests/acpi: disallow virt/SSDT.memhp updates
Gerd Hoffmann [Mon, 18 Sep 2023 13:00:24 +0000 (15:00 +0200)]
tests/acpi: disallow virt/SSDT.memhp updates

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agotests/acpi: update virt/SSDT.memhp
Gerd Hoffmann [Mon, 18 Sep 2023 12:15:51 +0000 (14:15 +0200)]
tests/acpi: update virt/SSDT.memhp

The edk2 update caused an address change:

 DefinitionBlock ("", "SSDT", 1, "BOCHS ", "NVDIMM", 0x00000001)
 {
     Scope (\_SB)
     {
         Device (NVDR)
         {
             Name (_HID, "ACPI0012" /* NVDIMM Root Device */)  // _HID: Hardware ID
             [ ... ]
         }
     }

-    Name (MEMA, 0x43D10000)
+    Name (MEMA, 0x43C90000)
 }

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agoedk2: update binaries to edk2-stable202308
Gerd Hoffmann [Mon, 11 Sep 2023 19:09:54 +0000 (21:09 +0200)]
edk2: update binaries to edk2-stable202308

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agoedk2: update submodule to edk2-stable202308
Gerd Hoffmann [Mon, 11 Sep 2023 15:39:23 +0000 (17:39 +0200)]
edk2: update submodule to edk2-stable202308

New stable release was tagged in August 2023,
update the edk2 submodule to it.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agoedk2: workaround edk-stable202308 bug
Gerd Hoffmann [Mon, 11 Sep 2023 18:20:15 +0000 (20:20 +0200)]
edk2: workaround edk-stable202308 bug

Set PCD to workaround two fixes missing the release.
https://github.com/tianocore/edk2/commit/8b66f9df1bb0fd5ebb743944d41cb33178cf2fdd
https://github.com/tianocore/edk2/commit/020cc9e2e7053bb62247b0babbbe80cb855592e5

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agoedk2: update build config
Gerd Hoffmann [Mon, 11 Sep 2023 15:38:21 +0000 (17:38 +0200)]
edk2: update build config

risc-v switched to use split code/vars images like the other archs.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agoedk2: update build script
Gerd Hoffmann [Mon, 11 Sep 2023 15:38:12 +0000 (17:38 +0200)]
edk2: update build script

Sync with latest version from gitlab.com/kraxel/edk2-build-config

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agotests/acpi: allow virt/SSDT.memhp updates
Gerd Hoffmann [Mon, 18 Sep 2023 12:07:25 +0000 (14:07 +0200)]
tests/acpi: allow virt/SSDT.memhp updates

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
8 months agospapr: Remove support for NVIDIA V100 GPU with NVLink2
Cédric Le Goater [Mon, 18 Sep 2023 09:17:17 +0000 (11:17 +0200)]
spapr: Remove support for NVIDIA V100 GPU with NVLink2

NVLink2 support was removed from the PPC PowerNV platform and VFIO in
Linux 5.13 with commits :

  562d1e207d32 ("powerpc/powernv: remove the nvlink support")
  b392a1989170 ("vfio/pci: remove vfio_pci_nvlink2")

This was 2.5 years ago. Do the same in QEMU with a revert of commit
ec132efaa81f ("spapr: Support NVIDIA V100 GPU with NVLink2"). Some
adjustements are required on the NUMA part.

Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Acked-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Cédric Le Goater <clg@redhat.com>
Message-ID: <20230918091717.149950-1-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>