Tony Lindgren [Thu, 20 May 2010 18:36:43 +0000 (11:36 -0700)]
omap: Fix i2c platform init code for omap4
Add separate omap_i2c_add_bus functions for mach-omap1
and mach-omap2. Make the mach-omap2 init set the interrupt
dynamically to support.
This is needed to add support for omap4 in a way that
works with multi-omap builds. This will eventually get
fixed in a generic way with the omap hwmods.
Paul Walmsley [Wed, 19 May 2010 02:24:06 +0000 (20:24 -0600)]
OMAP2 clock: fix recursive spinlock attempt when CONFIG_CPU_FREQ=y
The OMAP2 MPU virtual clock node code attempted to call clk_get_rate()
while the clockfw_lock spinlock was held. Fix by reading the sys_ck
rate directly.
Rajendra Nayak [Wed, 19 May 2010 02:24:03 +0000 (20:24 -0600)]
OMAP4 powerdomain: Support LOWPOWERSTATECHANGE for powerdomains
Some powerdomains in OMAP4 support a direct transition from one sleep
state to another deeper sleep state without having to wakeup the
powerdomain. This patch adds an api in the powerdomain framework to
set the LOWPOWERSTATECHANGE bit in PWRSTCTRL register.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Wed, 19 May 2010 02:24:01 +0000 (20:24 -0600)]
OMAP4 powerdomain: Fix pwrsts flags for ALWAYS ON domains
The pwrsts flag for ALWAYS ON domains like always_on_core_pwrdm
and wkup_pwrdm is wrongly populated with the define for a
powerdomain power state, instead of the allowable state
bitfields.
This causes a few api's to fail sensing invalid pwrst
requested.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Wed, 19 May 2010 02:24:00 +0000 (20:24 -0600)]
OMAP: timers: Fix clock source names for OMAP4
The clock sources for timers on OMAP4 (system clock and 32k
clock) have their names wronly populated.
This patch fixes them so the omap_dm_timer_set_source
does not fail anymore.
Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Rajendra Nayak [Thu, 20 May 2010 18:31:12 +0000 (12:31 -0600)]
OMAP4: PRCM: Add offset defines for all CM registers
The cm44xx.h files only had absolute register address
defines for all CM registers.
This patch adds additional register offset defines for all the
registers, so they can be used with apis like cm_read_mod_*
Rajendra Nayak [Thu, 20 May 2010 18:31:12 +0000 (12:31 -0600)]
OMAP4: PRCM: Add offset defines for all PRM registers
The prm44xx.h files only had absolute register address
defines for all PRM registers.
This patch adds additional register offset defines for all the
registers, so they can be used with apis like prm_read_mod_*
Benoit Cousson [Thu, 20 May 2010 18:31:11 +0000 (12:31 -0600)]
OMAP4: PRM: Remove MPU internal code name and apply PRCM naming convention
The MPU subsystem was named based on internal code name (CHIRON).
This patch will remove all the occurences of the chiron name
are replace it with PRCM_MPU in order to differentiate
the MPU local PRCM to the global one.
Remove PDA_ from PRCM_MPU registers names to stick to the global
PRM naming convention.
Benoit Cousson [Thu, 20 May 2010 18:31:11 +0000 (12:31 -0600)]
OMAP4: CM: Remove non-functional registers in ES1.0
The automatic HW restore from OFF mode is not functional at all in
OMAP4430 ES1.0.
Because of that, it will be extensively changed in the next Si revision,
and the compatibilty will not be maintained with ES1.0.
Remove the current XXX_RESTORE registers definition to avoid future
conflicts with the next Si revision.
Benoit Cousson [Thu, 20 May 2010 18:31:10 +0000 (12:31 -0600)]
OMAP: hwmod: Replace WARN by pr_warning for clockdomain check
Most of the clock nodes belong to a clock domain, but it is perfectly valid
to have clock without clock domain.
Root clocks for example does not belong to any clock domain.
Keep the warning but reduce the verbosity.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:10 +0000 (12:31 -0600)]
OMAP: hwmod: Do not exit the iteration if one clock init failed
During the _init_clocks phase, the iteration is stopped but the
status is still change from _HWMOD_STATE_REGISTERED to
_HWMOD_STATE_CLKS_INITED.
Since the _setup phase will be done nevertheless, it might be
better to keep initializing the others clocks nodes and just
keep the warning.
It is much easier to debug when a important number of clocks
name are wrong during the early debug phase of a new platform.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:09 +0000 (12:31 -0600)]
OMAP: hwmod: Remove IS_ERR check with omap_clk_get_by_name return value
The previous clock API was returning a standard linux error code in
case of failure. This is not the case anymore with the new
omap_clk_get_by_name API. A NULL value means that the clock node
does not exist.
Replace all the IS_ERR check by a !clk check.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:09 +0000 (12:31 -0600)]
OMAP: hwmod: Fix wrong pointer iteration in oh->slaves
The iteration is currently done on the omap_hwmod_ocp_if pointer
and not on the table pointer that reference them.
It worked most of the time because the structure are contiguous in
memory.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:09 +0000 (12:31 -0600)]
OMAP4: hwmod: Replace OCPIF_HAS_IDLEST by HWMOD_NO_IDLEST
Some initiator modules in OMAP2 & 3 does not have IDLEST bit,
in that case we cannot detect the module readiness by
polling that bit and must exist the function immediately
assuming that the module is ready.
The previous flag was affected to the OCP interface. While it is
technically true that the idlest is related to the L4 slave
interface of the module, the PRCM status belong to the module.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:08 +0000 (12:31 -0600)]
OMAP4: hwmod & CM: Implement the omap4_cm_wait_module_ready function
The return of the omap4_cm_wait_module_ready function is checked
in order to avoid accessing the sysconfig register if the module is
not in the correct state.
In that case the _setup will exit without trying to reset
using sysconfig.
For the moment a warning is printed. A proper management of fclk
and module reset will have to be done in order to init correctly
the problematic IPs listed below.
<4>omap_hwmod: ivahd: cannot be enabled (3)
<4>omap_hwmod: iss: cannot be enabled (3)
<4>omap_hwmod: tesla: cannot be enabled (3)
<4>omap_hwmod: sdma: cannot be enabled (3)
<4>omap_hwmod: sl2: cannot be enabled (3)
<4>omap_hwmod: sad2d: cannot be enabled (3)
<4>omap_hwmod: ducati: cannot be enabled (3)
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Benoit Cousson [Thu, 20 May 2010 18:31:08 +0000 (12:31 -0600)]
OMAP: CM: Move MAX_MODULE_READY_TIME to cm.h
The maximum timeout to wait for the PRCM to request that a module
exit idle or reach functionnal state is common to OMAP2/3/4 SoCs,
so, move it to the chip family-common cm.h include file.
Reduce the timeout from 20 ms to 2 ms.
Signed-off-by: Benoit Cousson <b-cousson@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Accessing the clkctrl register using offset of module & device is hard
to do in OMAP4 due to the way the CM1, CM2, PRM and PRCM_MPU are located
in the address space. There is no common base address anymore for all the
CM registers.
The easiest way to handle that on OMAP4 is to provide the absolute address
of the XXX_CLKCTRL register per hwmod.
Paul Walmsley [Wed, 19 May 2010 00:40:26 +0000 (18:40 -0600)]
OMAP3 clock: remove unnecessary duplicate of dpll4_m2_ck, added for 36xx
Commit 678bc9a2eabb7f444ef8ad1cfc5ef394e2bd8bf2 split dpll4_m2_ck,
creating a 34xx and a 36xx variant, to handle the additional 16
divider steps provided on the 36xx. This in turn required dynamic
rewriting of the clock tree during initialization, which is
undesirable. All this seems to be unnecessary, though, since the
additional 16 divider steps can simply be marked with RATE_IN_36XX.
This patch does so and re-merges the affected structures.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Vishwanath Sripathy <vishwanath.bs@ti.com>
Paul Walmsley [Wed, 19 May 2010 00:40:25 +0000 (18:40 -0600)]
OMAP3 clock: rename RATE_IN_343X, RATE_IN_3430ES2 to match reality
Rename the RATE_IN_343X clksel_rate.rate flag to be RATE_IN_3XXX, to reflect
that these rates are valid on all OMAP3 platforms, not just 343X.
Also rename the RATE_IN_OMAP3430ES2 clksel_rate.rate flag to be
RATE_IN_OMAP3430ES2PLUS, to reflect that these flags are valid on all
OMAP3 platforms after 3430ES2.
This patch should not result in any functional changes.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Richard Woodruff <r-woodruff2@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Ranjith Lohithakshan <ranjithl@ti.com>
Paul Walmsley [Wed, 19 May 2010 00:40:24 +0000 (18:40 -0600)]
OMAP2+ clock: remove DEFAULT_RATE clksel_rate flag
The DEFAULT_RATE clksel_rate flag is essentially useless. It was set
on some of the lowest divisors, which, when switching to a much
higher-rate parent, could have potentially resulted in rates that
exceeded the hardware specifications for downstream clocks in the
window between the clk_set_parent(), and a subsequent clk_set_rate().
It seems much safer to just remove the flag and always use the highest
available divisor (resulting in the lowest possible rate) after the
switch, and this patch does so.
Ideally, it would be best to first attempt to switch to a divisor that
matches the clock's rate with the previous parent, if at all possible.
But that is a project for some other day or some other person. The
parent changing code is rarely used.
Paul Walmsley [Wed, 19 May 2010 00:40:23 +0000 (18:40 -0600)]
OMAP3: PM: PM_MPUGRPSEL writes should use GRPSEL macros, not EN macros
Writes to the PM_*GRPSEL registers should use _GRPSEL_ macros, not _EN_ macros,
to match the TRM and guard against inadvertent error. This patch should
not cause any functional change.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Jouni Högander <jouni.hogander@nokia.com>
Paul Walmsley [Wed, 19 May 2010 00:40:23 +0000 (18:40 -0600)]
OMAP2+ PRCM: convert remaining PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining PRCM register shift/bitmask macros that did not
use the _SHIFT/_MASK suffixes to use them. This makes the use of these
macros consistent. It is intended to reduce error, as code can be inspected
visually by reviewers to ensure that bitshifts and bitmasks are used in
the appropriate places.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Paul Walmsley [Wed, 19 May 2010 00:47:24 +0000 (18:47 -0600)]
OMAP3 PRCM: convert OMAP3 PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining OMAP3 PRCM register shift/bitmask macros that
did not use the _SHIFT/_MASK suffixes to use them. This makes the use
of these macros consistent. It is intended to reduce error, as code
can be inspected visually by reviewers to ensure that bitshifts and
bitmasks are used in the appropriate places.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Paul Walmsley [Thu, 20 May 2010 18:31:04 +0000 (12:31 -0600)]
OMAP2 PRCM: convert OMAP2 PRCM macros to the _SHIFT/_MASK suffixes
Fix all of the remaining OMAP2 PRCM register shift/bitmask macros that
did not use the _SHIFT/_MASK suffixes to use them. This makes the use
of these macros consistent. It is intended to reduce error, as code
can be inspected visually by reviewers to ensure that bitshifts and
bitmasks are used in the appropriate places.
Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
Anand Gadiyar [Thu, 13 May 2010 05:32:27 +0000 (05:32 +0000)]
omap3: update omap3_defconfig
- Update the omap3_defconfig to sync up with the generated .config
- Increase CONFIG_LOG_BUF_SHIFT to 16 to allow the entire
boot log to be captured
(useful when using boot time tracer, for example)
Signed-off-by: Anand Gadiyar <gadiyar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
kishore kadiyala [Sat, 15 May 2010 18:21:25 +0000 (18:21 +0000)]
omap4: Adding PBIAS Configuration for MMC1 Controller
In OMAP4, MMC1 PBIAS and its associated IO is software-controlled
by CONTROL_PBIAS and CONTROL_MMC1 registers. This patch adds PBIAS
configuration for MMC1 Controller during power-ON and power-OFF
of regulator.
Signed-off-by: Kishore Kadiyala <kishore.kadiyala@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Balaji T K [Wed, 12 May 2010 08:27:31 +0000 (08:27 +0000)]
omap4: Enable RTC and regulator support
This patch enables RTC and regulator support on omap4430 sdp
platform. Also sync up the defconfig with latest kernel
Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
omap4: Add i2c board support on omap4430 sdp platform
This patch adds the i2c board support for OMAP4430 SDP platform.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
stanley.miao [Thu, 13 May 2010 12:39:29 +0000 (12:39 +0000)]
AM3517: rename the i2c boardinfo to make it more readable
There are three i2c buses on am3517, and each i2c bus has several devices
on it, so we can't name the i2c boardinfo structures with one of these
devices. In order to make it more readable, now rename these three boardinfo
structures based on i2c indexes.
This patch moves OMAP4 soc specific code from 4430sdp board file.
The change is necessary so that newer board support can be added
with minimal changes. This will be also problematic for
multi-board, multi-omap builds.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
stanley.miao [Thu, 13 May 2010 12:39:30 +0000 (12:39 +0000)]
omap: init the gpio pinmux for mmc
There is two gpio for mmc use, one is for card detecting, another is
used for checking write protect. Intialize its pinmux in case the bootloader
doesn't set it.
Signed-off-by: Stanley.Miao <stanley.miao@windriver.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Mika Westerberg [Fri, 14 May 2010 19:05:25 +0000 (12:05 -0700)]
OMAP2/3/4: DMA: disable channel interrupts in omap_init_dma()
If we are softbooting another kernel using kexec, DMA controller state is not
known when we are performing omap_init_dma(). It is possible that some DMA
channels are already active. For example after kexec we get:
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
<4>IRQ 0020 for non-allocated DMAchannel 5
To prevent any weird things happening, we disable all channel interrupts during
init.
Signed-off-by: Mika Westerberg <ext-mika.1.westerberg@nokia.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Mon, 10 May 2010 21:29:19 +0000 (14:29 -0700)]
omap: rx51: Add supplies for the tlv320aic3x codec driver
Upcoming change to tlv320aic3x codec driver require four supplies.
Implement this by connecting analogic supplies to TWL4030 VMMC2 and digital
supplies to TWL4030 VIO.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Cc: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Jarkko Nikula [Mon, 10 May 2010 21:29:18 +0000 (14:29 -0700)]
omap: rx51: Change the TWL4030 VMMC2 voltage constraints andsupply name
I believe the VMMC2 constraints must be the same than with VAUX3. Older
boards are using TWL4030 VMMC2 supply for internal MMC whereas newer are
using VAUX3 that has more limited constraints defined in this same file.
More over, the VMMC2 supply is used also for analog audio domain and the
miminum analog voltage of the TLV320AIC34 codec is 2.7 V.
To combine these two facts, the patch changes supply name to V28_A as the
newer boards register VMMC2_30 for VAUX3 and uses the same constraints than
VAUX3 since those constraints are ok for the TLV320AIC34.
Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> Cc: Adrian Hunter <adrian.hunter@nokia.com> Cc: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Sriram [Mon, 10 May 2010 21:29:17 +0000 (14:29 -0700)]
OMAP3: clock data: Update name string for EMAC clocks
The emac driver currently uses Davinci clock names for the module and phy
clocks. Updated the omap3xxx_clks table to match the names
used by the Davinci emac driver.
Note that eventually the EMAC clocks should be renamed to be generic.
Signed-off-by: Sriramakrishnan <srk@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com>
[tony@atomide.com: updated patch description to match the patch] Signed-off-by: Tony Lindgren <tony@atomide.com>
The patch provides the following ams_delta_defconfig updates:
- explicitly select preemptable RCU,
- replace outdated CONFIG_LBD and CONFIG_LSF options with CONFIG_LBDAF,
- activate support for LCD contrast setting (new in 2.6.34),
- turn off verbose bug reporting for smaller kernel.
Created and tested against linux-2.6.34-rc3.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: Tony Lindgren <tony@atomide.com>
Kalle Jokiniemi [Tue, 11 May 2010 18:35:08 +0000 (11:35 -0700)]
i2c-omap: add mpu wake up latency constraint in i2c
While waiting for completion of the i2c transfer, the
MPU could hit OFF mode and cause several msecs of
delay that made i2c transfers fail more often. The
extra delays and subsequent re-trys cause i2c clocks
to be active more often. This has also an negative
effect on power consumption.
Created a mechanism for passing and using the
constraint setting function in driver code. The used
mpu wake up latency constraints are now set individually
per bus, and they are calculated based on clock rate
and fifo size.
Thanks to Jarkko Nikula, Moiz Sonasath, Paul Walmsley,
and Nishanth Menon for tuning out the details of
this patch.
Updates by Kevin as requested by Tony:
- Remove omap_set_i2c_constraint_func() in favor of conditionally
adding the flag in omap_i2c_add_bus() in order to keep all the OMAP
conditional checking in a single location.
- Update set_mpu_wkup_lat prototypes to match OMAP PM layer so
OMAP PM function can be used directly in pdata.
Cc: Moiz Sonasath <m-sonasath@ti.com> Cc: Jarkko Nikula <jhnikula@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
This patch is rebased version of earlier post to add I2C
driver support to OMAP4 platform. On OMAP4, all
I2C register address offsets are changed from OMAP1/2/3 I2C.
In order to not have #ifdef's at various places in code,
as well as to support multi-OMAP build, an array is created
to hold the register addresses with it's offset.
This patch was submitted, reviewed and acked on mailing list
already. For more details refer below link
http://www.mail-archive.com/linux-i2c@vger.kernel.org/msg02281.html
This updated verion has a depedancy on "Add support for 16-bit registers"
posted on linux-omap. Below is the patch-works link for the same
http://patchwork.kernel.org/patch/72295/
Signed-off-by: Syed Rafiuddin <rafiuddin.syed@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Cc: Cory Maccarrone <darkstar6262@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Sonic Zhang [Mon, 22 Mar 2010 07:23:18 +0000 (03:23 -0400)]
i2c-bfin-twi: fix lost interrupts at high speeds
i2c event of next read/write byte may trigger before current int state
is cleared in the interrupt handler. So, this should be done at the
beginning of interrupt handler to avoid losing new i2c events.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Add some debug() code to decode the error register.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Sonic Zhang [Mon, 22 Mar 2010 07:23:16 +0000 (03:23 -0400)]
i2c-bfin-twi: integrate timeout timer with completion interface
There isn't much point in managing our own custom timeout timer when the
completion interface already includes support for it. This makes the
resulting code much simpler and robust.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Mark Brown [Fri, 2 Apr 2010 13:15:09 +0000 (14:15 +0100)]
i2c-s3c2410: Remove unconditional 1ms delay on each transfer
The S3C I2C controller indicates completion of I2C transfers before
the bus has a stop condition on it. In order to ensure that we do not
attempt to start a new transfer before the bus is idle the driver
currently inserts a 1ms delay. This is vastly larger than is generally
required and has a visible effect on performance under load, such as
when bringing up audio CODECs or reading back status information with
non-bulk I2C reads.
Replace the sleep with a spin on the IIC status register for up to 1ms.
This will busy wait but testing on my SMDK6410 system indicates that
the overwhelming majority of transactions complete on the first spin,
with maximum latencies of less than 10 spins so the absolute overhead
of busy waiting should be at worst comprable to msleep(), and the
overall system performance is dramatically improved.
The main risk is poor interaction with multimaster systems where
we may miss the bus going idle before the next transaction. Defend
against this by falling back to the original 1ms delay after 20 spins.
The overall effect in my testing is an approximately 20% improvement
in kernel startup time.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Linus Torvalds [Wed, 19 May 2010 19:08:50 +0000 (12:08 -0700)]
Merge branch 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci
* 'davinci-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci: (48 commits)
Revert "rtc: omap: let device wakeup capability be configured from chip init logic"
DM365: Added more PINMUX configurations for AEMIF
DM365: Make CLKOUTx available
DM365: Added PINMUX definitions for GPIO30..32
Davinci: iotable based ioremap() interception
Davinci: pinmux - use ioremap()
Davinci: aintc/cpintc - use ioremap()
Davinci: psc - use ioremap()
Davinci: timer - use ioremap()
Davinci: jtag_id - use ioremap()
Davinci: da8xx: rtc - use ioremap
Davinci: gpio - use ioremap()
davinci: edma: fix coding style issue related to breaking lines
davinci: edma: use BIT() wherever possible
davinci: edma: fix coding style issue related to usage of braces
davinci: edma: use a more intuitive name for edma_info
Davinci: serial - conditional reset via pwremu
Davinci: serial - use ioremap()
Davinci: serial - remove unnecessary define
Davinci: watchdog reset separation across socs
...
Fix up trivial conflict in arch/arm/Kconfig due to removal of "select
GENERIC_TIME"
KOSAKI Motohiro [Wed, 19 May 2010 00:37:41 +0000 (09:37 +0900)]
cpumask: fix compat getaffinity
Commit a45185d2d "cpumask: convert kernel/compat.c" broke libnuma, which
abuses sched_getaffinity to find out NR_CPUS in order to parse
/sys/devices/system/node/node*/cpumap.
On NUMA systems with less than 32 possibly CPUs, the current
compat_sys_sched_getaffinity now returns '4' instead of the actual
NR_CPUS/8, which makes libnuma bail out when parsing the cpumap.
The libnuma call sched_getaffinity(0, bitmap, 4096) at first. It mean
the libnuma expect the return value of sched_getaffinity() is either len
argument or NR_CPUS. But it doesn't expect to return nr_cpu_ids.
Strictly speaking, userland requirement are
1) Glibc assume the return value mean the lengh of initialized
of mask argument. E.g. if sched_getaffinity(1024) return 128,
glibc make zero fill rest 896 byte.
2) Libnuma assume the return value can be used to guess NR_CPUS
in kernel. It assume len-arg<NR_CPUS makes -EINVAL. But
it try len=4096 at first and 4096 is always bigger than
NR_CPUS. Then, if we remove strange min_length normalization,
we never hit -EINVAL case.
sched_getaffinity() already solved this issue. This patch adapts
compat_sys_sched_getaffinity() to match the non-compat case.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Acked-by: Rusty Russell <rusty@rustcorp.com.au> Acked-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Ken Werner <ken.werner@web.de> Cc: stable@kernel.org Cc: Andi Kleen <andi@firstfloor.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Linus Torvalds [Wed, 19 May 2010 18:41:52 +0000 (11:41 -0700)]
Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
* 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6:
[IA64] Drop duplicated "config IOMMU_HELPER"
[IA64] invoke oom-killer from page fault
[IA64] use __ratelimit
[IA64] Use set_cpus_allowed_ptr
[IA64] Use set_cpus_allowed_ptr
[IA64] arch/ia64/hp/common/sba_iommu.c: Rename dev_info to adi
[IA64] removing redundant ifdef
Linus Torvalds [Wed, 19 May 2010 18:37:22 +0000 (11:37 -0700)]
Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (224 commits)
ARM: remove 'select GENERIC_TIME'
ARM: 6136/1: ARCH_REQUIRE_GPIOLIB selects GENERIC_GPIO
ARM: 6074/1: oprofile: convert from sysdev to platform device
ARM: 6073/1: oprofile: remove old files and update KConfig
ARM: 6072/1: oprofile: use perf-events framework as backend
ARM: 6071/1: perf-events: allow modules to query the number of hardware counters
ARM: 6070/1: perf-events: add support for xscale PMUs
ARM: 6069/1: perf-events: use numeric ID to identify PMU
ARM: 6064/1: pmu: register IRQs at runtime
ARM: Optionally allow ARMv6 to use 'normal, bufferable' memory for DMA
ARM: 6134/1: Handle instruction cache maintenance fault properly
ARM: nwfpe: allow debugging output to be configured at runtime
ARM: rename mach_cpu_disable() to platform_cpu_disable()
ARM: 6132/1: PL330: Add common core driver
ARM: 6094/1: Extend cache-l2x0 to support the 16-way PL310
ARM: Move memory mapping into mmu.c
ARM: Ensure meminfo is sorted prior to sanity_check_meminfo
ARM: Remove useless linux/bootmem.h includes
ARM: convert /proc/cpu/aligment to seq_file
arm: use asm-generic/scatterlist.h
...
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (127 commits)
sh: update defconfigs.
sh: Fix up the NUMA build for recent LMB changes.
sh64: provide a stub per_cpu_trap_init() definition.
sh: fix up CONFIG_KEXEC=n build.
sh: fixup the docbook paths for clock framework shuffling.
driver core: Early dev_name() depends on slab_is_available().
sh: simplify WARN usage in SH clock driver
sh: Check return value of clk_get on ms7724
sh: Check return value of clk_get on ecovec24
sh: move sh clock-cpg.c contents to drivers/sh/clk-cpg.c
sh: move sh clock.c contents to drivers/sh/clk.
sh: move sh asm/clock.h contents to linux/sh_clk.h V2
sh: remove unused clock lookup
sh: switch boards to clkdev
sh: switch sh4-202 to clkdev
sh: switch shx3 to clkdev
sh: switch sh7757 to clkdev
sh: switch sh7763 to clkdev
sh: switch sh7780 to clkdev
sh: switch sh7786 to clkdev
...
This patch implements generic GPIO configuration function in Samsung
touchscreen driver. And makes the touchscreen driver s3c24xx-ts.c
generic to all the Samsung SoCs.
Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
[ben-linux@fluff.org: fixed title ] Signed-off-by: Ben Dooks <ben-linux@fluff.org> Acked-by: Dmitry Torokhov <dtor@mail.ru>