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5 years agoMerge remote-tracking branch 'remotes/stsquad/tags/pull-testing-gdbstub-cputlb-120619...
Peter Maydell [Thu, 13 Jun 2019 09:00:18 +0000 (10:00 +0100)]
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-gdbstub-cputlb-120619-3' into staging

Various fixes and updates:

  - editor config tweak for shell scripts
  - iotest updates (still not default for make check)
  - various docker updates
  - gcc/ubsan updates for travis
  - some clean-ups for tests/vm (no serial autoinstall)
  - semihosting fix for Coverity
  - fixes for cputlb in 64-on-32 cases
  - gdbstub re-factor + maintainership update

# gpg: Signature made Wed 12 Jun 2019 17:55:04 BST
# gpg:                using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8  DF35 FBD0 DB09 5A9E 2A44

* remotes/stsquad/tags/pull-testing-gdbstub-cputlb-120619-3: (40 commits)
  gdbstub: Implement qemu physical memory mode
  gdbstub: Clear unused variables in gdb_handle_packet
  gdbstub: Implement target halted (? pkt) with new infra
  gdbstub: Implement generic set/query (Q/q pkt) with new infra
  gdbstub: Implement v commands with new infra
  gdbstub: Implement step (s pkt) with new infra
  gdbstub: Implement file io (F pkt) with new infra
  gdbstub: Implement read all registers (g pkt) with new infra
  gdbstub: Implement write all registers (G pkt) with new infra
  gdbstub: Implement read memory (m pkt) with new infra
  gdbstub: Implement write memory (M pkt) with new infra
  gdbstub: Implement get register (p pkt) with new infra
  gdbstub: Implement set register (P pkt) with new infra
  gdbstub: Implement breakpoint commands (Z/z pkt) with new infra
  gdbstub: Implement set_thread (H pkt) with new infra
  gdbstub: Implement continue with signal (C pkt) with new infra
  gdbstub: Implement continue (c pkt) with new infra
  gdbstub: Implement thread_alive (T pkt) with new infra
  gdbstub: Implement deatch (D pkt) with new infra
  gdbstub: Add infrastructure to parse cmd packets
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agogdbstub: Implement qemu physical memory mode
Jon Doron [Wed, 29 May 2019 06:41:48 +0000 (09:41 +0300)]
gdbstub: Implement qemu physical memory mode

Add a new query/set which changes the memory GDB sees to physical memory
only.

gdb> maint packet qqemu.PhyMemMode
will reply the current phy_mem_mode state (1 for enabled, 0 for disabled)
gdb> maint packet Qqemu.PhyMemMode:1
Will make GDB read/write only to physical memory, set to 0 to disable

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-21-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Clear unused variables in gdb_handle_packet
Jon Doron [Wed, 29 May 2019 06:41:47 +0000 (09:41 +0300)]
gdbstub: Clear unused variables in gdb_handle_packet

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-20-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement target halted (? pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:46 +0000 (09:41 +0300)]
gdbstub: Implement target halted (? pkt) with new infra

Note: The user-mode thread-id has been correctly reported since bd88c780e6

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-19-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement generic set/query (Q/q pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:45 +0000 (09:41 +0300)]
gdbstub: Implement generic set/query (Q/q pkt) with new infra

The generic set/query packets contains implementation for varioius
sub-commands which are required for GDB and also additional commands
which are QEMU specific.

To see which QEMU specific commands are available use the command
gdb> maintenance packet qqemu.Supported

Currently the only implemented QEMU specific command is the command
that sets the single step behavior.

gdb> maintenance packet qqemu.sstepbits
Will display the MASK bits used to control the single stepping.

gdb> maintenance packet qqemu.sstep
Will display the current value of the mask used when single stepping.

gdb> maintenance packet Qqemu.sstep:HEX_VALUE
Will change the single step mask.

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-18-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement v commands with new infra
Jon Doron [Wed, 29 May 2019 06:41:44 +0000 (09:41 +0300)]
gdbstub: Implement v commands with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-17-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement step (s pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:43 +0000 (09:41 +0300)]
gdbstub: Implement step (s pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-16-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement file io (F pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:42 +0000 (09:41 +0300)]
gdbstub: Implement file io (F pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-15-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement read all registers (g pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:41 +0000 (09:41 +0300)]
gdbstub: Implement read all registers (g pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-14-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement write all registers (G pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:40 +0000 (09:41 +0300)]
gdbstub: Implement write all registers (G pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-13-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement read memory (m pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:39 +0000 (09:41 +0300)]
gdbstub: Implement read memory (m pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-12-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement write memory (M pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:38 +0000 (09:41 +0300)]
gdbstub: Implement write memory (M pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-11-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement get register (p pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:37 +0000 (09:41 +0300)]
gdbstub: Implement get register (p pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-10-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement set register (P pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:36 +0000 (09:41 +0300)]
gdbstub: Implement set register (P pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-9-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement breakpoint commands (Z/z pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:35 +0000 (09:41 +0300)]
gdbstub: Implement breakpoint commands (Z/z pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-8-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement set_thread (H pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:34 +0000 (09:41 +0300)]
gdbstub: Implement set_thread (H pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-7-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement continue with signal (C pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:33 +0000 (09:41 +0300)]
gdbstub: Implement continue with signal (C pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-6-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement continue (c pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:32 +0000 (09:41 +0300)]
gdbstub: Implement continue (c pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-5-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement thread_alive (T pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:31 +0000 (09:41 +0300)]
gdbstub: Implement thread_alive (T pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-4-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Implement deatch (D pkt) with new infra
Jon Doron [Wed, 29 May 2019 06:41:30 +0000 (09:41 +0300)]
gdbstub: Implement deatch (D pkt) with new infra

Signed-off-by: Jon Doron <arilou@gmail.com>
Message-Id: <20190529064148.19856-3-arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agogdbstub: Add infrastructure to parse cmd packets
Jon Doron [Wed, 29 May 2019 06:41:29 +0000 (09:41 +0300)]
gdbstub: Add infrastructure to parse cmd packets

Signed-off-by: Jon Doron <arilou@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20190529064148.19856-2-arilou@gmail.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agocputlb: cast size_t to target_ulong before using for address masks
Alex Bennée [Thu, 6 Jun 2019 15:38:19 +0000 (16:38 +0100)]
cputlb: cast size_t to target_ulong before using for address masks

While size_t is defined to happily access the biggest host object this
isn't the case when generating masks for 64 bit guests on 32 bit
hosts. Otherwise we end up truncating the address when we fall back to
our unaligned helper.

Fixes: https://bugs.launchpad.net/qemu/+bug/1831545
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Andrew Randrianasulu <randrianasulu@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agoMAINTAINERS: put myself forward for gdbstub
Alex Bennée [Thu, 6 Jun 2019 08:27:53 +0000 (09:27 +0100)]
MAINTAINERS: put myself forward for gdbstub

As I've been reviewing a lot of this recently and I'm going to put
together a pull request I'd better keep an eye on it. Philippe has
also volunteered to be a reviewer.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agotests/tcg/x86_64: add a PVH crt.o for x86_64 system tests
Alex Bennée [Wed, 6 Mar 2019 16:44:47 +0000 (16:44 +0000)]
tests/tcg/x86_64: add a PVH crt.o for x86_64 system tests

Instead of doing the full real to 64 bit dance we are attempting to
leverage Xen's PVH boot spec to go from 32 bit to 64 bit.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/tcg: clean-up VPATH/TESTS for i386
Alex Bennée [Tue, 4 Jun 2019 15:30:05 +0000 (16:30 +0100)]
tests/tcg: clean-up VPATH/TESTS for i386

Since we only run build the multiarch tests and we use a fully
resolved path for the crt object we don't need the wildcard or VPATH
messing about.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/tcg: better detect truncated reads
Alex Bennée [Mon, 3 Jun 2019 15:14:24 +0000 (16:14 +0100)]
tests/tcg: better detect truncated reads

If we've truncated a wider read we can detect the condition earlier by
looking at the number of zeros we've read. So we don't trip up on
cases where we have written zeros to the start of the buffer we also
ensure we only start each offset read from the right address.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agocputlb: use uint64_t for interim values for unaligned load
Alex Bennée [Mon, 3 Jun 2019 14:56:32 +0000 (15:56 +0100)]
cputlb: use uint64_t for interim values for unaligned load

When running on 32 bit TCG backends a wide unaligned load ends up
truncating data before returning to the guest. We specifically have
the return type as uint64_t to avoid any premature truncation so we
should use the same for the interim types.

Fixes: https://bugs.launchpad.net/qemu/+bug/1830872
Fixes: eed5664238e
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Tested-by: Igor Mammedov <imammedo@redhat.com>
5 years agosemihosting: split console_out into string and char versions
Alex Bennée [Thu, 30 May 2019 14:35:14 +0000 (15:35 +0100)]
semihosting: split console_out into string and char versions

This is ostensibly to avoid the weirdness of len looking like it might
come from a guest and sometimes being used. While we are at it fix up
the error checking for the arm-linux-user implementation of the API
which got flagged up by Coverity (CID 1401700).

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/vm: python3 fixes
Gerd Hoffmann [Mon, 20 May 2019 12:47:04 +0000 (14:47 +0200)]
tests/vm: python3 fixes

Add proper unicode handling when processing strings.
Also need to explicitly say we want int not float.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190520124716.30472-3-kraxel@redhat.com>
[AJB: fix conflicts with tests/vm: Port basevm to Python 3]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agoscripts: use git archive in archive-source
Gerd Hoffmann [Mon, 20 May 2019 12:47:03 +0000 (14:47 +0200)]
scripts: use git archive in archive-source

Use git archive to create tarballs of qemu and submodules instead of
cloning the repository and the submodules.  This is a order of magnitude
faster because it doesn't fetch the submodules from the internet each
time the script runs.

Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Tested-by: Thomas Huth <thuth@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190520124716.30472-2-kraxel@redhat.com>
[AJB: fixed up tabs]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/vm: Add missing variables on help
Wainer dos Santos Moschetta [Fri, 29 Mar 2019 21:08:04 +0000 (17:08 -0400)]
tests/vm: Add missing variables on help

Added description of variables missing on vm-test help.

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20190329210804.22121-6-wainersm@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agotests/vm: Fix build-centos docker-based tests run
Wainer dos Santos Moschetta [Fri, 29 Mar 2019 21:08:03 +0000 (17:08 -0400)]
tests/vm: Fix build-centos docker-based tests run

`make vm-build-centos` run docker-based tests on CentOS. The
created containers should have network otherwise some tests
fail. Also fixed the BUILD_SCRIPT template to correctly
evaluate "V=1" for verbose output.

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20190329210804.22121-5-wainersm@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/vm: Port basevm to Python 3
Wainer dos Santos Moschetta [Fri, 29 Mar 2019 21:08:01 +0000 (17:08 -0400)]
tests/vm: Port basevm to Python 3

Fixed tests/vm/basevm.py to run with Python 3:
 - hashlib.sha1() requires an binary encoded object.
 - uses floor division ("//") (PEP 238).
 - decode bytes to unicode when needed.

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190329210804.22121-3-wainersm@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agotests/vm: Use python configured on build
Wainer dos Santos Moschetta [Fri, 29 Mar 2019 21:08:00 +0000 (17:08 -0400)]
tests/vm: Use python configured on build

Changed the vm-test makefile to execute python scripts
with the interpreter configured on build. This allows to
run vm-test targets properly in Linux distros with Python 3
only support.

Signed-off-by: Wainer dos Santos Moschetta <wainersm@redhat.com>
Message-Id: <20190329210804.22121-2-wainersm@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years ago.travis.yml: add clang ubsan job
Alex Bennée [Tue, 28 May 2019 18:21:19 +0000 (19:21 +0100)]
.travis.yml: add clang ubsan job

We document this on our wiki and we might as well catch it in our CI
rather than waiting for it to be picked up on merge:

  https://wiki.qemu.org/Testing#clang_UBSan

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years ago.travis.yml: bump gcc sanitiser job to gcc-9
Alex Bennée [Tue, 28 May 2019 18:13:08 +0000 (19:13 +0100)]
.travis.yml: bump gcc sanitiser job to gcc-9

The toolchain PPA has it so we might as well use it. We currently have
to add:

  -Wno-error=stringop-truncation

as there are still strncpy operations in the tree operating on things
that haven't been annotated with QEMU_NONSTRING.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agotests/docker: Update the Ubuntu image to 19.04
Alex Bennée [Wed, 29 May 2019 20:03:01 +0000 (21:03 +0100)]
tests/docker: Update the Ubuntu image to 19.04

This has aged a little and we have a separate LTS image for testing on
the older distros. Update it to a more recent release like its Fedora
cousin.

Besides it is useful to have something with gcc-9 on it for squashing
those stringop truncation errors.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotests/docker: Update the Fedora cross compile images to 30
Alex Bennée [Thu, 30 May 2019 09:52:53 +0000 (10:52 +0100)]
tests/docker: Update the Fedora cross compile images to 30

While at it remove the bogus :latest tag for cris cross compiler. It
tends to break caching and cause confusion.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agotests/docker: Update the Fedora image to Fedora 30
Philippe Mathieu-Daudé [Tue, 28 May 2019 15:33:04 +0000 (17:33 +0200)]
tests/docker: Update the Fedora image to Fedora 30

Fedora 30 got released:

  https://fedoramagazine.org/announcing-fedora-30/

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Tested-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Message-Id: <20190528153304.27157-1-philmd@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agoqemu-io-cmds: use clock_gettime for benchmarking
Alex Bennée [Wed, 29 May 2019 16:16:32 +0000 (17:16 +0100)]
qemu-io-cmds: use clock_gettime for benchmarking

The previous use of gettimeofday() ran into undefined behaviour when
we ended up doing a div 0 for a very short operation. This is because
gettimeofday only works at the microsecond level as well as being
prone to discontinuous jumps in system time. Using clock_gettime with
CLOCK_MONOTONIC gives greater precision and alleviates some of the
potential problems with time jumping around.

We could use CLOCK_MONOTONIC_RAW to avoid being tripped up by NTP and
adjtime but that is Linux specific so I decided it would do for now.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
5 years agoeditorconfig: add setting for shell scripts
Alex Bennée [Thu, 30 May 2019 09:40:28 +0000 (10:40 +0100)]
editorconfig: add setting for shell scripts

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190612' into staging
Peter Maydell [Wed, 12 Jun 2019 13:43:47 +0000 (14:43 +0100)]
Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190612' into staging

ppc patch queue 2019-06-12

Next pull request against qemu-4.1.  The big thing here is adding
support for hot plug of P2P bridges, and PCI devices under P2P bridges
on the "pseries" machine (which doesn't use SHPC).  Other than that
there's just a handful of fixes and small enhancements.

# gpg: Signature made Wed 12 Jun 2019 06:47:56 BST
# gpg:                using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full]
# gpg:                 aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full]
# gpg:                 aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full]
# gpg:                 aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown]
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E  87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-4.1-20190612:
  ppc/xive: Make XIVE generate the proper interrupt types
  ppc/pnv: activate the "dumpdtb" option on the powernv machine
  target/ppc: Use tcg_gen_gvec_bitsel
  spapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridges
  spapr: Direct all PCI hotplug to host bridge, rather than P2P bridge
  spapr: Don't use bus number for building DRC ids
  spapr: Clean up DRC index construction
  spapr: Clean up spapr_drc_populate_dt()
  spapr: Clean up dt creation for PCI buses
  spapr: Clean up device tree construction for PCI devices
  spapr: Clean up device node name generation for PCI devices
  target/ppc: Fix lxvw4x, lxvh8x and lxvb16x
  spapr_pci: Improve error message

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMerge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Peter Maydell [Wed, 12 Jun 2019 12:50:01 +0000 (13:50 +0100)]
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging

Miscellaneous patches for 2019-06-11

# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST
# gpg:                using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg:                issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg:                 aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867  4E5F 3870 B400 EB91 8653

* remotes/armbru/tags/pull-misc-2019-06-11-v3:
  MAINTAINERS: Polish headline decorations
  MAINTAINERS: Improve section headlines
  MAINTAINERS: Remove duplicate entries of qemu-devel@nongnu.org
  Clean up a header guard symbols (again)
  Supply missing header guards
  Clean up a few header guard symbols
  scripts/clean-header-guards: Fix handling of trailing comments
  Normalize position of header guard
  Include qemu-common.h exactly where needed
  Include qemu/module.h where needed, drop it from qemu-common.h
  qemu-common: Move qemu_isalnum() etc. to qemu/ctype.h
  qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoMAINTAINERS: Polish headline decorations
Markus Armbruster [Thu, 6 Jun 2019 17:24:08 +0000 (19:24 +0200)]
MAINTAINERS: Polish headline decorations

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190606172408.18399-4-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agoMAINTAINERS: Improve section headlines
Markus Armbruster [Thu, 6 Jun 2019 17:24:07 +0000 (19:24 +0200)]
MAINTAINERS: Improve section headlines

When scripts/get_maintainer.pl reports something like

    John Doe <jdoe@example.org> (maintainer:Overall)

the user is left to wonder *which* of our three "Overall" sections
applies: the one under "Guest CPU cores (TCG)", or the one under
"Guest CPU Cores (KVM)", or the one under "Usermode emulation".

Rename sections under

* "Guest CPU cores (TCG)" from "FOO" to "FOO TCG CPUs"

* "Guest CPU Cores (KVM)" from "FOO" to "FOO KVM CPUs"

* "Guest CPU Cores (Xen)" from "FOO" to "FOO Xen CPUs"

* "Architecture support" from "FOO" to "FOO general architecture
  support"

* "Usermode Emulation" from "Overall" to "Overall usermode emulation"

* "Tiny Code Generator (TCG)" from "FOO target" to "FOO TCG target",
  and from "Common code" to "Common TCG code"

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190606172408.18399-3-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agoMAINTAINERS: Remove duplicate entries of qemu-devel@nongnu.org
Philippe Mathieu-Daudé [Fri, 7 Jun 2019 14:27:20 +0000 (16:27 +0200)]
MAINTAINERS: Remove duplicate entries of qemu-devel@nongnu.org

The list is always selected by the 'All patches CC here' section.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[Conflicts resolved by redoing the patch]
Signed-off-by: Markus Armbruster <armbru@redhat.com>
5 years agoClean up a header guard symbols (again)
Markus Armbruster [Fri, 7 Jun 2019 14:13:21 +0000 (16:13 +0200)]
Clean up a header guard symbols (again)

Commit d52c454aad "contrib: add vhost-user-gpu" and "c68082c43a
virtio-gpu: split virtio-gpu-pci & virtio-vga" created headers with
unusual header guard symbols.  Clean them up

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190607141321.9726-1-armbru@redhat.com>

5 years agoSupply missing header guards
Markus Armbruster [Tue, 4 Jun 2019 18:16:18 +0000 (20:16 +0200)]
Supply missing header guards

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190604181618.19980-5-armbru@redhat.com>

5 years agoClean up a few header guard symbols
Markus Armbruster [Tue, 4 Jun 2019 18:16:17 +0000 (20:16 +0200)]
Clean up a few header guard symbols

Commit 58ea30f5145 "Clean up header guards that don't match their file
name" messed up contrib/elf2dmp/qemu_elf.h and
tests/migration/migration-test.h.

It missed target/cris/opcode-cris.h and
tests/uefi-test-tools/UefiTestToolsPkg/Include/Guid/BiosTablesTest.h
due to the scripts/clean-header-guards.pl bug fixed in the previous
commit.

Commit a8b991b52dc "Clean up ill-advised or unusual header guards"
missed include/hw/xen/io/ring.h for the same reason.

Commit 3979fca4b69 "disas: Rename include/disas/bfd.h back to
include/disas/dis-asm.h" neglected to update the guard symbol for the
rename.

Commit a331c6d7741 "semihosting: implement a semihosting console"
created include/hw/semihosting/console.h with an ill-advised guard
symbol.

Clean them up.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190604181618.19980-4-armbru@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
5 years agoscripts/clean-header-guards: Fix handling of trailing comments
Markus Armbruster [Tue, 4 Jun 2019 18:16:16 +0000 (20:16 +0200)]
scripts/clean-header-guards: Fix handling of trailing comments

clean-header-guards.pl fails to recognize a header guard #endif when
it's followed by a // comment, or multiple comments.  Fix that.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190604181618.19980-3-armbru@redhat.com>

5 years agoNormalize position of header guard
Markus Armbruster [Tue, 4 Jun 2019 18:16:15 +0000 (20:16 +0200)]
Normalize position of header guard

This is the common header guard idiom:

    /*
     * File comment
     */

    #ifndef GUARD_SYMBOL_H
    #define GUARD_SYMBOL_H

    ... actual contents ...

    #endif

A few of our headers have some #include before the guard.
target/tilegx/spr_def_64.h has #ifndef __DOXYGEN__ outside the guard.
A few more have the #define elsewhere.

Change them to match the common idiom.  For spr_def_64.h, that means
dropping #ifndef __DOXYGEN__.  While there, rename guard symbols to
make scripts/clean-header-guards.pl happy.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190604181618.19980-2-armbru@redhat.com>
[Rebased with conflicts resolved automatically]

5 years agoInclude qemu-common.h exactly where needed
Markus Armbruster [Thu, 23 May 2019 14:35:08 +0000 (16:35 +0200)]
Include qemu-common.h exactly where needed

No header includes qemu-common.h after this commit, as prescribed by
qemu-common.h's file comment.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-5-armbru@redhat.com>
[Rebased with conflicts resolved automatically, except for
include/hw/arm/xlnx-zynqmp.h hw/arm/nrf51_soc.c hw/arm/msf2-soc.c
block/qcow2-refcount.c block/qcow2-cluster.c block/qcow2-cache.c
target/arm/cpu.h target/lm32/cpu.h target/m68k/cpu.h target/mips/cpu.h
target/moxie/cpu.h target/nios2/cpu.h target/openrisc/cpu.h
target/riscv/cpu.h target/tilegx/cpu.h target/tricore/cpu.h
target/unicore32/cpu.h target/xtensa/cpu.h; bsd-user/main.c and
net/tap-bsd.c fixed up]

5 years agoInclude qemu/module.h where needed, drop it from qemu-common.h
Markus Armbruster [Thu, 23 May 2019 14:35:07 +0000 (16:35 +0200)]
Include qemu/module.h where needed, drop it from qemu-common.h

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-4-armbru@redhat.com>
[Rebased with conflicts resolved automatically, except for
hw/usb/dev-hub.c hw/misc/exynos4210_rng.c hw/misc/bcm2835_rng.c
hw/misc/aspeed_scu.c hw/display/virtio-vga.c hw/arm/stm32f205_soc.c;
ui/cocoa.m fixed up]

5 years agoMerge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request' into...
Peter Maydell [Wed, 12 Jun 2019 10:49:08 +0000 (11:49 +0100)]
Merge remote-tracking branch 'remotes/ehabkost/tags/python-next-pull-request' into staging

Python queue, 2019-06-11

* New boot_linux_console test cases (Philippe Mathieu-Daudé)
* Make check-acceptance Travis job more verbose (Eduardo Habkost)

# gpg: Signature made Tue 11 Jun 2019 18:13:35 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/python-next-pull-request:
  travis: Make check-acceptance job more verbose
  BootLinuxConsoleTest: Run kerneltests BusyBox on Malta
  BootLinuxConsoleTest: Test nanoMIPS kernels on the I7200 CPU
  BootLinuxConsoleTest: Test the SmartFusion2 board
  BootLinuxConsoleTest: Do not log empty lines
  tests/boot_linux_console: Let extract_from_deb handle various compressions

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoppc/xive: Make XIVE generate the proper interrupt types
Benjamin Herrenschmidt [Thu, 6 Jun 2019 17:44:09 +0000 (19:44 +0200)]
ppc/xive: Make XIVE generate the proper interrupt types

It should be generic Hypervisor Virtualization interrupts for HV
directed rings and traditional External Interrupts for the OS directed
ring.

Don't generate anything for the user ring as it isn't actually
supported.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20190606174409.12502-1-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
5 years agoppc/pnv: activate the "dumpdtb" option on the powernv machine
Cédric Le Goater [Thu, 6 Jun 2019 17:47:32 +0000 (19:47 +0200)]
ppc/pnv: activate the "dumpdtb" option on the powernv machine

This is a good way to debug the DT creation for current PowerNV
machines and new ones to come.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190606174732.13051-1-clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
5 years agotarget/ppc: Use tcg_gen_gvec_bitsel
Richard Henderson [Mon, 3 Jun 2019 16:49:27 +0000 (11:49 -0500)]
target/ppc: Use tcg_gen_gvec_bitsel

Replace the target-specific implementation of XXSEL.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20190603164927.8336-1-richard.henderson@linaro.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
5 years agospapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridges
David Gibson [Fri, 5 Apr 2019 05:34:19 +0000 (16:34 +1100)]
spapr: Allow hot plug/unplug of PCI bridges and devices under PCI bridges

The pseries machine type already allows PCI hotplug and unplug via the
PAPR mechanism, but only on the root bus of each PHB.  This patch extends
this to allow PCI to PCI bridges to be hotplugged, and devices to be
hotplugged or unplugged under P2P bridges.

For now we disallow hot unplugging P2P bridges.  I tried doing that, but
haven't managed to get it working, I think due to some guest side problems
that need further investigation.

To do this we dynamically construct DRCs when bridges are hot (or cold)
added, which can in turn be used to hotplug devices under the bridge.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Direct all PCI hotplug to host bridge, rather than P2P bridge
David Gibson [Fri, 15 Feb 2019 05:50:40 +0000 (16:50 +1100)]
spapr: Direct all PCI hotplug to host bridge, rather than P2P bridge

A P2P bridge will attempt to handle the hotplug with SHPC, which doesn't
work in the PAPR environment.  Instead we want to direct all PCI hotplug
actions to the PAPR specific host bridge which will use the PAPR hotplug
mechanism.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Don't use bus number for building DRC ids
David Gibson [Wed, 10 Apr 2019 01:49:28 +0000 (11:49 +1000)]
spapr: Don't use bus number for building DRC ids

DRC ids are more or less arbitrary, as long as they're consistent.  For
PCI, we notionally build them from the phb's index along with PCI bus
number, slot and function number.

Using bus number is broken, however, because it can change if the guest
re-enumerates the PCI topology for whatever reason (e.g. due to hotplug
of a bridge, which we don't support yet but want to).

Fortunately, there's an alternative.  Bridges are required to have a unique
non-zero "chassis number" that we can use instead.  Adjust the code to
use that instead.

This looks like it would introduce a guest visible breaking change, but
in fact it does not because we don't yet ever use non-zero bus numbers.
Both chassis and bus number are always 0 for the root bus, so there's no
change for the existing cases.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Clean up DRC index construction
David Gibson [Fri, 5 Apr 2019 04:51:00 +0000 (15:51 +1100)]
spapr: Clean up DRC index construction

spapr_pci.c currently has several confusingly similarly named functions for
various conversions between representations of DRCs.  Make things clearer
by renaming things in a more consistent XXX_from_YYY() manner and remove
some called-only-once variants in favour of open coding.

While we're at it, move this code together in the file to avoid some extra
forward references, and split out construction and removal of DRCs for the
host bridge into helper functions.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Clean up spapr_drc_populate_dt()
David Gibson [Wed, 10 Apr 2019 06:11:40 +0000 (16:11 +1000)]
spapr: Clean up spapr_drc_populate_dt()

This makes some minor cleanups to spapr_drc_populate_dt(), renaming it to
the shorter and more idiomatic spapr_dt_drc() along the way.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Clean up dt creation for PCI buses
David Gibson [Fri, 5 Apr 2019 02:31:48 +0000 (13:31 +1100)]
spapr: Clean up dt creation for PCI buses

Device nodes for PCI bridges (both host and P2P) describe both the bridge
device itself and the bus hanging off it, handling of this is a bit of a
mess.

spapr_dt_pci_device() has a few things it only adds for non-bridges, but
always adds #address-cells and #size-cells which should only appear for
bridges.  But the walking down the subordinate PCI bus is done in one of
its callers spapr_populate_pci_devices_dt().  The PHB dt creation in
spapr_populate_pci_dt() open codes some similar logic to the bridge case.

This patch consolidates things in a bunch of ways:
 * Bus specific dt info is now created in spapr_dt_pci_bus() used for both
   P2P bridges and the host bridge.  This includes walking subordinate
   devices
 * spapr_dt_pci_device() now calls spapr_dt_pci_bus() when called on a
   P2P bridge
 * We do detection of bridges with the is_bridge field of the device class,
   rather than checking PCI config space directly, for consistency with
   qemu's core PCI code.
 * Several things are renamed for brevity and clarity

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Clean up device tree construction for PCI devices
David Gibson [Fri, 22 Mar 2019 05:17:14 +0000 (16:17 +1100)]
spapr: Clean up device tree construction for PCI devices

spapr_create_pci_child_dt() is a trivial wrapper around
spapr_populate_pci_child_dt(), but is the latter's only caller.  So fold
them together into spapr_dt_pci_device(), which closer matches our modern
naming convention.

While there, make a number of cleanups to the function itself.  This is
mostly using more temporary locals to avoid awkwardly long lines, and in
some cases avoiding double reads of PCI config space variables.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agospapr: Clean up device node name generation for PCI devices
David Gibson [Fri, 22 Mar 2019 05:13:09 +0000 (16:13 +1100)]
spapr: Clean up device node name generation for PCI devices

spapr_populate_pci_child_dt() adds a 'name' property to the device tree
node for PCI devices.  This is never necessary for a flattened device tree,
it is implicit in the name added when the node is constructed.  In fact
anything we do add to a 'name' property will be overwritten with something
derived from the structural name in the guest firmware (but in fact it is
exactly the same bytes).

So, remove that.  In addition, pci_get_node_name() is very simple, so fold
it into its (also simple) sole caller spapr_create_pci_child_dt().

While we're there rename pci_find_device_name() to the shorter and more
accurate dt_name_from_class().

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
5 years agotarget/ppc: Fix lxvw4x, lxvh8x and lxvb16x
Anton Blanchard [Fri, 24 May 2019 06:53:45 +0000 (07:53 +0100)]
target/ppc: Fix lxvw4x, lxvh8x and lxvb16x

During the conversion these instructions were incorrectly treated as
stores. We need to use set_cpu_vsr* and not get_cpu_vsr*.

Fixes: 8b3b2d75c7c0 ("introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}() helpers for VSR register access")
Signed-off-by: Anton Blanchard <anton@ozlabs.org>
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Tested-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <20190524065345.25591-1-mark.cave-ayland@ilande.co.uk>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
5 years agospapr_pci: Improve error message
Greg Kurz [Wed, 29 May 2019 17:15:09 +0000 (19:15 +0200)]
spapr_pci: Improve error message

Every PHB must have a unique index. This is checked at realize but when
a duplicate index is detected, an error message mentioning BUIDs is
printed. This doesn't help much, especially since BUID is an internal
concept that is no longer exposed to the user.

Fix the message to mention the index property instead of BUID. As a bonus
print a list of indexes already in use.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <155915010892.2061314.10485622810149098411.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
5 years agoqemu-common: Move qemu_isalnum() etc. to qemu/ctype.h
Markus Armbruster [Thu, 23 May 2019 14:35:06 +0000 (16:35 +0200)]
qemu-common: Move qemu_isalnum() etc. to qemu/ctype.h

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-3-armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
5 years agoqemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Markus Armbruster [Thu, 23 May 2019 14:35:05 +0000 (16:35 +0200)]
qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h

Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h,
sysemu/kvm.h, sysemu/whpx.h.  Only tcg_enabled() & friends sit in
qemu-common.h.  This necessitates inclusion of qemu-common.h into
headers, which is against the rules spelled out in qemu-common.h's
file comment.

Move tcg_enabled() & friends into their own header sysemu/tcg.h, and
adjust #include directives.

Cc: Richard Henderson <rth@twiddle.net>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20190523143508.25387-2-armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
[Rebased with conflicts resolved automatically, except for
accel/tcg/tcg-all.c]

5 years agotravis: Make check-acceptance job more verbose
Eduardo Habkost [Fri, 24 May 2019 21:25:22 +0000 (18:25 -0300)]
travis: Make check-acceptance job more verbose

It will help us debug issues when tests fail.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoBootLinuxConsoleTest: Run kerneltests BusyBox on Malta
Philippe Mathieu-Daudé [Mon, 20 May 2019 23:19:09 +0000 (01:19 +0200)]
BootLinuxConsoleTest: Run kerneltests BusyBox on Malta

This tests boots a Linux kernel on a Malta machine up to a
busybox shell on the serial console. Few commands are executed
before halting the machine (via reboot).

We use the initrd cpio image from the kerneltests project:
https://kerneltests.org/

If MIPS is a target being built, "make check-acceptance" will
automatically include this test by the use of the "arch:mips" tags.

Alternatively, this test can be run using:

  $ avocado --show=console run -t arch:mips tests/acceptance/boot_linux_console.py
  [...]
  console: Boot successful.
  [...]
  console: / # uname -a
  console: Linux buildroot 4.5.0-2-4kc-malta #1 Debian 4.5.5-1 (2016-05-29) mips GNU/Linux
  console: / # reboot
  console: / # reboot: Restarting system

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20190520231910.12184-4-f4bug@amsat.org>
Acked-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoBootLinuxConsoleTest: Test nanoMIPS kernels on the I7200 CPU
Philippe Mathieu-Daudé [Mon, 20 May 2019 23:19:08 +0000 (01:19 +0200)]
BootLinuxConsoleTest: Test nanoMIPS kernels on the I7200 CPU

Similar to the x86_64/pc test, it boots a Linux kernel on a Malta
machine and verify the serial is working.

Use the documentation added in commit f7d257cb4a17 to test
nanoMIPS kernels and the I7200 CPU.

This test can be run using:

  $ avocado --show=console run -t arch:mipsel tests/acceptance/boot_linux_console.py
  console: [    0.000000] Linux version 4.15.18-00432-gb2eb9a8b (emubuild@mipscs563) (gcc version 6.3.0 (Codescape GNU Tools 2018.04-02 for nanoMIPS Linux)) #1 SMP Wed Jun 27 11:10:08 PDT 2018
  console: [    0.000000] GCRs appear to have been moved (expected them at 0x1fbf8000)!
  console: [    0.000000] GCRs appear to have been moved (expected them at 0x1fbf8000)!
  console: [    0.000000] CPU0 revision is: 00010000 (MIPS GENERIC QEMU)
  console: [    0.000000] MIPS: machine is mti,malta
  console: [    0.000000] Determined physical RAM map:
  console: [    0.000000]  memory: 08000000 @ 00000000 (usable)
  console: [    0.000000] earlycon: ns16550a0 at I/O port 0x3f8 (options '38400n8')
  console: [    0.000000] bootconsole [ns16550a0] enabled
  console: [    0.000000] User-defined physical RAM map:
  console: [    0.000000]  memory: 10000000 @ 00000000 (usable)
  console: [    0.000000] Initrd not found or empty - disabling initrd
  console: [    0.000000] MIPS CPS SMP unable to proceed without a CM
  console: [    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
  console: [    0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
  console: [    0.000000] This processor doesn't support highmem. -262144k highmem ignored
  console: [    0.000000] Zone ranges:
  console: [    0.000000]   Normal   [mem 0x0000000000000000-0x000000000fffffff]
  console: [    0.000000]   HighMem  empty
  console: [    0.000000] Movable zone start for each node
  console: [    0.000000] Early memory node ranges
  console: [    0.000000]   node   0: [mem 0x0000000000000000-0x000000000fffffff]
  console: [    0.000000] Initmem setup node 0 [mem 0x0000000000000000-0x000000000fffffff]
  console: [    0.000000] random: get_random_bytes called from start_kernel+0x60/0x2f0 with crng_init=0
  console: [    0.000000] percpu: Embedded 16 pages/cpu @(ptrval) s36620 r8192 d20724 u65536
  console: [    0.000000] Built 1 zonelists, mobility grouping on.  Total pages: 64960
  console: [    0.000000] Kernel command line: printk.time=0 mem=256m@@0x0 console=ttyS0 earlycon

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20190520231910.12184-3-f4bug@amsat.org>
Acked-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoBootLinuxConsoleTest: Test the SmartFusion2 board
Philippe Mathieu-Daudé [Mon, 20 May 2019 22:06:35 +0000 (00:06 +0200)]
BootLinuxConsoleTest: Test the SmartFusion2 board

Similar to the x86_64/pc test, it boots a Linux kernel on an
Emcraft board and verify the serial is working.

If ARM is a target being built, "make check-acceptance" will
automatically include this test by the use of the "arch:arm" tags.

Alternatively, this test can be run using:

  $ avocado run -t arch:arm tests/acceptance
  $ avocado run -t machine:emcraft_sf2 tests/acceptance

Based on the recommended test setup from Subbaraya Sundeep:
https://lists.gnu.org/archive/html/qemu-devel/2017-05/msg03810.html

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20190520220635.10961-3-f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoBootLinuxConsoleTest: Do not log empty lines
Philippe Mathieu-Daudé [Mon, 20 May 2019 22:06:34 +0000 (00:06 +0200)]
BootLinuxConsoleTest: Do not log empty lines

Avoid to log empty lines in console debug logs.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20190520220635.10961-2-f4bug@amsat.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Tested-by: Cleber Rosa <crosa@redhat.com>
Acked-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agotests/boot_linux_console: Let extract_from_deb handle various compressions
Philippe Mathieu-Daudé [Tue, 12 Mar 2019 23:45:40 +0000 (00:45 +0100)]
tests/boot_linux_console: Let extract_from_deb handle various compressions

Debian binary package format supports various compressions.

Per man deb(5):

  NAME
    deb - Debian binary package format

  FORMAT
    ...
    The third, last required member is named data.tar.  It contains the
    filesystem as a tar archive, either not compressed (supported since
    dpkg 1.10.24), or compressed with gzip (with .gz extension),
    xz (with .xz extension, supported since dpkg 1.15.6),
    bzip2 (with .bz2 extension, supported since dpkg 1.10.24) or
    lzma (with .lzma extension, supported since dpkg 1.13.25).

List the archive files to have the 3rd name with the correct extension.

The function avocado.utils.archive.extract() will handle the different
compression format for us.

Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20190312234541.2887-2-philmd@redhat.com>
Reviewed-by: Cleber Rosa <crosa@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoMerge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging
Peter Maydell [Tue, 11 Jun 2019 15:02:07 +0000 (16:02 +0100)]
Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging

x86 queue, 2019-06-11

* "unavailable-features" QOM property (Eduardo Habkost)
* Save EFER for 32-bit targets (Pavel Dovgalyuk)

# gpg: Signature made Tue 11 Jun 2019 14:41:45 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  i386: Save EFER for 32-bit targets
  i386: "unavailable-features" QOM property
  i386: x86_cpu_list_feature_names() function

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agoi386: Save EFER for 32-bit targets
Pavel Dovgalyuk [Wed, 29 May 2019 12:41:56 +0000 (15:41 +0300)]
i386: Save EFER for 32-bit targets

i386 (32 bit) emulation uses EFER in wrmsr and in MMU fault
processing.
But it does not included in VMState, because "efer" field is disabled with

This patch adds a section for 32-bit targets which saves EFER when
it's value is non-zero.

Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Message-Id: <155913371654.8429.1659082639780315242.stgit@pasha-Precision-3630-Tower>
Reviewed-by: Peter Xu <peterx@redhat.com>
[ehabkost: indentation fix]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoi386: "unavailable-features" QOM property
Eduardo Habkost [Mon, 22 Apr 2019 23:47:42 +0000 (20:47 -0300)]
i386: "unavailable-features" QOM property

Add a "unavailable-features" QOM property to X86CPU objects that
have the same semantics of "unavailable-features" on
query-cpu-definitions.  The new property has the same goal of
"filtered-features", but is generic enough to let any kind of CPU
feature to be listed there without relying on low level details
like CPUID leaves or MSR numbers.

Message-Id: <20190422234742.15780-3-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoi386: x86_cpu_list_feature_names() function
Eduardo Habkost [Mon, 22 Apr 2019 23:47:41 +0000 (20:47 -0300)]
i386: x86_cpu_list_feature_names() function

Extract feature name listing code from
x86_cpu_class_check_missing_features().  It will be reused to
return information about CPU filtered features at runtime.

Message-Id: <20190422234742.15780-2-ehabkost@redhat.com>
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
5 years agoMerge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190610' into staging
Peter Maydell [Mon, 10 Jun 2019 15:09:19 +0000 (16:09 +0100)]
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20190610' into staging

Move softmmu tlb into CPUNegativeOffsetState

# gpg: Signature made Mon 10 Jun 2019 15:07:55 BST
# gpg:                using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg:                issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A  05C0 64DF 38E8 AF7E 215F

* remotes/rth/tags/pull-tcg-20190610: (39 commits)
  tcg/arm: Remove mostly unreachable tlb special case
  tcg/arm: Use LDRD to load tlb mask+table
  tcg/aarch64: Use LDP to load tlb mask+table
  cpu: Remove CPU_COMMON
  cpu: Move the softmmu tlb to CPUNegativeOffsetState
  cpu: Move icount_decr to CPUNegativeOffsetState
  cpu: Introduce CPUNegativeOffsetState
  cpu: Introduce cpu_set_cpustate_pointers
  cpu: Move ENV_OFFSET to exec/gen-icount.h
  target/xtensa: Use env_cpu, env_archcpu
  target/unicore32: Use env_cpu, env_archcpu
  target/tricore: Use env_cpu
  target/tilegx: Use env_cpu
  target/sparc: Use env_cpu, env_archcpu
  target/sh4: Use env_cpu, env_archcpu
  target/s390x: Use env_cpu, env_archcpu
  target/riscv: Use env_cpu, env_archcpu
  target/ppc: Use env_cpu, env_archcpu
  target/openrisc: Use env_cpu, env_archcpu
  target/nios2: Use env_cpu, env_archcpu
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
5 years agotcg/arm: Remove mostly unreachable tlb special case
Richard Henderson [Tue, 7 May 2019 17:33:44 +0000 (10:33 -0700)]
tcg/arm: Remove mostly unreachable tlb special case

There was nothing armv7 specific about the bic+cmp sequence, however
looking at the set of guests more closely shows that the 8-bit immediate
operand for the bic can only be satisfied with one guest in tree:
baseline m-profile -- 10-bit pages with aligned 4-byte memory ops.
Therefore it does not seem useful to keep this path.

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/arm: Use LDRD to load tlb mask+table
Richard Henderson [Sat, 23 Mar 2019 07:46:23 +0000 (00:46 -0700)]
tcg/arm: Use LDRD to load tlb mask+table

This changes the code generation for the tlb from e.g.

ldr      ip, [r6, #-0x10]
ldr      r2, [r6, #-0xc]
and      ip, ip, r4, lsr #8
ldrd     r0, r1, [r2, ip]!
ldr      r2, [r2, #0x18]

to

ldrd     r0, r1, [r6, #-0x10]
and      r0, r0, r4, lsr #8
ldrd     r2, r3, [r1, r0]!
ldr      r1, [r1, #0x18]

for armv7 hosts.  Rearranging the register allocation in
order to avoid overlap between the two ldrd pairs causes
the patch to be larger than it ordinarily would be.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotcg/aarch64: Use LDP to load tlb mask+table
Richard Henderson [Sat, 23 Mar 2019 06:35:26 +0000 (23:35 -0700)]
tcg/aarch64: Use LDP to load tlb mask+table

This changes the code generation for the tlb from e.g.

ldur     x0, [x19, #0xffffffffffffffe0]
ldur     x1, [x19, #0xffffffffffffffe8]
and      x0, x0, x20, lsr #8
add      x1, x1, x0
ldr      x0, [x1]
ldr      x1, [x1, #0x18]

to

ldp      x0, x1, [x19, #-0x20]
and      x0, x0, x20, lsr #8
add      x1, x1, x0
ldr      x0, [x1]
ldr      x1, [x1, #0x18]

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocpu: Remove CPU_COMMON
Richard Henderson [Sat, 23 Mar 2019 18:35:53 +0000 (11:35 -0700)]
cpu: Remove CPU_COMMON

This macro is now always empty, so remove it.  This leaves the
entire contents of CPUArchState under the control of the guest
architecture.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocpu: Move the softmmu tlb to CPUNegativeOffsetState
Richard Henderson [Sat, 23 Mar 2019 05:03:39 +0000 (22:03 -0700)]
cpu: Move the softmmu tlb to CPUNegativeOffsetState

We have for some time had code within the tcg backends to
handle large positive offsets from env.  This move makes
sure that need not happen.  Indeed, we are able to assert
at build time that simple offsets suffice for all hosts.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocpu: Move icount_decr to CPUNegativeOffsetState
Richard Henderson [Thu, 28 Mar 2019 21:54:23 +0000 (11:54 -1000)]
cpu: Move icount_decr to CPUNegativeOffsetState

Amusingly, we had already ignored the comment to keep this value
at the end of CPUState.  This restores the minimum negative offset
from TCG_AREG0 for code generation.

For the couple of uses within qom/cpu.c, without NEED_CPU_H, add
a pointer from the CPUState object to the IcountDecr object within
CPUNegativeOffsetState.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocpu: Introduce CPUNegativeOffsetState
Richard Henderson [Sat, 23 Mar 2019 00:16:06 +0000 (17:16 -0700)]
cpu: Introduce CPUNegativeOffsetState

Nothing in there so far, but all of the plumbing done
within the target ArchCPU state.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocpu: Introduce cpu_set_cpustate_pointers
Richard Henderson [Thu, 28 Mar 2019 21:26:22 +0000 (11:26 -1000)]
cpu: Introduce cpu_set_cpustate_pointers

Consolidate some boilerplate from foo_cpu_initfn.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agocpu: Move ENV_OFFSET to exec/gen-icount.h
Richard Henderson [Sat, 23 Mar 2019 00:00:56 +0000 (17:00 -0700)]
cpu: Move ENV_OFFSET to exec/gen-icount.h

Now that we have ArchCPU, we can define this generically,
in the one place that needs it.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/xtensa: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:52:17 +0000 (19:52 -0700)]
target/xtensa: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace xtensa_env_get_cpu with env_archcpu.  The combination
CPU(xtensa_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Move cpu_get_tb_cpu_state below the include of "exec/cpu-all.h"
so that the definition of env_cpu is available.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/unicore32: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:46:31 +0000 (19:46 -0700)]
target/unicore32: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace uc32_env_get_cpu with env_archcpu.  The combination
CPU(uc32_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/tricore: Use env_cpu
Richard Henderson [Sat, 23 Mar 2019 02:39:59 +0000 (19:39 -0700)]
target/tricore: Use env_cpu

Cleanup in the boilerplate that each target must define.
Replace tricore_env_get_cpu with env_archcpu.  The combination
CPU(tricore_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/tilegx: Use env_cpu
Richard Henderson [Sat, 23 Mar 2019 02:38:33 +0000 (19:38 -0700)]
target/tilegx: Use env_cpu

Cleanup in the boilerplate that each target must define.
Replace tilegx_env_get_cpu with env_archcpu.  The combination
CPU(tilegx_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/sparc: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:36:20 +0000 (19:36 -0700)]
target/sparc: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace sparc_env_get_cpu with env_archcpu.  The combination
CPU(sparc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/sh4: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:26:42 +0000 (19:26 -0700)]
target/sh4: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace sh_env_get_cpu with env_archcpu.  The combination
CPU(sh_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/s390x: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:21:48 +0000 (19:21 -0700)]
target/s390x: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace s390_env_get_cpu with env_archcpu.  The combination
CPU(s390_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/riscv: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:11:37 +0000 (19:11 -0700)]
target/riscv: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace riscv_env_get_cpu with env_archcpu.  The combination
CPU(riscv_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/ppc: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 02:07:57 +0000 (19:07 -0700)]
target/ppc: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace ppc_env_get_cpu with env_archcpu.  The combination
CPU(ppc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/openrisc: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 01:48:56 +0000 (18:48 -0700)]
target/openrisc: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace openrisc_env_get_cpu with env_archcpu.  The combination
CPU(openrisc_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
5 years agotarget/nios2: Use env_cpu, env_archcpu
Richard Henderson [Sat, 23 Mar 2019 01:44:44 +0000 (18:44 -0700)]
target/nios2: Use env_cpu, env_archcpu

Cleanup in the boilerplate that each target must define.
Replace nios2_env_get_cpu with env_archcpu.  The combination
CPU(nios2_env_get_cpu) should have used ENV_GET_CPU to begin;
use env_cpu now.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>