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2018-05-14 | Richard Henderson | target/openrisc: Merge disas_openrisc_insn Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_float Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_compi Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_comp Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_M Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_logic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_mac Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert dec_calc Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert remainder of dec_misc insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert memory insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Convert branch insns Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target/openrisc: Start conversion to decodetree.py Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-14 | Richard Henderson | target-openrisc: Write back result before FPE exception Signed-off-by: Richard Henderson <rth@twiddle.net> |
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2018-05-14 | Richard Henderson | target/s390x: Fix brace Werror with clang 6.0.0 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-11 | Richard Henderson | target/m68k: Fix build Werror with gcc 8.0.1 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Clear SVE high bits for FMOV Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Fix float16 to/from int16 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Implement vector shifted FCVT for fp16 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Implement vector shifted SCVF/UCVF for... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Enable ARM_FEATURE_V8_ATOMICS for user... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Implement CAS and CASP Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Fill in disas_ldst_atomic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/riscv: Use new atomic min/max expanders Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | tcg: Use GEN_ATOMIC_HELPER_FN for opposite endian atomic add Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | tcg: Introduce atomic helpers for integer min/max Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/xtensa: Use new min/max expanders Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | target/arm: Use new min/max expanders Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-10 | Richard Henderson | tcg: Introduce helpers for integer min/max Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-09 | Richard Henderson | tcg: Limit the number of ops in a TB Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-04 | Richard Henderson | target/arm: Tidy condition in disas_simd_two_reg_misc Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-04 | Richard Henderson | target/arm: Tidy conditions in handle_vec_simd_shri Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-01 | Richard Henderson | tcg: Improve TCGv_ptr support Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-01 | Richard Henderson | tcg: Allow wider vectors for cmp and mul Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-05-01 | Richard Henderson | tcg: Document INDEX_mul[us]h_* Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-04-17 | Richard Henderson | fpu: Bound increment for scalbn Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-04-10 | Richard Henderson | fpu: Fix rounding mode for floatN_to_uintM_round_to_zero Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-04-10 | Richard Henderson | tcg: Introduce tcg_set_insn_start_param Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-04-06 | Richard Henderson | Update seabios-hppa |
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2018-04-06 | Richard Henderson | tcg: Fix out-of-line generic vector compares Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-28 | Richard Henderson | tcg: Mark muluh_i64 and mulsh_i64 as 64-bit ops Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-26 | Richard Henderson | target/hppa: Include priv level in user-only iaoq Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-26 | Richard Henderson | tcg: Really fix cpu_io_recompile Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-15 | Richard Henderson | tcg: Add choose_vector_size Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-15 | Richard Henderson | tcg/i386: Support INDEX_op_dup2_vec for -m32 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-15 | Richard Henderson | tcg: Improve tcg_gen_muli_i32/i64 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-09 | Richard Henderson | aarch64-linux-user: Add support for SVE signal frame... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-09 | Richard Henderson | aarch64-linux-user: Add support for EXTRA signal frame... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-09 | Richard Henderson | aarch64-linux-user: Remove struct target_aux_context Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-09 | Richard Henderson | aarch64-linux-user: Split out helpers for guest signal... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-09 | Richard Henderson | linux-user: Implement aarch64 PR_SVE_SET/GET_VL Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Enable ARM_FEATURE_V8_FCMA Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode t32 simd 3reg and 2reg_scalar extension Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa32 armv8.3 2-reg-index Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa32 armv8.3 3-same Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa64 armv8.3 fcmla Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa64 armv8.3 fcadd Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Add ARM_FEATURE_V8_FCMA Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Enable ARM_FEATURE_V8_RDM Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa32 armv8.1 two reg and a scalar Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa32 armv8.1 three same Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa64 armv8.1 scalar/vector x indexed... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa64 armv8.1 three same extra Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Decode aa64 armv8.1 scalar three same extra Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Refactor disas_simd_indexed size checks Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Refactor disas_simd_indexed decode Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | target/arm: Add ARM_FEATURE_V8_RDM Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-03-02 | Richard Henderson | decodetree: Propagate return value from translate subroutines Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-22 | Richard Henderson | scripts: Add decodetree.py Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-15 | Richard Henderson | target/arm: Handle SVE registers when using clear_vec_high Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-15 | Richard Henderson | target/arm: Enforce access to ZCR_EL at translation Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-15 | Richard Henderson | target/arm: Suppress TB end for FPCR/FPSR Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-15 | Richard Henderson | target/arm: Enforce FP access to FPCR/FPSR Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-15 | Richard Henderson | target/arm: Remove ARM_CP_64BIT from ZCR_EL registers Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-09 | Richard Henderson | target/arm: Add SVE state to TB->FLAGS Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-09 | Richard Henderson | target/arm: Add ZCR_ELx Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-09 | Richard Henderson | target/arm: Add SVE to migration state Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-09 | Richard Henderson | target/arm: Add predicate registers for SVE Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-09 | Richard Henderson | target/arm: Expand vector registers for SVE Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg/aarch64: Add vector operations Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg/i386: Add vector operations Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 orr... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 multiplies Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 compares Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 constant... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 dup... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 mov... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Use vector infrastructure for aa64 add... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | target/arm: Align vector registers Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg/optimize: Handle vector opcodes during optimize Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add generic vector helpers with a scalar operand Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add generic helpers for saturating arithmetic Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add generic vector ops for multiplication Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add generic vector ops for comparisons Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add generic vector ops for constant shifts Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add generic vector expanders Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Standardize integral arguments to expanders Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Add types and basic operations for host vectors Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-08 | Richard Henderson | tcg: Allow multiple word entries into the constant... Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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2018-02-04 | Richard Henderson | roms/seabios-hppa: Update submodule and image Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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