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tcg: Add markup for output requires new register
2017-01-10 Richard Hendersontcg: Add markup for output requires new register
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/optimize: Fold movcond 0/1 into setcond
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontarget-s390x: Use the new deposit and extract ops
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontarget-ppc: Use the new deposit and extract ops
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontarget-mips: Use the new extract op
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontarget-i386: Use new deposit and extract ops
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontarget-arm: Use new deposit and extract ops
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontarget-alpha: Use deposit and extract ops
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/s390: Support deposit into zero
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/s390: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/s390: Expose host facilities to tcg-target.h
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/ppc: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/mips: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/i386: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/arm: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/arm: Move isa detection to tcg-target.h
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg/aarch64: Implement field extraction opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg: Add deposit_z expander
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg: Minor adjustments to deposit expanders
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-10 Richard Hendersontcg: Add field extraction primitives
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-08 Richard Hendersontranslate-all: Avoid -Werror=switch-bool
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Adjust qemu_ld/st for mips64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Adjust calling conventions for mips64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Add tcg unwind info
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Adjust prologue for mips64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Adjust load/store functions for mips64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Adjust move functions for mips64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Add bswap32u and bswap64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Support 64-bit opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Add mips64 opcodes
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2017-01-06 Jin Guojietcg-mips: Move bswap code to a subroutine
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-12-24 Richard Hendersontcg/s390: Remove 'R' constraint
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-12-24 Richard Hendersontcg/s390: Fix setcond expansion
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-22 Richard Hendersontarget-alpha: Fix interrupt mask for cpu1
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-17 Richard Hendersontarget-alpha: Log cpuid with -d int
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-17 Richard Hendersontarget-alpha: Update palcode for smp
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Joseph Myerstcg: correct 32-bit tcg_gen_ld8s_i64 sign-extension
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Peter Maydelltcg/tcg.h: Improve documentation of TCGv_i32 etc types
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Pranith KumarMAINTAINERS: Update PPC status and maintainer
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Richard Hendersontarget-microblaze: Cleanup dec_mul
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Richard Hendersontcg: Add tcg_gen_mulsu2_{i32,i64,tl}
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Richard Hendersonlog: Add locking to large logging blocks
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Richard Hendersontarget-openrisc: Do not dump cpu state with -d in_asm
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Richard Hendersontarget-microblaze: Do not dump cpu state with -d in_asm
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-11-01 Richard Hendersontarget-cris: Do not dump cpu state with -d in_asm
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Use tcg_gen_atomic_cmpxchg_tl
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Use tcg_gen_atomic_xchg_tl
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Remove MMU_MODE*_SUFFIX
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Allow 4-byte alignment on fp mem ops
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Implement ldqf and stqf inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Remove asi helper code handled inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Implement BCOPY/BFILL inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Implement cas_asi/casx_asi inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Implement ldstub_asi inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Implement swap_asi inline
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Handle more twinx asis
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Use MMU_PHYS_IDX for bypass asis
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Add MMU_PHYS_IDX
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Introduce cpu_raise_exception_ra
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-31 Richard Hendersontarget-sparc: Use overalignment flags for twinx and...
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontarget-alpha: Emulate LL/SC using cmpxchg helpers
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontarget-alpha: Introduce MMU_PHYS_IDX
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-arm: remove EXCP_STREX + cpu_exclusive_{test...
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotalinux-user: remove handling of aarch64's EXCP_STREX
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotalinux-user: remove handling of ARM's EXCP_STREX
Signed-off-by: Richard Henderson <rth@twidle.net>
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2016-10-26 Emilio G. Cotatarget-arm: emulate aarch64's LL/SC using cmpxchg helpers
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-arm: emulate SWP with atomic_xchg helper
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-arm: emulate LL/SC using cmpxchg helpers
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontarget-arm: Rearrange aa32 load and store functions
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatests: add atomic_add-bench
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: remove helper_lock()
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate XCHG using atomic helper
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed BTX ops using atomic helpers
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed XADD using atomic helper
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed NEG using cmpxchg helper
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed NOT using atomic helper
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed INC using atomic helper
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed OP instructions using...
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotatarget-i386: emulate LOCK'ed cmpxchg using cmpxchg...
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontcg: Emit barriers with parallel_cpus
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontcg: Add CONFIG_ATOMIC64
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontcg: Add atomic128 helpers
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontcg: Add atomic helpers
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersoncputlb: Tidy some macros
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersoncputlb: Move most of iotlb code out of line
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersoncputlb: Remove includes from softmmu_template.h
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersoncputlb: Move probe_write out of softmmu_template.h
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersoncputlb: Replace SHIFT with DATA_SIZE
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Alex Bennéelinux-user: enable parallel code generation on clone
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersontcg: Add EXCP_ATOMIC
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersonint128: Add int128_make128
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersonint128: Use __int128 if available
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersonexec: Avoid direct references to Int128 parts
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersonatomics: Add __nocheck atomic operations
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotaatomics: add atomic_op_fetch variants
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Emilio G. Cotaatomics: add atomic_xor
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-10-26 Richard Hendersonatomics: Add parameters to macros
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-09-20 Richard Hendersontcg/i386: Extend TARGET_PAGE_MASK to the proper type
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-09-16 Pranith Kumartcg: Optimize fence instructions
Signed-off-by: Richard Henderson <rth@twiddle.net>
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2016-09-16 Pranith Kumartarget-i386: Generate fences for x86
Signed-off-by: Richard Henderson <rth@twiddle.net>
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