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MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6
2015-02-17 Leonid YegoshinMIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: mipsregs: Add support for the LLADDR register
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Add LLB bit and related feature for the Config...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 BALC instruction
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 branch compact (BC) instruction
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Emulate the BC1{EQ,NE}Z FPU instructions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: branch: Do not emulate the branch likelies...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: Prepare the JR instruction for emulation...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: mm: scache: Add secondary cache support for MIPS...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: mm: c-r4k: Set the correct ISA level
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: mm: tlbex: Use cpu_has_mips_r2_exec_hazard for...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: mm: page: Add MIPS R6 support
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: lib: memset: Add MIPS R6 support
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: lib: memcpy: Add MIPS R6 support
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: syscall: Set the appropriate ISA level...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: unaligned: Add support for the MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: cps-vec: Replace "addi" with "addiu"
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: genex: Set correct ISA level
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: r4k_fpu: Add support for MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: r4k_switch: Add support for MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: traps: Add MIPS R6 related definitions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: proc: Add MIPS R6 support to /proc/cpuinfo
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: kernel: entry.S: Add MIPS R6 related definitions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: cpu-probe.c: Add support for MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: cevt-r4k: Add MIPS R6 to the c0_compare_interr...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: kernel: cpu-bugs64: Do not check R6 cores for...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: local: Set the appropriate ISA level for...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: spinlock: Replace "sub" instruction with...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: futex: Set the appropriate ISA level for...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: bitops: Update ISA constraints for MIPS...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: atomic: Update ISA constraints for MIPS...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: cmpxchg: Update ISA constraints for MIPS...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Use the new "ZC" constraint for MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: Rename GCC_OFF12_ASM to GCC_OFF_SMALL_ASM
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: spram: Add new symbol for MIPS scratch pad...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: r4kcache: Add MIPS R6 cache unroll functions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: irqflags: Add MIPS R6 related definitions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: hazards: Add MIPSR6 definitions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: asm: cpu: Add MIPSR6 ISA definitions
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: Use generic checksum functions for MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: asmmacro: Replace "add" instructions with...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: asm: asmmacro: Add MIPS R6 support to the simple...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: asm: stackframe: Do not preserve the HI/LO registers...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Leonid YegoshinMIPS: asm: module: define MODULE_PROC_FAMILY for MIPS R6
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-17 Markos ChandrasMIPS: asm: compiler: Add new macros to set ISA and...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 Leonid YegoshinMIPS: mm: Add MIPS R6 instruction encodings
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 Leonid YegoshinMIPS: mm: uasm: Add signed 9-bit immediate related...
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 Leonid YegoshinMIPS: Add build support for the MIPS R6 ISA
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 Leonid YegoshinMIPS: Add MIPS generic QEMU probe support
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 Leonid YegoshinMIPS: Add cases for CPU_QEMU_GENERIC
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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2015-02-16 Leonid YegoshinMIPS: Add generic QEMU PRid and cpu type identifiers
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
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