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drm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/
2015-11-10 Ville Syrjälädrm/i915: s/DP_PLL_FREQ_160MHZ/DP_PLL_FREQ_162MHZ/
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2015-11-10 Ville Syrjälädrm/i915: Hide underruns from eDP PLL and port enable...
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2015-11-10 Ville Syrjälädrm/i915: Disable FIFO underrun reporting around IBX...
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2015-11-10 Ville Syrjälädrm/i915: Check for CPT and not !IBX in ironlake_disable_pch...
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2015-11-10 Ville Syrjälädrm/i915: Check for FIFO underruns after modeset on...
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2015-11-10 Ville Syrjälädrm/i915: Re-enable PCH FIO underrun reporting after...
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2015-11-10 Ville Syrjälädrm/i915: Enable PCH FIFO underruns later on HSW+
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2015-11-10 Ville Syrjälädrm/i915: Enable PCH FIFO underruns later on ILK/SNB/IVB
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2015-11-10 Ville Syrjälädrm/i915: Set sync polarity from adjusted mode for...
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2015-11-10 Ville Syrjälädrm/i915: Don't use intel_pipe_to_cpu_transcoder()...
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2015-11-09 Ville Syrjälädrm/i915: Print a debug message when exceeding dotclock...
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2015-10-26 Ville Syrjälädrm/i915: Use paramtrized WRPLL_CTL()
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2015-10-26 Ville Syrjälädrm/i915: Add NEEDS_FORCEWAKE() checks for vlv/chv
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2015-10-26 Ville Syrjälädrm/i915: Respin vlv/chv reagister access to look more...
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2015-10-26 Ville Syrjälädrm/i915: Minor style nits in intel_uncore.c
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2015-10-26 Ville Syrjälädrm/i915: Read FORCEWAKE registers with I915_READ_FW()
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2015-10-26 Ville Syrjälädrm/i915: Turn __raw_i915_read8() & co. in to inline...
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2015-10-21 Ville Syrjälädrm/i915: Refactor ilk_update_wm (v3)
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2015-10-15 Ville Syrjälädrm/i915: Kill the leftover RMW from ivb_sprite_disable()
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2015-10-13 Ville Syrjälädrm/i915: Remove dev_priv argument from NEEDS_FORCE_WAKE
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2015-10-13 Ville Syrjälädrm/i915: Clean up LVDS register handling
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2015-10-13 Ville Syrjälädrm/i915: Throw out some useless variables
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2015-10-13 Ville Syrjälädrm/i915: Parametrize and fix SWF registers
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2015-10-13 Ville Syrjälädrm/i915: s/PIPE_FRMCOUNT_GM45/PIPE_FRMCOUNT_G4X/ etc.
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2015-10-13 Ville Syrjälädrm/i915: Turn GEN5_ASSERT_IIR_IS_ZERO() into a function
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2015-10-13 Ville Syrjälädrm/i915: Fix a few bad hex numbers in register defines
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2015-10-13 Ville Syrjälädrm/i915: Protect register macro arguments
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2015-10-13 Ville Syrjälädrm/i915: Include gpio_mmio_base in GMBUS reg defines
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2015-10-13 Ville Syrjälädrm/i915: Parametrize HSW video DIP data registers
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2015-10-13 Ville Syrjälädrm/i915: Eliminate weird parameter inversion from...
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2015-10-09 Ville Syrjälädrm/i915: Determine the stolen memory base address...
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2015-10-06 Ville Syrjälädrm/i915: Skip CHV PHY asserts until PHY has been fully...
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2015-10-06 Ville Syrjälädrm/i915: Don't bypass LRC on CHV
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2015-10-01 Ville Syrjälädrm/i915: s/GET_CFG_CR1_REG/DPLL_CFGCR1/ etc.
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2015-09-30 Ville Syrjälädrm/i915: Refactor ilk_update_wm (v3)
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2015-09-30 Ville Syrjälädrm/i915: s/_TRANSA_CHICKEN/TRANS_CHICKEN(PIPE_A)/
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2015-09-30 Ville Syrjälädrm/i915: s/_FDI_RXA_.../FDI_RX_...(PIPE_A)/
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2015-09-30 Ville Syrjälädrm/i915: Use czclk_freq in vlv c0 residency calculations
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2015-09-30 Ville Syrjälädrm/i915: Simplify vlv/chv rc6 residency calculation
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2015-09-30 Ville Syrjälädrm/i915: Read czclk from CCK on vlv/chv
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2015-09-30 Ville Syrjälädrm/i915: s/DDI_BUF_CTL_A/DDI_BUF_CTL(PORT_A)/
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2015-09-30 Ville Syrjälädrm/i915: Add VLV_HDMIB etc. which already include...
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2015-09-30 Ville Syrjälädrm/i915: s/_CURACNTR/CURCNTR(PIPE_A)/
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2015-09-30 Ville Syrjälädrm/i915: Parametrize PALETTE and LGC_PALETTE
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2015-09-30 Ville Syrjälädrm/i915: Include MCHBAR_MIRROR_BASE in ILK_GDSR
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2015-09-30 Ville Syrjälädrm/i915: Always use GEN8_RING_PDP_{LDW, UDW} instead...
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2015-09-30 Ville Syrjälädrm/i915: Add LO/HI PRIVATE_PAT registers
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2015-09-30 Ville Syrjälädrm/i915: Parametrize UOS_RSA_SCRATCH
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2015-09-30 Ville Syrjälädrm/i915: Add HDMI aspect ratio property for SDVO
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2015-09-30 Ville Syrjälädrm/i915: Constify adjusted_mode
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2015-09-30 Ville Syrjälädrm/i915: Move HDMI aspect ratio setup to .compute_config()
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2015-09-30 Ville Syrjälädrm/i915: Always use crtc_ timings when dealing with...
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2015-09-30 Ville Syrjälädrm/i915: s/mode/adjusted_mode/ in functions that really...
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2015-09-30 Ville Syrjälädrm/i915: Parametrize fence registers
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2015-09-30 Ville Syrjälädrm/i915: Always call the adjusted mode 'adjusted_mode'
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2015-09-30 Ville Syrjälädrm/i915: Use intel_panel for DVO fixed mode handling
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2015-09-24 Ville Syrjälädrm: Use vblank timestamps to guesstimate how many...
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2015-09-24 Ville Syrjälädrm: store_vblank() is never called with NULL timestamp
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2015-09-24 Ville Syrjälädrm: Clean up drm_calc_vbltimestamp_from_scanoutpos...
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2015-09-24 Ville Syrjälädrm: Limit the number of .get_vblank_counter() retries
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2015-09-24 Ville Syrjälädrm: Pass flags to drm_update_vblank_count()
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2015-09-24 Ville Syrjälädrm/i915: Fix vblank count variable types
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2015-09-24 Ville Syrjälädrm: Kill pixeldur_ns
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2015-09-24 Ville Syrjälädrm: Stop using linedur_ns and pixeldur_ns for vblank...
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2015-09-24 Ville Syrjälädrm: Move timestamping constants into drm_vblank_crtc
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2015-09-24 Ville Syrjälädrm: s/int crtc/unsigned int pipe/ straggles
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2015-09-23 Ville Syrjälädrm/i915: Parametrize CSR_PROGRAM registers
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2015-09-23 Ville Syrjälädrm/i915: Parametrize DDI_BUF_TRANS registers
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2015-09-23 Ville Syrjälädrm/i915: Parametrize TV luma/chroma filter registers
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2015-09-23 Ville Syrjälädrm/i915: Replace raw numbers with the approproate...
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2015-09-23 Ville Syrjälädrm/i915: Parametrize ILK turbo registers
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2015-09-23 Ville Syrjälädrm/i915: Parametrize FBC_TAG registers
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2015-09-23 Ville Syrjälädrm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITS
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2015-09-23 Ville Syrjälädrm/i915: Parametrize LRC registers
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2015-09-23 Ville Syrjälädrm/i915: Don't pass sdvo_reg to intel_sdvo_select_...
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2015-09-23 Ville Syrjälädrm/i915: Ignore "digital output" and "not HDMI output...
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2015-09-23 Ville Syrjälädrm/i915: Make sure we don't detect eDP on g4x
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2015-09-23 Ville Syrjälädrm/i915: Implement stolen reserved detection for ctg/elk
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2015-09-23 Ville Syrjälädrm/i915: Move scanline_offset and timestamping constant...
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2015-09-23 Ville Syrjälädrm/i915: Move sprite/cursor plane disable to intel_sanitize...
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2015-09-23 Ville Syrjälädrm/i915: Assign hwmode after encoder state readout
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2015-09-14 Ville Syrjälädrm/i915: Set stolen reserved to 0 for pre-g4x platforms
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2015-09-10 Ville Syrjälädrm/i915: Don't try to use DDR DVFS on CHV when disabled...
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2015-09-09 Ville Syrjälädrm: Make drm_av_sync_delay() 'mode' argument const
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2015-09-09 Ville Syrjälädrm: Remove the 'mode' argument from drm_select_eld()
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2015-09-09 Ville Syrjälädrm: Make some modes const when iterating through them
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2015-09-08 Ville Syrjälädrm/dp: Use I2C_WRITE_STATUS_UPDATE to drain partial...
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2015-09-08 Ville Syrjälädrm/tegra: Handle I2C_WRITE_STATUS_UPDATE for address...
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2015-09-08 Ville Syrjälädrm/radeon: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
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2015-09-08 Ville Syrjälädrm/i915: Handle DP_AUX_I2C_WRITE_STATUS_UPDATE
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2015-09-08 Ville Syrjälädrm/dp: s/I2C_STATUS/I2C_WRITE_STATUS_UPDATE/
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2015-09-08 Ville Syrjälädrm/i2c/ch7006: Constify ch7006_tv_norms[] and ch7006_modes[]
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2015-09-08 Ville Syrjälädrm: Constify TV mode names
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2015-09-08 Ville Syrjälädrm: Constify generic_edid_names[]
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2015-09-04 Ville Syrjälädrm/i915: Dump pfit state as hex
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2015-09-02 Ville Syrjälädrm/i915: Don't call intel_get_hpd_pins() when there...
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2015-09-02 Ville Syrjälädrm/i915: Rewrite BXT HPD code to conform to pre-existing...
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2015-09-02 Ville Syrjälädrm/i915: Refactor the hpd irq handling functions
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2015-09-02 Ville Syrjälädrm/i915: Rewrite bxt_hpd_handler() to look like everyone...
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2015-09-02 Ville Syrjälädrm/i915: Reinitialize HPD after runtime D3
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