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| 2017-09-07 | Richard Henderson | tcg/s390: Use constant pool for andi Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg/s390: Use constant pool for movi Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg/s390: Fix sign of patch_reloc addend Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg/s390: Introduce TCG_REG_TB Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg/i386: Store out-of-range call targets in constant... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg: Infrastructure for managing constant pools Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg: Rearrange ldst label tracking Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-07 | Richard Henderson | tcg: Move USE_DIRECT_JUMP discriminator to tcg/cpu... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/arm: Perform per-insn cross-page check only... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/arm: Split out thumb_tr_translate_insn Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/arm: Move ss check to init_disas_context Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/arm: [a64] Move page and ss checks to init_disas_context Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/arm: Delay check for magic kernel page Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/arm: Use DISAS_NORETURN Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | target/i386: Use generic DISAS_* enumerators Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg: Add generic DISAS_NORETURN Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Use slbgr for setcond le and leu Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Use load-on-condition-2 facility Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Use distinct-operands facility Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Merge ori+xori facilities check to tcg_target_op_def Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Merge add2i facilities check to tcg_target_op_def Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Merge muli facilities check to tcg_target_op_def Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Merge cmpi facilities check to tcg_target_op_def Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | tcg/s390: Fully convert tcg_target_op_def Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | disas/i386: Add disassembly of rorx Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | disas/i386: Add disassembly of vex.0f38.f5 Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-09-06 | Richard Henderson | disas/i386: Fix disassembly of two-byte vex prefixes Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-08-03 | Richard Henderson | tcg: Increase minimum alignment from tcg_malloc to 8 Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-08-03 | Richard Henderson | target/s390x: Fix CSST for 16-byte store Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-08-03 | Richard Henderson | tcg/arm: Fix runtime overalignment test Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-24 | Richard Henderson | util: Introduce include/qemu/cpuid.h Signed-off-by: Richard Henderson <rth@twiddle.net> Message-id: 20170719044018.18063-1-rth@twiddle.net |
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| 2017-07-19 | Richard Henderson | target/arm: Optimize aarch64 rev16 Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | tcg: Expand glue macros before stringifying helper... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Log temp leaks Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Fix temp leak in gen_fbcond Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Fix temp leak in gen_call_pal Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Fix temp leak in gen_mtpr Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Fix temp leak in gen_bcond Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Merge several flag bytes into ENV->FLAGS Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Copy tb->flags into DisasContext Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-19 | Richard Henderson | target/alpha: Remove amask from tb->flags Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Use tcg_gen_lookup_and_goto_ptr Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-28-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Implement fsrra Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-27-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Add missing FPSCR.PR == 0 checks Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-26-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Implement fpchg Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-25-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Introduce CHECK_SH4A Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-24-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Introduce CHECK_FPSCR_PR_* Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-23-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Tidy misc illegal insn checks Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-22-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Unify code for CHECK_FPU_ENABLED Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-21-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Unify code for CHECK_PRIVILEGED Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-20-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Unify code for CHECK_NOT_DELAY_SLOT Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-19-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Simplify 64-bit fp reg-reg move Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-18-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Load/store Dr as 64-bit quantities Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-17-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Merge DREG into fpr64 routines Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-16-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Eliminate unused XREG macro Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-15-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Hoist fp register bank selection Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-14-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Pass DisasContext to fpr64 routines Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-13-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Unify cpu_fregs into FREG Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-12-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Hoist register bank selection Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-11-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | linux-user/sh4: Clean env->flags on signal boundaries Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-10-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | linux-user/sh4: Notice gUSA regions during signal delivery Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-9-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Recognize common gUSA sequences Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-8-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Handle user-space atomics Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-7-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Adjust TB_FLAG_PENDING_MOVCA Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-6-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Keep env->flags clean Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-5-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Introduce TB_FLAG_ENVFLAGS_MASK Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-4-rth@twiddle.net> |
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| 2017-07-18 | Richard Henderson | target/sh4: Consolidate end-of-TB tests Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20170718200255.31647-3-rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Fix risbg handling Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Mark ETF3 and ETF3_ENH facilities as... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Implement TRTR Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Implement SRSTU Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Tidy SRST Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Implement CONVERT UNICODE insns Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-07-17 | Richard Henderson | target/s390x: Implement CSST Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Clean up TB flag bits Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Finish implementing ETF2-ENH Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Mark STFLE_49 facility as available Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Implement processor-assist insn Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Implement execution-hint insns Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Mark STFLE_53 facility as available Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Implement load-and-zero-rightmost-byte... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Implement load-on-condition-2 insns Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Mark FPSEH facility as available Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-23 | Richard Henderson | target/s390x: Map existing FAC_* names to S390_FEAT_... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | target/arm: Exit after clearing aarch64 interrupt mask Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | target/s390x: Exit after changing PSW mask Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | target/alpha: Use tcg_gen_lookup_and_goto_ptr Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | tcg: Increase hit rate of lookup_tb_ptr Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | tcg/arm: Use ldr (literal) for goto_tb Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | tcg/arm: Try pc-relative addresses for movi Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | tcg/arm: Remove limit on code buffer size Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | tcg/arm: Use indirect branch for goto_tb Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-19 | Richard Henderson | tcg/aarch64: Use ADR in tcg_out_movi Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: Re-implement a few EXECUTE target insns... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: Implement EXECUTE via new TranslationBlock Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: End the TB after EXECUTE Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: Save current ilen during translation Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: Implement CSPG Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: Use atomic operations for COMPARE SWAP... Signed-off-by: Richard Henderson <rth@twiddle.net> |
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| 2017-06-06 | Richard Henderson | target/s390x: Fix EXECUTE with R1==0 Signed-off-by: Richard Henderson <rth@twiddle.net> |
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