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2021-12-20	Richard Henderson	Merge tag 'pull-user-20211220' of https://gitlab.com...	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	Merge tag 'pull-riscv-to-apply-20211220-1' of github...	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	meson: Move bsd_user_ss to bsd-user/	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	meson: Move linux_user_ss to linux-user/	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	linux-user: Move thunk.c from top-level	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	common-user: Adjust system call return on FreeBSD	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	common-user: Move safe-syscall.* from linux-user	commit \| commitdiff \| tree
2021-12-20	Jessica Clarke	hw/riscv: Use load address rather than entry point...	commit \| commitdiff \| tree
2021-12-20	Vineet Gupta	target/riscv: Enable bitmanip Zb[abcs] instructions	commit \| commitdiff \| tree
2021-12-20	Khem Raj	riscv: Set 5.4 as minimum kernel version for riscv32	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: Add ELEN checks for widening...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: update opivv_vadc_check() comment	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: rename vmandnot.mm and vmornot...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: add vector unit-stride mask...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: add evl parameter to vext_ldst_us()	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: add vsetivli instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: rename r2_zimm to r2_zimm11	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point reciprocal estima...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point reciprocal square...	commit \| commitdiff \| tree
2021-12-20	Hsiangkai Wang	target/riscv: gdb: support vector registers for rv64...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: trigger illegal instruction...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: implement vstart CSR	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: relax RV_VLEN_MAX to 1024-bits	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: narrowing floating-point/integer...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: add "set round to odd" rounding mode...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: widening floating-point/integer...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point/integer type...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: introduce floating-point rounding mode...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point min/max instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: remove integer extract instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: remove vmford.vv and vmford.vf	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: remove widening saturating scale...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: single-width scaling shift instr...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: widening floating-point reductio...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: single-width floating-point...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: narrowing fixed-point clip instr...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point slide instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: slide instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: mask-register logical instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point compare instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: integer comparison instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: single-width saturating add...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: widening integer multiply-add...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: narrowing integer right shift...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: integer add-with-carry/subtract...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: single-width bit shift instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: single-width averaging add and...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: integer extension instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: whole register move instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point scalar move instr...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point move instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: integer scalar move instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: register gather instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: allow load element with sign...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: element index instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: iota instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: set-X-first mask bit instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: find-first-set mask bit instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: count population in mask instruction	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point classify instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: floating-point square-root instr...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: take fractional LMUL into vector...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: update vext_max_elems() for...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: load/store whole register instru...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: fault-only-first unit stride...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: fix address index overflow bug...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: index load and store instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: stride load and store instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: configure instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: remove amo operations instructions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv:1.0: add translation-time nan-box...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: introduce more imm value modes in transla...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: update check functions	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: add VMA and VTA	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: add fractional LMUL	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: remove MLEN calculations	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: check MSTATUS_VS when accessing...	commit \| commitdiff \| tree
2021-12-20	Greentime Hu	target/riscv: rvv-1.0: add vlenb register	commit \| commitdiff \| tree
2021-12-20	LIU Zhiwei	target/riscv: rvv-1.0: add vcsr register	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: remove rvv related codes from...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: add translation-time vector...	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: introduce writable misa.v field	commit \| commitdiff \| tree
2021-12-20	LIU Zhiwei	target/riscv: rvv-1.0: add sstatus VS field	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: rvv-1.0: set mstatus.SD bit if mstatus...	commit \| commitdiff \| tree
2021-12-20	LIU Zhiwei	target/riscv: rvv-1.0: add mstatus VS field	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: Use FIELD_EX32() to extract wd field	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: drop vector 0.7.1 and add 1.0 support	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: zfh: add Zfhmin cpu property	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: zfh: implement zfhmin extension	commit \| commitdiff \| tree
2021-12-20	Frank Chang	target/riscv: zfh: add Zfh cpu property	commit \| commitdiff \| tree
2021-12-20	Kito Cheng	target/riscv: zfh: half-precision floating-point classify	commit \| commitdiff \| tree
2021-12-20	Kito Cheng	target/riscv: zfh: half-precision floating-point compare	commit \| commitdiff \| tree
2021-12-20	Kito Cheng	target/riscv: zfh: half-precision convert and move	commit \| commitdiff \| tree
2021-12-20	Kito Cheng	target/riscv: zfh: half-precision computational	commit \| commitdiff \| tree
2021-12-20	Kito Cheng	target/riscv: zfh: half-precision load and store	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	bsd-user: Create special-errno.h	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	linux-user: Create special-errno.h	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGR...	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	bsd-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS	commit \| commitdiff \| tree
2021-12-20	Richard Henderson	linux-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS	commit \| commitdiff \| tree
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