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target-i386: fix "info lapic" segfault on isapc
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CommitLineData
ad96090a
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
d38ea87a 24#include "qemu/osdep.h"
33c11879
PB
25#include "qemu-common.h"
26#include "cpu.h"
9c17d615 27#include "sysemu/sysemu.h"
9c17d615 28#include "sysemu/arch_init.h"
a2cb15b0 29#include "hw/pci/pci.h"
0d09e41a 30#include "hw/audio/audio.h"
1de7afc9 31#include "qemu/config-file.h"
d97326ee 32#include "qemu/error-report.h"
99afc91d 33#include "qmp-commands.h"
0445259b 34#include "hw/acpi/acpi.h"
f348b6d1 35#include "qemu/help_option.h"
ad96090a
BS
36
37#ifdef TARGET_SPARC
38int graphic_width = 1024;
39int graphic_height = 768;
40int graphic_depth = 8;
41#else
42int graphic_width = 800;
43int graphic_height = 600;
f1ff0e89 44int graphic_depth = 32;
ad96090a
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45#endif
46
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47
48#if defined(TARGET_ALPHA)
49#define QEMU_ARCH QEMU_ARCH_ALPHA
50#elif defined(TARGET_ARM)
51#define QEMU_ARCH QEMU_ARCH_ARM
52#elif defined(TARGET_CRIS)
53#define QEMU_ARCH QEMU_ARCH_CRIS
54#elif defined(TARGET_I386)
55#define QEMU_ARCH QEMU_ARCH_I386
56#elif defined(TARGET_M68K)
57#define QEMU_ARCH QEMU_ARCH_M68K
81ea0e13
MW
58#elif defined(TARGET_LM32)
59#define QEMU_ARCH QEMU_ARCH_LM32
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BS
60#elif defined(TARGET_MICROBLAZE)
61#define QEMU_ARCH QEMU_ARCH_MICROBLAZE
62#elif defined(TARGET_MIPS)
63#define QEMU_ARCH QEMU_ARCH_MIPS
d15a9c23
AG
64#elif defined(TARGET_MOXIE)
65#define QEMU_ARCH QEMU_ARCH_MOXIE
e671711c
MV
66#elif defined(TARGET_NIOS2)
67#define QEMU_ARCH QEMU_ARCH_NIOS2
e67db06e
JL
68#elif defined(TARGET_OPENRISC)
69#define QEMU_ARCH QEMU_ARCH_OPENRISC
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BS
70#elif defined(TARGET_PPC)
71#define QEMU_ARCH QEMU_ARCH_PPC
72#elif defined(TARGET_S390X)
73#define QEMU_ARCH QEMU_ARCH_S390X
74#elif defined(TARGET_SH4)
75#define QEMU_ARCH QEMU_ARCH_SH4
76#elif defined(TARGET_SPARC)
77#define QEMU_ARCH QEMU_ARCH_SPARC
2328826b
MF
78#elif defined(TARGET_XTENSA)
79#define QEMU_ARCH QEMU_ARCH_XTENSA
4f23a1e6
GX
80#elif defined(TARGET_UNICORE32)
81#define QEMU_ARCH QEMU_ARCH_UNICORE32
48e06fe0
BK
82#elif defined(TARGET_TRICORE)
83#define QEMU_ARCH QEMU_ARCH_TRICORE
ad96090a
BS
84#endif
85
86const uint32_t arch_type = QEMU_ARCH;
ad96090a 87
0dfa5ef9
IY
88struct soundhw {
89 const char *name;
90 const char *descr;
91 int enabled;
92 int isa;
93 union {
4a0f031d 94 int (*init_isa) (ISABus *bus);
0dfa5ef9
IY
95 int (*init_pci) (PCIBus *bus);
96 } init;
97};
98
36cd6f6f
PB
99static struct soundhw soundhw[9];
100static int soundhw_count;
ad96090a 101
36cd6f6f
PB
102void isa_register_soundhw(const char *name, const char *descr,
103 int (*init_isa)(ISABus *bus))
104{
105 assert(soundhw_count < ARRAY_SIZE(soundhw) - 1);
106 soundhw[soundhw_count].name = name;
107 soundhw[soundhw_count].descr = descr;
108 soundhw[soundhw_count].isa = 1;
109 soundhw[soundhw_count].init.init_isa = init_isa;
110 soundhw_count++;
111}
ad96090a 112
36cd6f6f
PB
113void pci_register_soundhw(const char *name, const char *descr,
114 int (*init_pci)(PCIBus *bus))
115{
116 assert(soundhw_count < ARRAY_SIZE(soundhw) - 1);
117 soundhw[soundhw_count].name = name;
118 soundhw[soundhw_count].descr = descr;
119 soundhw[soundhw_count].isa = 0;
120 soundhw[soundhw_count].init.init_pci = init_pci;
121 soundhw_count++;
122}
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123
124void select_soundhw(const char *optarg)
125{
126 struct soundhw *c;
127
c8057f95 128 if (is_help_option(optarg)) {
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BS
129 show_valid_cards:
130
36cd6f6f
PB
131 if (soundhw_count) {
132 printf("Valid sound card names (comma separated):\n");
133 for (c = soundhw; c->name; ++c) {
134 printf ("%-11s %s\n", c->name, c->descr);
135 }
136 printf("\n-soundhw all will enable all of the above\n");
137 } else {
138 printf("Machine has no user-selectable audio hardware "
139 "(it may or may not have always-present audio hardware).\n");
ad96090a 140 }
c8057f95 141 exit(!is_help_option(optarg));
ad96090a
BS
142 }
143 else {
144 size_t l;
145 const char *p;
146 char *e;
147 int bad_card = 0;
148
149 if (!strcmp(optarg, "all")) {
150 for (c = soundhw; c->name; ++c) {
151 c->enabled = 1;
152 }
153 return;
154 }
155
156 p = optarg;
157 while (*p) {
158 e = strchr(p, ',');
159 l = !e ? strlen(p) : (size_t) (e - p);
160
161 for (c = soundhw; c->name; ++c) {
162 if (!strncmp(c->name, p, l) && !c->name[l]) {
163 c->enabled = 1;
164 break;
165 }
166 }
167
168 if (!c->name) {
169 if (l > 80) {
0971f1be 170 error_report("Unknown sound card name (too big to show)");
ad96090a
BS
171 }
172 else {
0971f1be
LT
173 error_report("Unknown sound card name `%.*s'",
174 (int) l, p);
ad96090a
BS
175 }
176 bad_card = 1;
177 }
178 p += l + (e != NULL);
179 }
180
181 if (bad_card) {
182 goto show_valid_cards;
183 }
184 }
185}
0dfa5ef9 186
f81222bc 187void audio_init(void)
0dfa5ef9
IY
188{
189 struct soundhw *c;
f81222bc
PB
190 ISABus *isa_bus = (ISABus *) object_resolve_path_type("", TYPE_ISA_BUS, NULL);
191 PCIBus *pci_bus = (PCIBus *) object_resolve_path_type("", TYPE_PCI_BUS, NULL);
0dfa5ef9
IY
192
193 for (c = soundhw; c->name; ++c) {
194 if (c->enabled) {
195 if (c->isa) {
f81222bc 196 if (!isa_bus) {
0971f1be 197 error_report("ISA bus not available for %s", c->name);
f81222bc 198 exit(1);
0dfa5ef9 199 }
f81222bc 200 c->init.init_isa(isa_bus);
0dfa5ef9 201 } else {
f81222bc 202 if (!pci_bus) {
0971f1be 203 error_report("PCI bus not available for %s", c->name);
f81222bc 204 exit(1);
0dfa5ef9 205 }
f81222bc 206 c->init.init_pci(pci_bus);
0dfa5ef9
IY
207 }
208 }
209 }
210}
ad96090a 211
ad96090a
BS
212int kvm_available(void)
213{
214#ifdef CONFIG_KVM
215 return 1;
216#else
217 return 0;
218#endif
219}
220
221int xen_available(void)
222{
223#ifdef CONFIG_XEN
224 return 1;
225#else
226 return 0;
227#endif
228}
99afc91d
DB
229
230
231TargetInfo *qmp_query_target(Error **errp)
232{
233 TargetInfo *info = g_malloc0(sizeof(*info));
234
c02a9552 235 info->arch = g_strdup(TARGET_NAME);
99afc91d
DB
236
237 return info;
238}