[mirror_qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "config.h"
#include "disas/bfd.h"
#include "elf.h"
#include <errno.h>

#include "cpu.h"
#include "disas/disas.h"

typedef struct CPUDebug {
    struct disassemble_info info;
    CPUArchState *env;
} CPUDebug;

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
                   struct disassemble_info *info)
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save minuscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (bfd_vma addr, struct disassemble_info *info)
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Print address in hex, truncated to the width of a target virtual address. */
static void
generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
{
    uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
    generic_print_address(addr & mask, info);
}

/* Print address in hex, truncated to the width of a host virtual address. */
static void
generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
{
    uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
    generic_print_address(addr & mask, info);
}

/* Just return the given address.  */

int
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
{
  return 1;
}

bfd_vma bfd_getl64 (const bfd_byte *addr)
{
  unsigned long long v;

  v = (unsigned long long) addr[0];
  v |= (unsigned long long) addr[1] << 8;
  v |= (unsigned long long) addr[2] << 16;
  v |= (unsigned long long) addr[3] << 24;
  v |= (unsigned long long) addr[4] << 32;
  v |= (unsigned long long) addr[5] << 40;
  v |= (unsigned long long) addr[6] << 48;
  v |= (unsigned long long) addr[7] << 56;
  return (bfd_vma) v;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

#ifdef TARGET_ARM
static int
print_insn_thumb1(bfd_vma pc, disassemble_info *info)
{
  return print_insn_arm(pc | 1, info);
}
#endif

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - 1 means 16 bit code, 2 means 64 bit code
    arm  - bit 0 = thumb, bit 1 = reverse endian
    ppc  - nonzero means little endian
    other targets - unused
 */
void target_disas(FILE *out, CPUArchState *env, target_ulong code,
                  target_ulong size, int flags)
{
    target_ulong pc;
    int count;
    CPUDebug s;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);

    s.env = env;
    s.info.read_memory_func = target_read_memory;
    s.info.buffer_vma = code;
    s.info.buffer_length = size;
    s.info.print_address_func = generic_print_target_address;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    if (flags & 1) {
        print_insn = print_insn_thumb1;
    } else {
        print_insn = print_insn_arm;
    }
    if (flags & 2) {
#ifdef TARGET_WORDS_BIGENDIAN
        s.info.endian = BFD_ENDIAN_LITTLE;
#else
        s.info.endian = BFD_ENDIAN_BIG;
#endif
    }
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if (flags >> 16) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    if (flags & 0xFFFF) {
        /* If we have a precise definitions of the instructions set, use it */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    s.info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#elif defined(TARGET_ALPHA)
    s.info.mach = bfd_mach_alpha_ev6;
    print_insn = print_insn_alpha;
#elif defined(TARGET_CRIS)
    if (flags != 32) {
        s.info.mach = bfd_mach_cris_v0_v10;
        print_insn = print_insn_crisv10;
    } else {
        s.info.mach = bfd_mach_cris_v32;
        print_insn = print_insn_crisv32;
    }
#elif defined(TARGET_S390X)
    s.info.mach = bfd_mach_s390_64;
    print_insn = print_insn_s390;
#elif defined(TARGET_MICROBLAZE)
    s.info.mach = bfd_arch_microblaze;
    print_insn = print_insn_microblaze;
#elif defined(TARGET_MOXIE)
    s.info.mach = bfd_arch_moxie;
    print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
    s.info.mach = bfd_mach_lm32;
    print_insn = print_insn_lm32;
#else
    fprintf(out, "0x" TARGET_FMT_lx
	    ": Asm output not supported on this arch\n", code);
    return;
#endif

    for (pc = code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &s.info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &s.info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
        if (size < count) {
            fprintf(out,
                    "Disassembler disagrees with translator over instruction "
                    "decoding\n"
                    "Please report this to qemu-devel@nongnu.org\n");
            break;
        }
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    uintptr_t pc;
    int count;
    CPUDebug s;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
    s.info.print_address_func = generic_print_host_address;

    s.info.buffer = code;
    s.info.buffer_vma = (uintptr_t)code;
    s.info.buffer_length = size;

#ifdef HOST_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(CONFIG_TCG_INTERPRETER)
    print_insn = print_insn_tci;
#elif defined(__i386__)
    s.info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    s.info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(_ARCH_PPC)
    print_insn = print_insn_ppc;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
    s.info.mach = bfd_mach_sparc_v9b;
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#elif defined(__ia64__)
    print_insn = print_insn_ia64;
#else
    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
	    (long) code);
    return;
#endif
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
        count = print_insn(pc, &s.info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    const char *symbol = "";
    struct syminfo *s;

    for (s = syminfos; s; s = s->next) {
        symbol = s->lookup_symbol(s, orig_addr);
        if (symbol[0] != '\0') {
            break;
        }
    }

    return symbol;
}

#if !defined(CONFIG_USER_ONLY)

#include "monitor/monitor.h"

static int monitor_disas_is_physical;

static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
                     struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    if (monitor_disas_is_physical) {
        cpu_physical_memory_read(memaddr, myaddr, length);
    } else {
        cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);
    }
    return 0;
}

static int GCC_FMT_ATTR(2, 3)
monitor_fprintf(FILE *stream, const char *fmt, ...)
{
    va_list ap;
    va_start(ap, fmt);
    monitor_vprintf((Monitor *)stream, fmt, ap);
    va_end(ap);
    return 0;
}

void monitor_disas(Monitor *mon, CPUArchState *env,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    int count, i;
    CPUDebug s;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);

    s.env = env;
    monitor_disas_is_physical = is_physical;
    s.info.read_memory_func = monitor_read_memory;
    s.info.print_address_func = generic_print_target_address;

    s.info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    print_insn = print_insn_arm;
#elif defined(TARGET_ALPHA)
    print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
#ifdef TARGET_PPC64
    s.info.mach = bfd_mach_ppc64;
#else
    s.info.mach = bfd_mach_ppc;
#endif
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    s.info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#elif defined(TARGET_S390X)
    s.info.mach = bfd_mach_s390_64;
    print_insn = print_insn_s390;
#elif defined(TARGET_MOXIE)
    s.info.mach = bfd_arch_moxie;
    print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
    s.info.mach = bfd_mach_lm32;
    print_insn = print_insn_lm32;
#else
    monitor_printf(mon, "0x" TARGET_FMT_lx
                   ": Asm output not supported on this arch\n", pc);
    return;
#endif

    for(i = 0; i < nb_insn; i++) {
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
        count = print_insn(pc, &s.info);
	monitor_printf(mon, "\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299	2	#include "config.h"
76cad711	3	#include "disas/bfd.h"
b9adb4a6	4	#include "elf.h"
aa0aa4fa	5	#include <errno.h>
b9adb4a6	6
c6105c0a	7	#include "cpu.h"
76cad711	8	#include "disas/disas.h"
c6105c0a	9
f4359b9f BS	10	typedef struct CPUDebug {
	11	struct disassemble_info info;
	12	CPUArchState *env;
	13	} CPUDebug;
	14
b9adb4a6	15	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	16	struct syminfo *syminfos = NULL;
b9adb4a6	17
aa0aa4fa FB	18	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	19	Transfer them to myaddr. */
	20	int
3a742b76 PB	21	buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
3a742b76 PB	22	struct disassemble_info *info)
aa0aa4fa	23	{
c6105c0a FB	24	if (memaddr < info->buffer_vma
	25	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	26	/* Out of bounds. Use EIO because GDB uses it. */
	27	return EIO;
	28	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	29	return 0;
aa0aa4fa FB	30	}
aa0aa4fa FB	31
c6105c0a FB	32	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	33	Transfer them to myaddr. */
	34	static int
c27004ec FB	35	target_read_memory (bfd_vma memaddr,
	36	bfd_byte *myaddr,
	37	int length,
	38	struct disassemble_info *info)
c6105c0a	39	{
f4359b9f BS	40	CPUDebug *s = container_of(info, CPUDebug, info);
	41
	42	cpu_memory_rw_debug(s->env, memaddr, myaddr, length, 0);
c6105c0a FB	43	return 0;
c6105c0a FB	44	}
c6105c0a	45
aa0aa4fa FB	46	/* Print an error message. We can assume that this is in response to
	47	an error return from buffer_read_memory. */
	48	void
3a742b76	49	perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa FB	50	{
	51	if (status != EIO)
	52	/* Can't happen. */
	53	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	54	else
	55	/* Actually, address between memaddr and memaddr + len was
	56	out of bounds. */
	57	(*info->fprintf_func) (info->stream,
26a76461	58	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	59	}
aa0aa4fa FB	60
a31f0531	61	/* This could be in a separate file, to save minuscule amounts of space
aa0aa4fa FB	62	in statically linked executables. */
	63
	64	/* Just print the address is hex. This is included for completeness even
	65	though both GDB and objdump provide their own (to print symbolic
	66	addresses). */
	67
	68	void
3a742b76	69	generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa	70	{
26a76461	71	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	72	}
aa0aa4fa FB	73
636bd289 PM	74	/* Print address in hex, truncated to the width of a target virtual address. */
	75	static void
	76	generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
	77	{
	78	uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
	79	generic_print_address(addr & mask, info);
	80	}
	81
	82	/* Print address in hex, truncated to the width of a host virtual address. */
	83	static void
	84	generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
	85	{
	86	uint64_t mask = ~0ULL >> (64 - (sizeof(void ) 8));
	87	generic_print_address(addr & mask, info);
	88	}
	89
aa0aa4fa FB	90	/* Just return the given address. */
	91
	92	int
3a742b76	93	generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa FB	94	{
	95	return 1;
	96	}
	97
903ec55c AJ	98	bfd_vma bfd_getl64 (const bfd_byte *addr)
	99	{
	100	unsigned long long v;
	101
	102	v = (unsigned long long) addr[0];
	103	v \|= (unsigned long long) addr[1] << 8;
	104	v \|= (unsigned long long) addr[2] << 16;
	105	v \|= (unsigned long long) addr[3] << 24;
	106	v \|= (unsigned long long) addr[4] << 32;
	107	v \|= (unsigned long long) addr[5] << 40;
	108	v \|= (unsigned long long) addr[6] << 48;
	109	v \|= (unsigned long long) addr[7] << 56;
	110	return (bfd_vma) v;
	111	}
	112
aa0aa4fa FB	113	bfd_vma bfd_getl32 (const bfd_byte *addr)
	114	{
	115	unsigned long v;
	116
	117	v = (unsigned long) addr[0];
	118	v \|= (unsigned long) addr[1] << 8;
	119	v \|= (unsigned long) addr[2] << 16;
	120	v \|= (unsigned long) addr[3] << 24;
	121	return (bfd_vma) v;
	122	}
	123
	124	bfd_vma bfd_getb32 (const bfd_byte *addr)
	125	{
	126	unsigned long v;
	127
	128	v = (unsigned long) addr[0] << 24;
	129	v \|= (unsigned long) addr[1] << 16;
	130	v \|= (unsigned long) addr[2] << 8;
	131	v \|= (unsigned long) addr[3];
	132	return (bfd_vma) v;
	133	}
	134
6af0bf9c FB	135	bfd_vma bfd_getl16 (const bfd_byte *addr)
	136	{
	137	unsigned long v;
	138
	139	v = (unsigned long) addr[0];
	140	v \|= (unsigned long) addr[1] << 8;
	141	return (bfd_vma) v;
	142	}
	143
	144	bfd_vma bfd_getb16 (const bfd_byte *addr)
	145	{
	146	unsigned long v;
	147
	148	v = (unsigned long) addr[0] << 24;
	149	v \|= (unsigned long) addr[1] << 16;
	150	return (bfd_vma) v;
	151	}
	152
c2d551ff FB	153	#ifdef TARGET_ARM
	154	static int
	155	print_insn_thumb1(bfd_vma pc, disassemble_info *info)
	156	{
	157	return print_insn_arm(pc \| 1, info);
	158	}
	159	#endif
	160
e91c8a77	161	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff	162	values:
e99722f6	163	i386 - 1 means 16 bit code, 2 means 64 bit code
d8fd2954	164	arm - bit 0 = thumb, bit 1 = reverse endian
6a00d601	165	ppc - nonzero means little endian
c2d551ff FB	166	other targets - unused
c2d551ff FB	167	*/
f4359b9f BS	168	void target_disas(FILE out, CPUArchState env, target_ulong code,
f4359b9f BS	169	target_ulong size, int flags)
b9adb4a6	170	{
c27004ec	171	target_ulong pc;
b9adb4a6	172	int count;
f4359b9f	173	CPUDebug s;
b9adb4a6 FB	174	int (print_insn)(bfd_vma pc, disassemble_info info);
b9adb4a6 FB	175
f4359b9f	176	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
b9adb4a6	177
f4359b9f BS	178	s.env = env;
	179	s.info.read_memory_func = target_read_memory;
	180	s.info.buffer_vma = code;
	181	s.info.buffer_length = size;
	182	s.info.print_address_func = generic_print_target_address;
c27004ec FB	183
c27004ec FB	184	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	185	s.info.endian = BFD_ENDIAN_BIG;
c27004ec	186	#else
f4359b9f	187	s.info.endian = BFD_ENDIAN_LITTLE;
c27004ec FB	188	#endif
c27004ec FB	189	#if defined(TARGET_I386)
f4359b9f BS	190	if (flags == 2) {
	191	s.info.mach = bfd_mach_x86_64;
	192	} else if (flags == 1) {
	193	s.info.mach = bfd_mach_i386_i8086;
	194	} else {
	195	s.info.mach = bfd_mach_i386_i386;
	196	}
c27004ec FB	197	print_insn = print_insn_i386;
c27004ec FB	198	#elif defined(TARGET_ARM)
d8fd2954 PB	199	if (flags & 1) {
	200	print_insn = print_insn_thumb1;
	201	} else {
	202	print_insn = print_insn_arm;
	203	}
	204	if (flags & 2) {
	205	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	206	s.info.endian = BFD_ENDIAN_LITTLE;
d8fd2954	207	#else
f4359b9f	208	s.info.endian = BFD_ENDIAN_BIG;
d8fd2954 PB	209	#endif
d8fd2954 PB	210	}
c27004ec FB	211	#elif defined(TARGET_SPARC)
c27004ec FB	212	print_insn = print_insn_sparc;
3475187d	213	#ifdef TARGET_SPARC64
f4359b9f	214	s.info.mach = bfd_mach_sparc_v9b;
3b46e624	215	#endif
c27004ec	216	#elif defined(TARGET_PPC)
f4359b9f BS	217	if (flags >> 16) {
	218	s.info.endian = BFD_ENDIAN_LITTLE;
	219	}
237c0af0 JM	220	if (flags & 0xFFFF) {
237c0af0 JM	221	/* If we have a precise definitions of the instructions set, use it */
f4359b9f	222	s.info.mach = flags & 0xFFFF;
237c0af0	223	} else {
a2458627	224	#ifdef TARGET_PPC64
f4359b9f	225	s.info.mach = bfd_mach_ppc64;
a2458627	226	#else
f4359b9f	227	s.info.mach = bfd_mach_ppc;
a2458627	228	#endif
237c0af0	229	}
c27004ec	230	print_insn = print_insn_ppc;
e6e5906b PB	231	#elif defined(TARGET_M68K)
e6e5906b PB	232	print_insn = print_insn_m68k;
6af0bf9c	233	#elif defined(TARGET_MIPS)
76b3030c	234	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	235	print_insn = print_insn_big_mips;
76b3030c FB	236	#else
	237	print_insn = print_insn_little_mips;
	238	#endif
fdf9b3e8	239	#elif defined(TARGET_SH4)
f4359b9f	240	s.info.mach = bfd_mach_sh4;
fdf9b3e8	241	print_insn = print_insn_sh;
eddf68a6	242	#elif defined(TARGET_ALPHA)
f4359b9f	243	s.info.mach = bfd_mach_alpha_ev6;
eddf68a6	244	print_insn = print_insn_alpha;
a25fd137	245	#elif defined(TARGET_CRIS)
b09cd072	246	if (flags != 32) {
f4359b9f	247	s.info.mach = bfd_mach_cris_v0_v10;
b09cd072 EI	248	print_insn = print_insn_crisv10;
b09cd072 EI	249	} else {
f4359b9f	250	s.info.mach = bfd_mach_cris_v32;
b09cd072 EI	251	print_insn = print_insn_crisv32;
b09cd072 EI	252	}
db500609	253	#elif defined(TARGET_S390X)
f4359b9f	254	s.info.mach = bfd_mach_s390_64;
db500609	255	print_insn = print_insn_s390;
e90e390c	256	#elif defined(TARGET_MICROBLAZE)
f4359b9f	257	s.info.mach = bfd_arch_microblaze;
e90e390c	258	print_insn = print_insn_microblaze;
bd86a88e AG	259	#elif defined(TARGET_MOXIE)
	260	s.info.mach = bfd_arch_moxie;
	261	print_insn = print_insn_moxie;
79368f49	262	#elif defined(TARGET_LM32)
f4359b9f	263	s.info.mach = bfd_mach_lm32;
79368f49	264	print_insn = print_insn_lm32;
c27004ec	265	#else
b8076a74 FB	266	fprintf(out, "0x" TARGET_FMT_lx
b8076a74 FB	267	": Asm output not supported on this arch\n", code);
c27004ec	268	return;
c6105c0a FB	269	#endif
c6105c0a FB	270
7e000c2e	271	for (pc = code; size > 0; pc += count, size -= count) {
fa15e030	272	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
f4359b9f	273	count = print_insn(pc, &s.info);
c27004ec FB	274	#if 0
	275	{
	276	int i;
	277	uint8_t b;
	278	fprintf(out, " {");
	279	for(i = 0; i < count; i++) {
f4359b9f	280	target_read_memory(pc + i, &b, 1, &s.info);
c27004ec FB	281	fprintf(out, " %02x", b);
	282	}
	283	fprintf(out, " }");
	284	}
	285	#endif
	286	fprintf(out, "\n");
	287	if (count < 0)
	288	break;
754d00ae	289	if (size < count) {
	290	fprintf(out,
	291	"Disassembler disagrees with translator over instruction "
	292	"decoding\n"
	293	"Please report this to qemu-devel@nongnu.org\n");
	294	break;
	295	}
c27004ec FB	296	}
	297	}
	298
	299	/* Disassemble this for me please... (debugging). */
	300	void disas(FILE out, void code, unsigned long size)
	301	{
b0b0f1c9	302	uintptr_t pc;
c27004ec	303	int count;
f4359b9f	304	CPUDebug s;
c27004ec FB	305	int (print_insn)(bfd_vma pc, disassemble_info info);
c27004ec FB	306
f4359b9f BS	307	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
f4359b9f BS	308	s.info.print_address_func = generic_print_host_address;
c27004ec	309
f4359b9f BS	310	s.info.buffer = code;
	311	s.info.buffer_vma = (uintptr_t)code;
	312	s.info.buffer_length = size;
b9adb4a6	313
e2542fe2	314	#ifdef HOST_WORDS_BIGENDIAN
f4359b9f	315	s.info.endian = BFD_ENDIAN_BIG;
b9adb4a6	316	#else
f4359b9f	317	s.info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	318	#endif
5826e519 SW	319	#if defined(CONFIG_TCG_INTERPRETER)
	320	print_insn = print_insn_tci;
	321	#elif defined(__i386__)
f4359b9f	322	s.info.mach = bfd_mach_i386_i386;
c27004ec	323	print_insn = print_insn_i386;
bc51c5c9	324	#elif defined(__x86_64__)
f4359b9f	325	s.info.mach = bfd_mach_x86_64;
c27004ec	326	print_insn = print_insn_i386;
e58ffeb3	327	#elif defined(_ARCH_PPC)
c27004ec	328	print_insn = print_insn_ppc;
a993ba85	329	#elif defined(__alpha__)
c27004ec	330	print_insn = print_insn_alpha;
aa0aa4fa	331	#elif defined(__sparc__)
c27004ec	332	print_insn = print_insn_sparc;
f4359b9f	333	s.info.mach = bfd_mach_sparc_v9b;
5fafdf24	334	#elif defined(__arm__)
c27004ec	335	print_insn = print_insn_arm;
6af0bf9c FB	336	#elif defined(__MIPSEB__)
	337	print_insn = print_insn_big_mips;
	338	#elif defined(__MIPSEL__)
	339	print_insn = print_insn_little_mips;
48024e4a FB	340	#elif defined(__m68k__)
48024e4a FB	341	print_insn = print_insn_m68k;
8f860bb8 TS	342	#elif defined(__s390__)
8f860bb8 TS	343	print_insn = print_insn_s390;
f54b3f92 AJ	344	#elif defined(__hppa__)
f54b3f92 AJ	345	print_insn = print_insn_hppa;
903ec55c AJ	346	#elif defined(__ia64__)
903ec55c AJ	347	print_insn = print_insn_ia64;
b9adb4a6	348	#else
b8076a74 FB	349	fprintf(out, "0x%lx: Asm output not supported on this arch\n",
b8076a74 FB	350	(long) code);
c27004ec	351	return;
b9adb4a6	352	#endif
b0b0f1c9 SW	353	for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
b0b0f1c9 SW	354	fprintf(out, "0x%08" PRIxPTR ": ", pc);
f4359b9f	355	count = print_insn(pc, &s.info);
b9adb4a6 FB	356	fprintf(out, "\n");
	357	if (count < 0)
	358	break;
	359	}
	360	}
	361
	362	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	363	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6	364	{
49918a75	365	const char *symbol = "";
e80cfcfc	366	struct syminfo *s;
3b46e624	367
e80cfcfc	368	for (s = syminfos; s; s = s->next) {
49918a75 PB	369	symbol = s->lookup_symbol(s, orig_addr);
	370	if (symbol[0] != '\0') {
	371	break;
	372	}
b9adb4a6	373	}
49918a75 PB	374
49918a75 PB	375	return symbol;
b9adb4a6	376	}
9307c4c1 FB	377
	378	#if !defined(CONFIG_USER_ONLY)
	379
83c9089e	380	#include "monitor/monitor.h"
3d2cfdf1	381
9307c4c1 FB	382	static int monitor_disas_is_physical;
	383
	384	static int
a5f1b965 BS	385	monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
a5f1b965 BS	386	struct disassemble_info *info)
9307c4c1	387	{
f4359b9f BS	388	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	389
9307c4c1	390	if (monitor_disas_is_physical) {
54f7b4a3	391	cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1	392	} else {
f4359b9f	393	cpu_memory_rw_debug(s->env, memaddr,myaddr, length, 0);
9307c4c1 FB	394	}
	395	return 0;
	396	}
	397
8b7968f7 SW	398	static int GCC_FMT_ATTR(2, 3)
8b7968f7 SW	399	monitor_fprintf(FILE stream, const char fmt, ...)
3d2cfdf1 FB	400	{
	401	va_list ap;
	402	va_start(ap, fmt);
376253ec	403	monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1 FB	404	va_end(ap);
	405	return 0;
	406	}
	407
9349b4f9	408	void monitor_disas(Monitor mon, CPUArchState env,
6a00d601	409	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	410	{
9307c4c1	411	int count, i;
f4359b9f	412	CPUDebug s;
9307c4c1 FB	413	int (print_insn)(bfd_vma pc, disassemble_info info);
9307c4c1 FB	414
f4359b9f	415	INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
9307c4c1	416
f4359b9f	417	s.env = env;
9307c4c1	418	monitor_disas_is_physical = is_physical;
f4359b9f BS	419	s.info.read_memory_func = monitor_read_memory;
f4359b9f BS	420	s.info.print_address_func = generic_print_target_address;
9307c4c1	421
f4359b9f	422	s.info.buffer_vma = pc;
9307c4c1 FB	423
9307c4c1 FB	424	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	425	s.info.endian = BFD_ENDIAN_BIG;
9307c4c1	426	#else
f4359b9f	427	s.info.endian = BFD_ENDIAN_LITTLE;
9307c4c1 FB	428	#endif
9307c4c1 FB	429	#if defined(TARGET_I386)
f4359b9f BS	430	if (flags == 2) {
	431	s.info.mach = bfd_mach_x86_64;
	432	} else if (flags == 1) {
	433	s.info.mach = bfd_mach_i386_i8086;
	434	} else {
	435	s.info.mach = bfd_mach_i386_i386;
	436	}
9307c4c1 FB	437	print_insn = print_insn_i386;
	438	#elif defined(TARGET_ARM)
	439	print_insn = print_insn_arm;
cbd669da TS	440	#elif defined(TARGET_ALPHA)
cbd669da TS	441	print_insn = print_insn_alpha;
9307c4c1 FB	442	#elif defined(TARGET_SPARC)
9307c4c1 FB	443	print_insn = print_insn_sparc;
682c4f15	444	#ifdef TARGET_SPARC64
f4359b9f	445	s.info.mach = bfd_mach_sparc_v9b;
682c4f15	446	#endif
9307c4c1	447	#elif defined(TARGET_PPC)
a2458627	448	#ifdef TARGET_PPC64
f4359b9f	449	s.info.mach = bfd_mach_ppc64;
a2458627	450	#else
f4359b9f	451	s.info.mach = bfd_mach_ppc;
a2458627	452	#endif
9307c4c1	453	print_insn = print_insn_ppc;
e6e5906b PB	454	#elif defined(TARGET_M68K)
e6e5906b PB	455	print_insn = print_insn_m68k;
6af0bf9c	456	#elif defined(TARGET_MIPS)
76b3030c	457	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	458	print_insn = print_insn_big_mips;
76b3030c FB	459	#else
	460	print_insn = print_insn_little_mips;
	461	#endif
b4e1f077	462	#elif defined(TARGET_SH4)
f4359b9f	463	s.info.mach = bfd_mach_sh4;
b4e1f077	464	print_insn = print_insn_sh;
db500609	465	#elif defined(TARGET_S390X)
f4359b9f	466	s.info.mach = bfd_mach_s390_64;
db500609	467	print_insn = print_insn_s390;
bd86a88e AG	468	#elif defined(TARGET_MOXIE)
	469	s.info.mach = bfd_arch_moxie;
	470	print_insn = print_insn_moxie;
79368f49	471	#elif defined(TARGET_LM32)
f4359b9f	472	s.info.mach = bfd_mach_lm32;
79368f49	473	print_insn = print_insn_lm32;
9307c4c1	474	#else
376253ec AL	475	monitor_printf(mon, "0x" TARGET_FMT_lx
376253ec AL	476	": Asm output not supported on this arch\n", pc);
9307c4c1 FB	477	return;
	478	#endif
	479
	480	for(i = 0; i < nb_insn; i++) {
376253ec	481	monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
f4359b9f	482	count = print_insn(pc, &s.info);
376253ec	483	monitor_printf(mon, "\n");
9307c4c1 FB	484	if (count < 0)
	485	break;
	486	pc += count;
	487	}
	488	}
	489	#endif