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Fix Slavio interrupt controller debugging output
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CommitLineData
b4608c04
FB
1/*
2 * gdb server stub
3 *
3475187d 4 * Copyright (c) 2003-2005 Fabrice Bellard
b4608c04
FB
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
978efd6a 20#include "config.h"
1fddef4b
FB
21#ifdef CONFIG_USER_ONLY
22#include <stdlib.h>
23#include <stdio.h>
24#include <stdarg.h>
25#include <string.h>
26#include <errno.h>
27#include <unistd.h>
978efd6a 28#include <fcntl.h>
1fddef4b
FB
29
30#include "qemu.h"
31#else
67b915a5 32#include "vl.h"
1fddef4b 33#endif
67b915a5 34
8f447cc7
FB
35#include "qemu_socket.h"
36#ifdef _WIN32
37/* XXX: these constants may be independent of the host ones even for Unix */
38#ifndef SIGTRAP
39#define SIGTRAP 5
40#endif
41#ifndef SIGINT
42#define SIGINT 2
43#endif
44#else
b4608c04 45#include <signal.h>
8f447cc7 46#endif
b4608c04 47
4abe615b 48//#define DEBUG_GDB
b4608c04 49
858693c6
FB
50enum RSState {
51 RS_IDLE,
52 RS_GETLINE,
53 RS_CHKSUM1,
54 RS_CHKSUM2,
a2d1ebaf 55 RS_SYSCALL,
858693c6 56};
858693c6 57typedef struct GDBState {
6a00d601 58 CPUState *env; /* current CPU */
41625033 59 enum RSState state; /* parsing state */
858693c6
FB
60 char line_buf[4096];
61 int line_buf_index;
62 int line_csum;
4046d913
PB
63 char last_packet[4100];
64 int last_packet_len;
41625033 65#ifdef CONFIG_USER_ONLY
4046d913 66 int fd;
41625033 67 int running_state;
4046d913
PB
68#else
69 CharDriverState *chr;
41625033 70#endif
858693c6 71} GDBState;
b4608c04 72
1fddef4b 73#ifdef CONFIG_USER_ONLY
4046d913
PB
74/* XXX: This is not thread safe. Do we care? */
75static int gdbserver_fd = -1;
76
1fddef4b
FB
77/* XXX: remove this hack. */
78static GDBState gdbserver_state;
1fddef4b 79
858693c6 80static int get_char(GDBState *s)
b4608c04
FB
81{
82 uint8_t ch;
83 int ret;
84
85 for(;;) {
8f447cc7 86 ret = recv(s->fd, &ch, 1, 0);
b4608c04
FB
87 if (ret < 0) {
88 if (errno != EINTR && errno != EAGAIN)
89 return -1;
90 } else if (ret == 0) {
91 return -1;
92 } else {
93 break;
94 }
95 }
96 return ch;
97}
4046d913 98#endif
b4608c04 99
a2d1ebaf
PB
100/* GDB stub state for use by semihosting syscalls. */
101static GDBState *gdb_syscall_state;
102static gdb_syscall_complete_cb gdb_current_syscall_cb;
103
104enum {
105 GDB_SYS_UNKNOWN,
106 GDB_SYS_ENABLED,
107 GDB_SYS_DISABLED,
108} gdb_syscall_mode;
109
110/* If gdb is connected when the first semihosting syscall occurs then use
111 remote gdb syscalls. Otherwise use native file IO. */
112int use_gdb_syscalls(void)
113{
114 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
115 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
116 : GDB_SYS_DISABLED);
117 }
118 return gdb_syscall_mode == GDB_SYS_ENABLED;
119}
120
858693c6 121static void put_buffer(GDBState *s, const uint8_t *buf, int len)
b4608c04 122{
4046d913 123#ifdef CONFIG_USER_ONLY
b4608c04
FB
124 int ret;
125
126 while (len > 0) {
8f447cc7 127 ret = send(s->fd, buf, len, 0);
b4608c04
FB
128 if (ret < 0) {
129 if (errno != EINTR && errno != EAGAIN)
130 return;
131 } else {
132 buf += ret;
133 len -= ret;
134 }
135 }
4046d913
PB
136#else
137 qemu_chr_write(s->chr, buf, len);
138#endif
b4608c04
FB
139}
140
141static inline int fromhex(int v)
142{
143 if (v >= '0' && v <= '9')
144 return v - '0';
145 else if (v >= 'A' && v <= 'F')
146 return v - 'A' + 10;
147 else if (v >= 'a' && v <= 'f')
148 return v - 'a' + 10;
149 else
150 return 0;
151}
152
153static inline int tohex(int v)
154{
155 if (v < 10)
156 return v + '0';
157 else
158 return v - 10 + 'a';
159}
160
161static void memtohex(char *buf, const uint8_t *mem, int len)
162{
163 int i, c;
164 char *q;
165 q = buf;
166 for(i = 0; i < len; i++) {
167 c = mem[i];
168 *q++ = tohex(c >> 4);
169 *q++ = tohex(c & 0xf);
170 }
171 *q = '\0';
172}
173
174static void hextomem(uint8_t *mem, const char *buf, int len)
175{
176 int i;
177
178 for(i = 0; i < len; i++) {
179 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
180 buf += 2;
181 }
182}
183
b4608c04 184/* return -1 if error, 0 if OK */
858693c6 185static int put_packet(GDBState *s, char *buf)
b4608c04 186{
4046d913
PB
187 int len, csum, i;
188 char *p;
b4608c04
FB
189
190#ifdef DEBUG_GDB
191 printf("reply='%s'\n", buf);
192#endif
193
194 for(;;) {
4046d913
PB
195 p = s->last_packet;
196 *(p++) = '$';
b4608c04 197 len = strlen(buf);
4046d913
PB
198 memcpy(p, buf, len);
199 p += len;
b4608c04
FB
200 csum = 0;
201 for(i = 0; i < len; i++) {
202 csum += buf[i];
203 }
4046d913
PB
204 *(p++) = '#';
205 *(p++) = tohex((csum >> 4) & 0xf);
206 *(p++) = tohex((csum) & 0xf);
b4608c04 207
4046d913
PB
208 s->last_packet_len = p - s->last_packet;
209 put_buffer(s, s->last_packet, s->last_packet_len);
b4608c04 210
4046d913
PB
211#ifdef CONFIG_USER_ONLY
212 i = get_char(s);
213 if (i < 0)
b4608c04 214 return -1;
4046d913 215 if (i == '+')
b4608c04 216 break;
4046d913
PB
217#else
218 break;
219#endif
b4608c04
FB
220 }
221 return 0;
222}
223
6da41eaf
FB
224#if defined(TARGET_I386)
225
6da41eaf
FB
226static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
227{
e95c8d51 228 uint32_t *registers = (uint32_t *)mem_buf;
6da41eaf
FB
229 int i, fpus;
230
231 for(i = 0; i < 8; i++) {
e95c8d51 232 registers[i] = env->regs[i];
6da41eaf 233 }
e95c8d51
FB
234 registers[8] = env->eip;
235 registers[9] = env->eflags;
236 registers[10] = env->segs[R_CS].selector;
237 registers[11] = env->segs[R_SS].selector;
238 registers[12] = env->segs[R_DS].selector;
239 registers[13] = env->segs[R_ES].selector;
240 registers[14] = env->segs[R_FS].selector;
241 registers[15] = env->segs[R_GS].selector;
6da41eaf
FB
242 /* XXX: convert floats */
243 for(i = 0; i < 8; i++) {
244 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
245 }
e95c8d51 246 registers[36] = env->fpuc;
6da41eaf 247 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
e95c8d51
FB
248 registers[37] = fpus;
249 registers[38] = 0; /* XXX: convert tags */
250 registers[39] = 0; /* fiseg */
251 registers[40] = 0; /* fioff */
252 registers[41] = 0; /* foseg */
253 registers[42] = 0; /* fooff */
254 registers[43] = 0; /* fop */
255
256 for(i = 0; i < 16; i++)
257 tswapls(&registers[i]);
258 for(i = 36; i < 44; i++)
259 tswapls(&registers[i]);
6da41eaf
FB
260 return 44 * 4;
261}
262
263static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
264{
265 uint32_t *registers = (uint32_t *)mem_buf;
266 int i;
267
268 for(i = 0; i < 8; i++) {
269 env->regs[i] = tswapl(registers[i]);
270 }
e95c8d51
FB
271 env->eip = tswapl(registers[8]);
272 env->eflags = tswapl(registers[9]);
6da41eaf
FB
273#if defined(CONFIG_USER_ONLY)
274#define LOAD_SEG(index, sreg)\
275 if (tswapl(registers[index]) != env->segs[sreg].selector)\
276 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
277 LOAD_SEG(10, R_CS);
278 LOAD_SEG(11, R_SS);
279 LOAD_SEG(12, R_DS);
280 LOAD_SEG(13, R_ES);
281 LOAD_SEG(14, R_FS);
282 LOAD_SEG(15, R_GS);
283#endif
284}
285
9e62fd7f 286#elif defined (TARGET_PPC)
9e62fd7f
FB
287static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
288{
a541f297 289 uint32_t *registers = (uint32_t *)mem_buf, tmp;
9e62fd7f
FB
290 int i;
291
292 /* fill in gprs */
a541f297 293 for(i = 0; i < 32; i++) {
e95c8d51 294 registers[i] = tswapl(env->gpr[i]);
9e62fd7f
FB
295 }
296 /* fill in fprs */
297 for (i = 0; i < 32; i++) {
e95c8d51
FB
298 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
299 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
9e62fd7f
FB
300 }
301 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 302 registers[96] = tswapl(env->nip);
3fc6c082 303 registers[97] = tswapl(do_load_msr(env));
9e62fd7f
FB
304 tmp = 0;
305 for (i = 0; i < 8; i++)
a541f297 306 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
e95c8d51
FB
307 registers[98] = tswapl(tmp);
308 registers[99] = tswapl(env->lr);
309 registers[100] = tswapl(env->ctr);
76a66253 310 registers[101] = tswapl(ppc_load_xer(env));
e95c8d51 311 registers[102] = 0;
a541f297
FB
312
313 return 103 * 4;
9e62fd7f
FB
314}
315
316static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
317{
318 uint32_t *registers = (uint32_t *)mem_buf;
319 int i;
320
321 /* fill in gprs */
322 for (i = 0; i < 32; i++) {
e95c8d51 323 env->gpr[i] = tswapl(registers[i]);
9e62fd7f
FB
324 }
325 /* fill in fprs */
326 for (i = 0; i < 32; i++) {
e95c8d51
FB
327 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
328 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
9e62fd7f
FB
329 }
330 /* nip, msr, ccr, lnk, ctr, xer, mq */
e95c8d51 331 env->nip = tswapl(registers[96]);
3fc6c082 332 do_store_msr(env, tswapl(registers[97]));
e95c8d51 333 registers[98] = tswapl(registers[98]);
9e62fd7f 334 for (i = 0; i < 8; i++)
a541f297 335 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
e95c8d51
FB
336 env->lr = tswapl(registers[99]);
337 env->ctr = tswapl(registers[100]);
76a66253 338 ppc_store_xer(env, tswapl(registers[101]));
e95c8d51
FB
339}
340#elif defined (TARGET_SPARC)
341static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
342{
3475187d 343 target_ulong *registers = (target_ulong *)mem_buf;
e95c8d51
FB
344 int i;
345
346 /* fill in g0..g7 */
48b2c193 347 for(i = 0; i < 8; i++) {
e95c8d51
FB
348 registers[i] = tswapl(env->gregs[i]);
349 }
350 /* fill in register window */
351 for(i = 0; i < 24; i++) {
352 registers[i + 8] = tswapl(env->regwptr[i]);
353 }
9d9754a3 354#ifndef TARGET_SPARC64
e95c8d51
FB
355 /* fill in fprs */
356 for (i = 0; i < 32; i++) {
357 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
358 }
359 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
360 registers[64] = tswapl(env->y);
3475187d
FB
361 {
362 target_ulong tmp;
363
364 tmp = GET_PSR(env);
365 registers[65] = tswapl(tmp);
366 }
e95c8d51
FB
367 registers[66] = tswapl(env->wim);
368 registers[67] = tswapl(env->tbr);
369 registers[68] = tswapl(env->pc);
370 registers[69] = tswapl(env->npc);
371 registers[70] = tswapl(env->fsr);
372 registers[71] = 0; /* csr */
373 registers[72] = 0;
3475187d
FB
374 return 73 * sizeof(target_ulong);
375#else
9d9754a3
FB
376 /* fill in fprs */
377 for (i = 0; i < 64; i += 2) {
378 uint64_t tmp;
379
8979596d
BS
380 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
381 tmp |= *(uint32_t *)&env->fpr[i + 1];
382 registers[i / 2 + 32] = tswap64(tmp);
3475187d 383 }
9d9754a3
FB
384 registers[64] = tswapl(env->pc);
385 registers[65] = tswapl(env->npc);
17d996e1
BS
386 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
387 ((env->asi & 0xff) << 24) |
388 ((env->pstate & 0xfff) << 8) |
389 GET_CWP64(env));
9d9754a3
FB
390 registers[67] = tswapl(env->fsr);
391 registers[68] = tswapl(env->fprs);
392 registers[69] = tswapl(env->y);
393 return 70 * sizeof(target_ulong);
3475187d 394#endif
e95c8d51
FB
395}
396
397static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
398{
3475187d 399 target_ulong *registers = (target_ulong *)mem_buf;
e95c8d51
FB
400 int i;
401
402 /* fill in g0..g7 */
403 for(i = 0; i < 7; i++) {
404 env->gregs[i] = tswapl(registers[i]);
405 }
406 /* fill in register window */
407 for(i = 0; i < 24; i++) {
3475187d 408 env->regwptr[i] = tswapl(registers[i + 8]);
e95c8d51 409 }
9d9754a3 410#ifndef TARGET_SPARC64
e95c8d51
FB
411 /* fill in fprs */
412 for (i = 0; i < 32; i++) {
413 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
414 }
415 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
416 env->y = tswapl(registers[64]);
e80cfcfc 417 PUT_PSR(env, tswapl(registers[65]));
e95c8d51
FB
418 env->wim = tswapl(registers[66]);
419 env->tbr = tswapl(registers[67]);
420 env->pc = tswapl(registers[68]);
421 env->npc = tswapl(registers[69]);
422 env->fsr = tswapl(registers[70]);
3475187d 423#else
9d9754a3 424 for (i = 0; i < 64; i += 2) {
8979596d
BS
425 uint64_t tmp;
426
427 tmp = tswap64(registers[i / 2 + 32]);
428 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
429 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
3475187d 430 }
9d9754a3
FB
431 env->pc = tswapl(registers[64]);
432 env->npc = tswapl(registers[65]);
17d996e1
BS
433 {
434 uint64_t tmp = tswapl(registers[66]);
435
436 PUT_CCR(env, tmp >> 32);
437 env->asi = (tmp >> 24) & 0xff;
438 env->pstate = (tmp >> 8) & 0xfff;
439 PUT_CWP64(env, tmp & 0xff);
440 }
9d9754a3
FB
441 env->fsr = tswapl(registers[67]);
442 env->fprs = tswapl(registers[68]);
443 env->y = tswapl(registers[69]);
3475187d 444#endif
9e62fd7f 445}
1fddef4b
FB
446#elif defined (TARGET_ARM)
447static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
448{
449 int i;
450 uint8_t *ptr;
451
452 ptr = mem_buf;
453 /* 16 core integer registers (4 bytes each). */
454 for (i = 0; i < 16; i++)
455 {
456 *(uint32_t *)ptr = tswapl(env->regs[i]);
457 ptr += 4;
458 }
459 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
460 Not yet implemented. */
461 memset (ptr, 0, 8 * 12 + 4);
462 ptr += 8 * 12 + 4;
463 /* CPSR (4 bytes). */
b5ff1b31 464 *(uint32_t *)ptr = tswapl (cpsr_read(env));
1fddef4b
FB
465 ptr += 4;
466
467 return ptr - mem_buf;
468}
6da41eaf 469
1fddef4b
FB
470static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
471{
472 int i;
473 uint8_t *ptr;
474
475 ptr = mem_buf;
476 /* Core integer registers. */
477 for (i = 0; i < 16; i++)
478 {
479 env->regs[i] = tswapl(*(uint32_t *)ptr);
480 ptr += 4;
481 }
482 /* Ignore FPA regs and scr. */
483 ptr += 8 * 12 + 4;
b5ff1b31 484 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
1fddef4b 485}
e6e5906b
PB
486#elif defined (TARGET_M68K)
487static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
488{
489 int i;
490 uint8_t *ptr;
491 CPU_DoubleU u;
492
493 ptr = mem_buf;
494 /* D0-D7 */
495 for (i = 0; i < 8; i++) {
496 *(uint32_t *)ptr = tswapl(env->dregs[i]);
497 ptr += 4;
498 }
499 /* A0-A7 */
500 for (i = 0; i < 8; i++) {
501 *(uint32_t *)ptr = tswapl(env->aregs[i]);
502 ptr += 4;
503 }
504 *(uint32_t *)ptr = tswapl(env->sr);
505 ptr += 4;
506 *(uint32_t *)ptr = tswapl(env->pc);
507 ptr += 4;
508 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
509 ColdFire has 8-bit double precision registers. */
510 for (i = 0; i < 8; i++) {
511 u.d = env->fregs[i];
512 *(uint32_t *)ptr = tswap32(u.l.upper);
513 *(uint32_t *)ptr = tswap32(u.l.lower);
514 }
515 /* FP control regs (not implemented). */
516 memset (ptr, 0, 3 * 4);
517 ptr += 3 * 4;
518
519 return ptr - mem_buf;
520}
521
522static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
523{
524 int i;
525 uint8_t *ptr;
526 CPU_DoubleU u;
527
528 ptr = mem_buf;
529 /* D0-D7 */
530 for (i = 0; i < 8; i++) {
531 env->dregs[i] = tswapl(*(uint32_t *)ptr);
532 ptr += 4;
533 }
534 /* A0-A7 */
535 for (i = 0; i < 8; i++) {
536 env->aregs[i] = tswapl(*(uint32_t *)ptr);
537 ptr += 4;
538 }
539 env->sr = tswapl(*(uint32_t *)ptr);
540 ptr += 4;
541 env->pc = tswapl(*(uint32_t *)ptr);
542 ptr += 4;
543 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
544 ColdFire has 8-bit double precision registers. */
545 for (i = 0; i < 8; i++) {
546 u.l.upper = tswap32(*(uint32_t *)ptr);
547 u.l.lower = tswap32(*(uint32_t *)ptr);
548 env->fregs[i] = u.d;
549 }
550 /* FP control regs (not implemented). */
551 ptr += 3 * 4;
552}
6f970bd9
FB
553#elif defined (TARGET_MIPS)
554static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
555{
556 int i;
557 uint8_t *ptr;
558
559 ptr = mem_buf;
560 for (i = 0; i < 32; i++)
561 {
2052caa7
TS
562 *(target_ulong *)ptr = tswapl(env->gpr[i]);
563 ptr += sizeof(target_ulong);
6f970bd9
FB
564 }
565
2052caa7
TS
566 *(target_ulong *)ptr = tswapl(env->CP0_Status);
567 ptr += sizeof(target_ulong);
6f970bd9 568
2052caa7
TS
569 *(target_ulong *)ptr = tswapl(env->LO);
570 ptr += sizeof(target_ulong);
6f970bd9 571
2052caa7
TS
572 *(target_ulong *)ptr = tswapl(env->HI);
573 ptr += sizeof(target_ulong);
6f970bd9 574
2052caa7
TS
575 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
576 ptr += sizeof(target_ulong);
6f970bd9 577
2052caa7
TS
578 *(target_ulong *)ptr = tswapl(env->CP0_Cause);
579 ptr += sizeof(target_ulong);
6f970bd9 580
2052caa7
TS
581 *(target_ulong *)ptr = tswapl(env->PC);
582 ptr += sizeof(target_ulong);
6f970bd9 583
36d23958 584 if (env->CP0_Config1 & (1 << CP0C1_FP))
8e33c08c 585 {
36d23958
TS
586 for (i = 0; i < 32; i++)
587 {
2052caa7
TS
588 *(target_ulong *)ptr = tswapl(env->fpr[i].fs[FP_ENDIAN_IDX]);
589 ptr += sizeof(target_ulong);
36d23958 590 }
8e33c08c 591
2052caa7
TS
592 *(target_ulong *)ptr = tswapl(env->fcr31);
593 ptr += sizeof(target_ulong);
8e33c08c 594
2052caa7
TS
595 *(target_ulong *)ptr = tswapl(env->fcr0);
596 ptr += sizeof(target_ulong);
36d23958 597 }
8e33c08c 598
6f970bd9 599 /* 32 FP registers, fsr, fir, fp. Not yet implemented. */
8e33c08c 600 /* what's 'fp' mean here? */
6f970bd9
FB
601
602 return ptr - mem_buf;
603}
604
8e33c08c
TS
605/* convert MIPS rounding mode in FCR31 to IEEE library */
606static unsigned int ieee_rm[] =
607 {
608 float_round_nearest_even,
609 float_round_to_zero,
610 float_round_up,
611 float_round_down
612 };
613#define RESTORE_ROUNDING_MODE \
614 set_float_rounding_mode(ieee_rm[env->fcr31 & 3], &env->fp_status)
615
6f970bd9
FB
616static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
617{
618 int i;
619 uint8_t *ptr;
620
621 ptr = mem_buf;
622 for (i = 0; i < 32; i++)
623 {
2052caa7
TS
624 env->gpr[i] = tswapl(*(target_ulong *)ptr);
625 ptr += sizeof(target_ulong);
6f970bd9
FB
626 }
627
2052caa7
TS
628 env->CP0_Status = tswapl(*(target_ulong *)ptr);
629 ptr += sizeof(target_ulong);
6f970bd9 630
2052caa7
TS
631 env->LO = tswapl(*(target_ulong *)ptr);
632 ptr += sizeof(target_ulong);
6f970bd9 633
2052caa7
TS
634 env->HI = tswapl(*(target_ulong *)ptr);
635 ptr += sizeof(target_ulong);
6f970bd9 636
2052caa7
TS
637 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
638 ptr += sizeof(target_ulong);
6f970bd9 639
2052caa7
TS
640 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
641 ptr += sizeof(target_ulong);
6f970bd9 642
2052caa7
TS
643 env->PC = tswapl(*(target_ulong *)ptr);
644 ptr += sizeof(target_ulong);
8e33c08c 645
36d23958 646 if (env->CP0_Config1 & (1 << CP0C1_FP))
8e33c08c 647 {
36d23958
TS
648 for (i = 0; i < 32; i++)
649 {
2052caa7
TS
650 env->fpr[i].fs[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
651 ptr += sizeof(target_ulong);
36d23958 652 }
8e33c08c 653
2052caa7
TS
654 env->fcr31 = tswapl(*(target_ulong *)ptr) & 0x0183FFFF;
655 ptr += sizeof(target_ulong);
8e33c08c 656
2052caa7
TS
657 env->fcr0 = tswapl(*(target_ulong *)ptr);
658 ptr += sizeof(target_ulong);
8e33c08c 659
36d23958
TS
660 /* set rounding mode */
661 RESTORE_ROUNDING_MODE;
8e33c08c
TS
662
663#ifndef CONFIG_SOFTFLOAT
36d23958
TS
664 /* no floating point exception for native float */
665 SET_FP_ENABLE(env->fcr31, 0);
8e33c08c 666#endif
36d23958 667 }
6f970bd9 668}
fdf9b3e8 669#elif defined (TARGET_SH4)
6ef99fc5
TS
670
671/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
672
fdf9b3e8
FB
673static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
674{
675 uint32_t *ptr = (uint32_t *)mem_buf;
676 int i;
677
678#define SAVE(x) *ptr++=tswapl(x)
9c2a9ea1
PB
679 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
680 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
681 } else {
682 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
683 }
684 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
fdf9b3e8
FB
685 SAVE (env->pc);
686 SAVE (env->pr);
687 SAVE (env->gbr);
688 SAVE (env->vbr);
689 SAVE (env->mach);
690 SAVE (env->macl);
691 SAVE (env->sr);
6ef99fc5
TS
692 SAVE (env->fpul);
693 SAVE (env->fpscr);
694 for (i = 0; i < 16; i++)
695 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
696 SAVE (env->ssr);
697 SAVE (env->spc);
698 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
699 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
fdf9b3e8
FB
700 return ((uint8_t *)ptr - mem_buf);
701}
702
703static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
704{
705 uint32_t *ptr = (uint32_t *)mem_buf;
706 int i;
707
708#define LOAD(x) (x)=*ptr++;
9c2a9ea1
PB
709 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
710 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
711 } else {
712 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
713 }
714 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
fdf9b3e8
FB
715 LOAD (env->pc);
716 LOAD (env->pr);
717 LOAD (env->gbr);
718 LOAD (env->vbr);
719 LOAD (env->mach);
720 LOAD (env->macl);
721 LOAD (env->sr);
6ef99fc5
TS
722 LOAD (env->fpul);
723 LOAD (env->fpscr);
724 for (i = 0; i < 16; i++)
725 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
726 LOAD (env->ssr);
727 LOAD (env->spc);
728 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
729 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
fdf9b3e8 730}
1fddef4b 731#else
6da41eaf
FB
732static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
733{
734 return 0;
735}
736
737static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
738{
739}
740
741#endif
b4608c04 742
1fddef4b 743static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
b4608c04 744{
b4608c04 745 const char *p;
858693c6 746 int ch, reg_size, type;
b4608c04
FB
747 char buf[4096];
748 uint8_t mem_buf[2000];
749 uint32_t *registers;
9d9754a3 750 target_ulong addr, len;
b4608c04 751
858693c6
FB
752#ifdef DEBUG_GDB
753 printf("command='%s'\n", line_buf);
754#endif
755 p = line_buf;
756 ch = *p++;
757 switch(ch) {
758 case '?':
1fddef4b 759 /* TODO: Make this return the correct value for user-mode. */
858693c6
FB
760 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
761 put_packet(s, buf);
762 break;
763 case 'c':
764 if (*p != '\0') {
9d9754a3 765 addr = strtoull(p, (char **)&p, 16);
4c3a88a2 766#if defined(TARGET_I386)
858693c6 767 env->eip = addr;
5be1a8e0 768#elif defined (TARGET_PPC)
858693c6 769 env->nip = addr;
8d5f07fa
FB
770#elif defined (TARGET_SPARC)
771 env->pc = addr;
772 env->npc = addr + 4;
b5ff1b31
FB
773#elif defined (TARGET_ARM)
774 env->regs[15] = addr;
fdf9b3e8 775#elif defined (TARGET_SH4)
8fac5803
TS
776 env->pc = addr;
777#elif defined (TARGET_MIPS)
778 env->PC = addr;
4c3a88a2 779#endif
858693c6 780 }
41625033
FB
781#ifdef CONFIG_USER_ONLY
782 s->running_state = 1;
783#else
784 vm_start();
785#endif
786 return RS_IDLE;
858693c6
FB
787 case 's':
788 if (*p != '\0') {
8fac5803 789 addr = strtoull(p, (char **)&p, 16);
c33a346e 790#if defined(TARGET_I386)
858693c6 791 env->eip = addr;
5be1a8e0 792#elif defined (TARGET_PPC)
858693c6 793 env->nip = addr;
8d5f07fa
FB
794#elif defined (TARGET_SPARC)
795 env->pc = addr;
796 env->npc = addr + 4;
b5ff1b31
FB
797#elif defined (TARGET_ARM)
798 env->regs[15] = addr;
fdf9b3e8 799#elif defined (TARGET_SH4)
8fac5803
TS
800 env->pc = addr;
801#elif defined (TARGET_MIPS)
802 env->PC = addr;
c33a346e 803#endif
858693c6
FB
804 }
805 cpu_single_step(env, 1);
41625033
FB
806#ifdef CONFIG_USER_ONLY
807 s->running_state = 1;
808#else
809 vm_start();
810#endif
811 return RS_IDLE;
a2d1ebaf
PB
812 case 'F':
813 {
814 target_ulong ret;
815 target_ulong err;
816
817 ret = strtoull(p, (char **)&p, 16);
818 if (*p == ',') {
819 p++;
820 err = strtoull(p, (char **)&p, 16);
821 } else {
822 err = 0;
823 }
824 if (*p == ',')
825 p++;
826 type = *p;
827 if (gdb_current_syscall_cb)
828 gdb_current_syscall_cb(s->env, ret, err);
829 if (type == 'C') {
830 put_packet(s, "T02");
831 } else {
832#ifdef CONFIG_USER_ONLY
833 s->running_state = 1;
834#else
835 vm_start();
836#endif
837 }
838 }
839 break;
858693c6
FB
840 case 'g':
841 reg_size = cpu_gdb_read_registers(env, mem_buf);
842 memtohex(buf, mem_buf, reg_size);
843 put_packet(s, buf);
844 break;
845 case 'G':
846 registers = (void *)mem_buf;
847 len = strlen(p) / 2;
848 hextomem((uint8_t *)registers, p, len);
849 cpu_gdb_write_registers(env, mem_buf, len);
850 put_packet(s, "OK");
851 break;
852 case 'm':
9d9754a3 853 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
854 if (*p == ',')
855 p++;
9d9754a3 856 len = strtoull(p, NULL, 16);
6f970bd9
FB
857 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
858 put_packet (s, "E14");
859 } else {
860 memtohex(buf, mem_buf, len);
861 put_packet(s, buf);
862 }
858693c6
FB
863 break;
864 case 'M':
9d9754a3 865 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
866 if (*p == ',')
867 p++;
9d9754a3 868 len = strtoull(p, (char **)&p, 16);
b328f873 869 if (*p == ':')
858693c6
FB
870 p++;
871 hextomem(mem_buf, p, len);
872 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
905f20b1 873 put_packet(s, "E14");
858693c6
FB
874 else
875 put_packet(s, "OK");
876 break;
877 case 'Z':
878 type = strtoul(p, (char **)&p, 16);
879 if (*p == ',')
880 p++;
9d9754a3 881 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
882 if (*p == ',')
883 p++;
9d9754a3 884 len = strtoull(p, (char **)&p, 16);
858693c6
FB
885 if (type == 0 || type == 1) {
886 if (cpu_breakpoint_insert(env, addr) < 0)
887 goto breakpoint_error;
888 put_packet(s, "OK");
6658ffb8
PB
889#ifndef CONFIG_USER_ONLY
890 } else if (type == 2) {
891 if (cpu_watchpoint_insert(env, addr) < 0)
892 goto breakpoint_error;
893 put_packet(s, "OK");
894#endif
858693c6
FB
895 } else {
896 breakpoint_error:
905f20b1 897 put_packet(s, "E22");
858693c6
FB
898 }
899 break;
900 case 'z':
901 type = strtoul(p, (char **)&p, 16);
902 if (*p == ',')
903 p++;
9d9754a3 904 addr = strtoull(p, (char **)&p, 16);
858693c6
FB
905 if (*p == ',')
906 p++;
9d9754a3 907 len = strtoull(p, (char **)&p, 16);
858693c6
FB
908 if (type == 0 || type == 1) {
909 cpu_breakpoint_remove(env, addr);
910 put_packet(s, "OK");
6658ffb8
PB
911#ifndef CONFIG_USER_ONLY
912 } else if (type == 2) {
913 cpu_watchpoint_remove(env, addr);
914 put_packet(s, "OK");
915#endif
858693c6
FB
916 } else {
917 goto breakpoint_error;
918 }
919 break;
831b7825 920#ifdef CONFIG_LINUX_USER
978efd6a
PB
921 case 'q':
922 if (strncmp(p, "Offsets", 7) == 0) {
923 TaskState *ts = env->opaque;
924
fe834d04
TS
925 sprintf(buf,
926 "Text=" TARGET_FMT_lx ";Data=" TARGET_FMT_lx ";Bss=" TARGET_FMT_lx,
927 ts->info->code_offset,
928 ts->info->data_offset,
929 ts->info->data_offset);
978efd6a
PB
930 put_packet(s, buf);
931 break;
932 }
933 /* Fall through. */
934#endif
858693c6
FB
935 default:
936 // unknown_command:
937 /* put empty packet */
938 buf[0] = '\0';
939 put_packet(s, buf);
940 break;
941 }
942 return RS_IDLE;
943}
944
612458f5
FB
945extern void tb_flush(CPUState *env);
946
1fddef4b 947#ifndef CONFIG_USER_ONLY
858693c6
FB
948static void gdb_vm_stopped(void *opaque, int reason)
949{
950 GDBState *s = opaque;
951 char buf[256];
952 int ret;
953
a2d1ebaf
PB
954 if (s->state == RS_SYSCALL)
955 return;
956
858693c6 957 /* disable single step if it was enable */
6a00d601 958 cpu_single_step(s->env, 0);
858693c6 959
e80cfcfc 960 if (reason == EXCP_DEBUG) {
6658ffb8 961 if (s->env->watchpoint_hit) {
aa6290b7
PB
962 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
963 SIGTRAP,
6658ffb8
PB
964 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
965 put_packet(s, buf);
966 s->env->watchpoint_hit = 0;
967 return;
968 }
6a00d601 969 tb_flush(s->env);
858693c6 970 ret = SIGTRAP;
bbeb7b5c
FB
971 } else if (reason == EXCP_INTERRUPT) {
972 ret = SIGINT;
973 } else {
858693c6 974 ret = 0;
bbeb7b5c 975 }
858693c6
FB
976 snprintf(buf, sizeof(buf), "S%02x", ret);
977 put_packet(s, buf);
978}
1fddef4b 979#endif
858693c6 980
a2d1ebaf
PB
981/* Send a gdb syscall request.
982 This accepts limited printf-style format specifiers, specifically:
a87295e8
PB
983 %x - target_ulong argument printed in hex.
984 %lx - 64-bit argument printed in hex.
985 %s - string pointer (target_ulong) and length (int) pair. */
a2d1ebaf
PB
986void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
987{
988 va_list va;
989 char buf[256];
990 char *p;
991 target_ulong addr;
a87295e8 992 uint64_t i64;
a2d1ebaf
PB
993 GDBState *s;
994
995 s = gdb_syscall_state;
996 if (!s)
997 return;
998 gdb_current_syscall_cb = cb;
999 s->state = RS_SYSCALL;
1000#ifndef CONFIG_USER_ONLY
1001 vm_stop(EXCP_DEBUG);
1002#endif
1003 s->state = RS_IDLE;
1004 va_start(va, fmt);
1005 p = buf;
1006 *(p++) = 'F';
1007 while (*fmt) {
1008 if (*fmt == '%') {
1009 fmt++;
1010 switch (*fmt++) {
1011 case 'x':
1012 addr = va_arg(va, target_ulong);
1013 p += sprintf(p, TARGET_FMT_lx, addr);
1014 break;
a87295e8
PB
1015 case 'l':
1016 if (*(fmt++) != 'x')
1017 goto bad_format;
1018 i64 = va_arg(va, uint64_t);
1019 p += sprintf(p, "%" PRIx64, i64);
1020 break;
a2d1ebaf
PB
1021 case 's':
1022 addr = va_arg(va, target_ulong);
1023 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1024 break;
1025 default:
a87295e8 1026 bad_format:
a2d1ebaf
PB
1027 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1028 fmt - 1);
1029 break;
1030 }
1031 } else {
1032 *(p++) = *(fmt++);
1033 }
1034 }
1035 va_end(va);
1036 put_packet(s, buf);
1037#ifdef CONFIG_USER_ONLY
1038 gdb_handlesig(s->env, 0);
1039#else
1040 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1041#endif
1042}
1043
6a00d601 1044static void gdb_read_byte(GDBState *s, int ch)
858693c6 1045{
6a00d601 1046 CPUState *env = s->env;
858693c6
FB
1047 int i, csum;
1048 char reply[1];
1049
1fddef4b 1050#ifndef CONFIG_USER_ONLY
4046d913
PB
1051 if (s->last_packet_len) {
1052 /* Waiting for a response to the last packet. If we see the start
1053 of a new command then abandon the previous response. */
1054 if (ch == '-') {
1055#ifdef DEBUG_GDB
1056 printf("Got NACK, retransmitting\n");
1057#endif
1058 put_buffer(s, s->last_packet, s->last_packet_len);
1059 }
1060#ifdef DEBUG_GDB
1061 else if (ch == '+')
1062 printf("Got ACK\n");
1063 else
1064 printf("Got '%c' when expecting ACK/NACK\n", ch);
1065#endif
1066 if (ch == '+' || ch == '$')
1067 s->last_packet_len = 0;
1068 if (ch != '$')
1069 return;
1070 }
858693c6
FB
1071 if (vm_running) {
1072 /* when the CPU is running, we cannot do anything except stop
1073 it when receiving a char */
1074 vm_stop(EXCP_INTERRUPT);
41625033 1075 } else
1fddef4b 1076#endif
41625033 1077 {
858693c6
FB
1078 switch(s->state) {
1079 case RS_IDLE:
1080 if (ch == '$') {
1081 s->line_buf_index = 0;
1082 s->state = RS_GETLINE;
c33a346e 1083 }
b4608c04 1084 break;
858693c6
FB
1085 case RS_GETLINE:
1086 if (ch == '#') {
1087 s->state = RS_CHKSUM1;
1088 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1089 s->state = RS_IDLE;
4c3a88a2 1090 } else {
858693c6 1091 s->line_buf[s->line_buf_index++] = ch;
4c3a88a2
FB
1092 }
1093 break;
858693c6
FB
1094 case RS_CHKSUM1:
1095 s->line_buf[s->line_buf_index] = '\0';
1096 s->line_csum = fromhex(ch) << 4;
1097 s->state = RS_CHKSUM2;
1098 break;
1099 case RS_CHKSUM2:
1100 s->line_csum |= fromhex(ch);
1101 csum = 0;
1102 for(i = 0; i < s->line_buf_index; i++) {
1103 csum += s->line_buf[i];
1104 }
1105 if (s->line_csum != (csum & 0xff)) {
1106 reply[0] = '-';
1107 put_buffer(s, reply, 1);
1108 s->state = RS_IDLE;
4c3a88a2 1109 } else {
858693c6
FB
1110 reply[0] = '+';
1111 put_buffer(s, reply, 1);
1fddef4b 1112 s->state = gdb_handle_packet(s, env, s->line_buf);
4c3a88a2
FB
1113 }
1114 break;
a2d1ebaf
PB
1115 default:
1116 abort();
858693c6
FB
1117 }
1118 }
1119}
1120
1fddef4b
FB
1121#ifdef CONFIG_USER_ONLY
1122int
1123gdb_handlesig (CPUState *env, int sig)
1124{
1125 GDBState *s;
1126 char buf[256];
1127 int n;
1128
1129 if (gdbserver_fd < 0)
1130 return sig;
1131
1132 s = &gdbserver_state;
1133
1134 /* disable single step if it was enabled */
1135 cpu_single_step(env, 0);
1136 tb_flush(env);
1137
1138 if (sig != 0)
1139 {
1140 snprintf(buf, sizeof(buf), "S%02x", sig);
1141 put_packet(s, buf);
1142 }
1143
1fddef4b
FB
1144 sig = 0;
1145 s->state = RS_IDLE;
41625033
FB
1146 s->running_state = 0;
1147 while (s->running_state == 0) {
1fddef4b
FB
1148 n = read (s->fd, buf, 256);
1149 if (n > 0)
1150 {
1151 int i;
1152
1153 for (i = 0; i < n; i++)
6a00d601 1154 gdb_read_byte (s, buf[i]);
1fddef4b
FB
1155 }
1156 else if (n == 0 || errno != EAGAIN)
1157 {
1158 /* XXX: Connection closed. Should probably wait for annother
1159 connection before continuing. */
1160 return sig;
1161 }
41625033 1162 }
1fddef4b
FB
1163 return sig;
1164}
e9009676
FB
1165
1166/* Tell the remote gdb that the process has exited. */
1167void gdb_exit(CPUState *env, int code)
1168{
1169 GDBState *s;
1170 char buf[4];
1171
1172 if (gdbserver_fd < 0)
1173 return;
1174
1175 s = &gdbserver_state;
1176
1177 snprintf(buf, sizeof(buf), "W%02x", code);
1178 put_packet(s, buf);
1179}
1180
1fddef4b 1181
7c9d8e07 1182static void gdb_accept(void *opaque)
858693c6
FB
1183{
1184 GDBState *s;
1185 struct sockaddr_in sockaddr;
1186 socklen_t len;
1187 int val, fd;
1188
1189 for(;;) {
1190 len = sizeof(sockaddr);
1191 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1192 if (fd < 0 && errno != EINTR) {
1193 perror("accept");
1194 return;
1195 } else if (fd >= 0) {
b4608c04
FB
1196 break;
1197 }
1198 }
858693c6
FB
1199
1200 /* set short latency */
1201 val = 1;
8f447cc7 1202 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
858693c6 1203
1fddef4b
FB
1204 s = &gdbserver_state;
1205 memset (s, 0, sizeof (GDBState));
6a00d601 1206 s->env = first_cpu; /* XXX: allow to change CPU */
858693c6
FB
1207 s->fd = fd;
1208
a2d1ebaf
PB
1209 gdb_syscall_state = s;
1210
858693c6 1211 fcntl(fd, F_SETFL, O_NONBLOCK);
858693c6
FB
1212}
1213
1214static int gdbserver_open(int port)
1215{
1216 struct sockaddr_in sockaddr;
1217 int fd, val, ret;
1218
1219 fd = socket(PF_INET, SOCK_STREAM, 0);
1220 if (fd < 0) {
1221 perror("socket");
1222 return -1;
1223 }
1224
1225 /* allow fast reuse */
1226 val = 1;
8f447cc7 1227 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
858693c6
FB
1228
1229 sockaddr.sin_family = AF_INET;
1230 sockaddr.sin_port = htons(port);
1231 sockaddr.sin_addr.s_addr = 0;
1232 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1233 if (ret < 0) {
1234 perror("bind");
1235 return -1;
1236 }
1237 ret = listen(fd, 0);
1238 if (ret < 0) {
1239 perror("listen");
1240 return -1;
1241 }
858693c6
FB
1242 return fd;
1243}
1244
1245int gdbserver_start(int port)
1246{
1247 gdbserver_fd = gdbserver_open(port);
1248 if (gdbserver_fd < 0)
1249 return -1;
1250 /* accept connections */
7c9d8e07 1251 gdb_accept (NULL);
4046d913
PB
1252 return 0;
1253}
1fddef4b 1254#else
aa1f17c1 1255static int gdb_chr_can_receive(void *opaque)
4046d913
PB
1256{
1257 return 1;
1258}
1259
aa1f17c1 1260static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
4046d913
PB
1261{
1262 GDBState *s = opaque;
1263 int i;
1264
1265 for (i = 0; i < size; i++) {
1266 gdb_read_byte(s, buf[i]);
1267 }
1268}
1269
1270static void gdb_chr_event(void *opaque, int event)
1271{
1272 switch (event) {
1273 case CHR_EVENT_RESET:
1274 vm_stop(EXCP_INTERRUPT);
a2d1ebaf 1275 gdb_syscall_state = opaque;
4046d913
PB
1276 break;
1277 default:
1278 break;
1279 }
1280}
1281
cfc3475a 1282int gdbserver_start(const char *port)
4046d913
PB
1283{
1284 GDBState *s;
cfc3475a
PB
1285 char gdbstub_port_name[128];
1286 int port_num;
1287 char *p;
1288 CharDriverState *chr;
1289
1290 if (!port || !*port)
1291 return -1;
4046d913 1292
cfc3475a
PB
1293 port_num = strtol(port, &p, 10);
1294 if (*p == 0) {
1295 /* A numeric value is interpreted as a port number. */
1296 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1297 "tcp::%d,nowait,nodelay,server", port_num);
1298 port = gdbstub_port_name;
1299 }
1300
1301 chr = qemu_chr_open(port);
4046d913
PB
1302 if (!chr)
1303 return -1;
1304
1305 s = qemu_mallocz(sizeof(GDBState));
1306 if (!s) {
1307 return -1;
1308 }
1309 s->env = first_cpu; /* XXX: allow to change CPU */
1310 s->chr = chr;
aa1f17c1 1311 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
4046d913
PB
1312 gdb_chr_event, s);
1313 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
b4608c04
FB
1314 return 0;
1315}
4046d913 1316#endif