[mirror_qemu.git] / hw / arm / aspeed.c

/*
 * OpenPOWER Palmetto BMC
 *
 * Andrew Jeffery <andrew@aj.id.au>
 *
 * Copyright 2016 IBM Corp.
 *
 * This code is licensed under the GPL version 2 or later.  See
 * the COPYING file in the top-level directory.
 */

#include "qemu/osdep.h"
#include "qapi/error.h"
#include "qemu-common.h"
#include "cpu.h"
#include "exec/address-spaces.h"
#include "hw/arm/arm.h"
#include "hw/arm/aspeed_soc.h"
#include "hw/boards.h"
#include "qemu/log.h"
#include "sysemu/block-backend.h"
#include "sysemu/blockdev.h"
#include "hw/loader.h"
#include "qemu/error-report.h"

static struct arm_boot_info aspeed_board_binfo = {
    .board_id = -1, /* device-tree-only board */
    .nb_cpus = 1,
};

typedef struct AspeedBoardState {
    AspeedSoCState soc;
    MemoryRegion ram;
} AspeedBoardState;

typedef struct AspeedBoardConfig {
    const char *soc_name;
    uint32_t hw_strap1;
    const char *fmc_model;
    const char *spi_model;
    uint32_t num_cs;
} AspeedBoardConfig;

enum {
    PALMETTO_BMC,
    AST2500_EVB,
    ROMULUS_BMC,
};

/* Palmetto hardware value: 0x120CE416 */
#define PALMETTO_BMC_HW_STRAP1 (                                        \
        SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) |               \
        SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) | \
        SCU_AST2400_HW_STRAP_ACPI_DIS |                                 \
        SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) |       \
        SCU_HW_STRAP_VGA_CLASS_CODE |                                   \
        SCU_HW_STRAP_LPC_RESET_PIN |                                    \
        SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) |                \
        SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) | \
        SCU_HW_STRAP_SPI_WIDTH |                                        \
        SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) |                       \
        SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))

/* AST2500 evb hardware value: 0xF100C2E6 */
#define AST2500_EVB_HW_STRAP1 ((                                        \
        AST2500_HW_STRAP1_DEFAULTS |                                    \
        SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
        SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
        SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
        SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
        SCU_HW_STRAP_MAC1_RGMII |                                       \
        SCU_HW_STRAP_MAC0_RGMII) &                                      \
        ~SCU_HW_STRAP_2ND_BOOT_WDT)

/* Romulus hardware value: 0xF10AD206 */
#define ROMULUS_BMC_HW_STRAP1 (                                         \
        AST2500_HW_STRAP1_DEFAULTS |                                    \
        SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE |                     \
        SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE |                        \
        SCU_AST2500_HW_STRAP_UART_DEBUG |                               \
        SCU_AST2500_HW_STRAP_DDR4_ENABLE |                              \
        SCU_AST2500_HW_STRAP_ACPI_ENABLE |                              \
        SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))

static const AspeedBoardConfig aspeed_boards[] = {
    [PALMETTO_BMC] = {
        .soc_name  = "ast2400-a1",
        .hw_strap1 = PALMETTO_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
    },
    [AST2500_EVB]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = AST2500_EVB_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx25l25635e",
        .num_cs    = 1,
    },
    [ROMULUS_BMC]  = {
        .soc_name  = "ast2500-a1",
        .hw_strap1 = ROMULUS_BMC_HW_STRAP1,
        .fmc_model = "n25q256a",
        .spi_model = "mx66l1g45g",
        .num_cs    = 2,
    },
};

#define FIRMWARE_ADDR 0x0

static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
                           Error **errp)
{
    BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
    uint8_t *storage;
    int64_t size;

    /* The block backend size should have already been 'validated' by
     * the creation of the m25p80 object.
     */
    size = blk_getlength(blk);
    if (size <= 0) {
        error_setg(errp, "failed to get flash size");
        return;
    }

    if (rom_size > size) {
        rom_size = size;
    }

    storage = g_new0(uint8_t, rom_size);
    if (blk_pread(blk, 0, storage, rom_size) < 0) {
        error_setg(errp, "failed to read the initial flash content");
        return;
    }

    rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
    g_free(storage);
}

static void aspeed_board_init_flashes(AspeedSMCState *s, const char *flashtype,
                                      Error **errp)
{
    int i ;

    for (i = 0; i < s->num_cs; ++i) {
        AspeedSMCFlash *fl = &s->flashes[i];
        DriveInfo *dinfo = drive_get_next(IF_MTD);
        qemu_irq cs_line;

        fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
        if (dinfo) {
            qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
                                errp);
        }
        qdev_init_nofail(fl->flash);

        cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
        sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
    }
}

static void aspeed_board_init(MachineState *machine,
                              const AspeedBoardConfig *cfg)
{
    AspeedBoardState *bmc;
    AspeedSoCClass *sc;
    DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);

    bmc = g_new0(AspeedBoardState, 1);
    object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name);
    object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc),
                              &error_abort);

    sc = ASPEED_SOC_GET_CLASS(&bmc->soc);

    object_property_set_int(OBJECT(&bmc->soc), ram_size, "ram-size",
                           &error_abort);
    object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
                            &error_abort);
    object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
                            &error_abort);
    object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
                             &error_abort);

    /*
     * Allocate RAM after the memory controller has checked the size
     * was valid. If not, a default value is used.
     */
    ram_size = object_property_get_int(OBJECT(&bmc->soc), "ram-size",
                                       &error_abort);

    memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
    memory_region_add_subregion(get_system_memory(), sc->info->sdram_base,
                                &bmc->ram);
    object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
                                   &error_abort);

    aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
    aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);

    /* Install first FMC flash content as a boot rom. */
    if (drive0) {
        AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
        MemoryRegion *boot_rom = g_new(MemoryRegion, 1);

        /*
         * create a ROM region using the default mapping window size of
         * the flash module. The window size is 64MB for the AST2400
         * SoC and 128MB for the AST2500 SoC, which is twice as big as
         * needed by the flash modules of the Aspeed machines.
         */
        memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
                               fl->size, &error_abort);
        memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
                                    boot_rom);
        write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
    }

    aspeed_board_binfo.kernel_filename = machine->kernel_filename;
    aspeed_board_binfo.initrd_filename = machine->initrd_filename;
    aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
    aspeed_board_binfo.ram_size = ram_size;
    aspeed_board_binfo.loader_start = sc->info->sdram_base;

    arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
}

static void palmetto_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
}

static void palmetto_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
    mc->init = palmetto_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo palmetto_bmc_type = {
    .name = MACHINE_TYPE_NAME("palmetto-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = palmetto_bmc_class_init,
};

static void ast2500_evb_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
}

static void ast2500_evb_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "Aspeed AST2500 EVB (ARM1176)";
    mc->init = ast2500_evb_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo ast2500_evb_type = {
    .name = MACHINE_TYPE_NAME("ast2500-evb"),
    .parent = TYPE_MACHINE,
    .class_init = ast2500_evb_class_init,
};

static void romulus_bmc_init(MachineState *machine)
{
    aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
}

static void romulus_bmc_class_init(ObjectClass *oc, void *data)
{
    MachineClass *mc = MACHINE_CLASS(oc);

    mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
    mc->init = romulus_bmc_init;
    mc->max_cpus = 1;
    mc->no_sdcard = 1;
    mc->no_floppy = 1;
    mc->no_cdrom = 1;
    mc->no_parallel = 1;
}

static const TypeInfo romulus_bmc_type = {
    .name = MACHINE_TYPE_NAME("romulus-bmc"),
    .parent = TYPE_MACHINE,
    .class_init = romulus_bmc_class_init,
};

static void aspeed_machine_init(void)
{
    type_register_static(&palmetto_bmc_type);
    type_register_static(&ast2500_evb_type);
    type_register_static(&romulus_bmc_type);
}

type_init(aspeed_machine_init)
Commit	Line	Data
327d8e4e AJ	1	/*
	2	* OpenPOWER Palmetto BMC
	3	*
	4	* Andrew Jeffery <andrew@aj.id.au>
	5	*
	6	* Copyright 2016 IBM Corp.
	7	*
	8	* This code is licensed under the GPL version 2 or later. See
	9	* the COPYING file in the top-level directory.
	10	*/
	11
	12	#include "qemu/osdep.h"
da34e65c	13	#include "qapi/error.h"
4771d756 PB	14	#include "qemu-common.h"
4771d756 PB	15	#include "cpu.h"
327d8e4e AJ	16	#include "exec/address-spaces.h"
327d8e4e AJ	17	#include "hw/arm/arm.h"
00442402	18	#include "hw/arm/aspeed_soc.h"
327d8e4e	19	#include "hw/boards.h"
03dd024f	20	#include "qemu/log.h"
e1ad9bc4 CLG	21	#include "sysemu/block-backend.h"
e1ad9bc4 CLG	22	#include "sysemu/blockdev.h"
d769a1da CLG	23	#include "hw/loader.h"
d769a1da CLG	24	#include "qemu/error-report.h"
327d8e4e	25
74fb1f38	26	static struct arm_boot_info aspeed_board_binfo = {
b033271f	27	.board_id = -1, /* device-tree-only board */
327d8e4e AJ	28	.nb_cpus = 1,
	29	};
	30
74fb1f38	31	typedef struct AspeedBoardState {
ff90606f	32	AspeedSoCState soc;
327d8e4e	33	MemoryRegion ram;
74fb1f38	34	} AspeedBoardState;
327d8e4e	35
c3ba99f7 CLG	36	typedef struct AspeedBoardConfig {
	37	const char *soc_name;
	38	uint32_t hw_strap1;
6a0e947b CLG	39	const char *fmc_model;
6a0e947b CLG	40	const char *spi_model;
26d5df95	41	uint32_t num_cs;
c3ba99f7 CLG	42	} AspeedBoardConfig;
	43
	44	enum {
	45	PALMETTO_BMC,
9a7c1750	46	AST2500_EVB,
ef17f836	47	ROMULUS_BMC,
c3ba99f7 CLG	48	};
c3ba99f7 CLG	49
ef17f836	50	/* Palmetto hardware value: 0x120CE416 */
8da33ef7 CLG	51	#define PALMETTO_BMC_HW_STRAP1 ( \
	52	SCU_AST2400_HW_STRAP_DRAM_SIZE(DRAM_SIZE_256MB) \| \
	53	SCU_AST2400_HW_STRAP_DRAM_CONFIG(2 /* DDR3 with CL=6, CWL=5 */) \| \
	54	SCU_AST2400_HW_STRAP_ACPI_DIS \| \
	55	SCU_AST2400_HW_STRAP_SET_CLK_SOURCE(AST2400_CLK_48M_IN) \| \
	56	SCU_HW_STRAP_VGA_CLASS_CODE \| \
	57	SCU_HW_STRAP_LPC_RESET_PIN \| \
	58	SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_M_S_EN) \| \
	59	SCU_AST2400_HW_STRAP_SET_CPU_AHB_RATIO(AST2400_CPU_AHB_RATIO_2_1) \| \
	60	SCU_HW_STRAP_SPI_WIDTH \| \
	61	SCU_HW_STRAP_VGA_SIZE_SET(VGA_16M_DRAM) \| \
	62	SCU_AST2400_HW_STRAP_BOOT_MODE(AST2400_SPI_BOOT))
	63
ef17f836	64	/* AST2500 evb hardware value: 0xF100C2E6 */
9a7c1750 CLG	65	#define AST2500_EVB_HW_STRAP1 (( \
	66	AST2500_HW_STRAP1_DEFAULTS \| \
	67	SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE \| \
	68	SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE \| \
	69	SCU_AST2500_HW_STRAP_UART_DEBUG \| \
	70	SCU_AST2500_HW_STRAP_DDR4_ENABLE \| \
	71	SCU_HW_STRAP_MAC1_RGMII \| \
	72	SCU_HW_STRAP_MAC0_RGMII) & \
	73	~SCU_HW_STRAP_2ND_BOOT_WDT)
	74
ef17f836 CLG	75	/* Romulus hardware value: 0xF10AD206 */
	76	#define ROMULUS_BMC_HW_STRAP1 ( \
	77	AST2500_HW_STRAP1_DEFAULTS \| \
	78	SCU_AST2500_HW_STRAP_SPI_AUTOFETCH_ENABLE \| \
	79	SCU_AST2500_HW_STRAP_GPIO_STRAP_ENABLE \| \
	80	SCU_AST2500_HW_STRAP_UART_DEBUG \| \
	81	SCU_AST2500_HW_STRAP_DDR4_ENABLE \| \
	82	SCU_AST2500_HW_STRAP_ACPI_ENABLE \| \
	83	SCU_HW_STRAP_SPI_MODE(SCU_HW_STRAP_SPI_MASTER))
	84
c3ba99f7	85	static const AspeedBoardConfig aspeed_boards[] = {
6a0e947b	86	[PALMETTO_BMC] = {
bd407a21	87	.soc_name = "ast2400-a1",
6a0e947b CLG	88	.hw_strap1 = PALMETTO_BMC_HW_STRAP1,
	89	.fmc_model = "n25q256a",
	90	.spi_model = "mx25l25635e",
26d5df95	91	.num_cs = 1,
6a0e947b CLG	92	},
	93	[AST2500_EVB] = {
	94	.soc_name = "ast2500-a1",
	95	.hw_strap1 = AST2500_EVB_HW_STRAP1,
	96	.fmc_model = "n25q256a",
	97	.spi_model = "mx25l25635e",
26d5df95	98	.num_cs = 1,
6a0e947b	99	},
ef17f836 CLG	100	[ROMULUS_BMC] = {
	101	.soc_name = "ast2500-a1",
	102	.hw_strap1 = ROMULUS_BMC_HW_STRAP1,
	103	.fmc_model = "n25q256a",
	104	.spi_model = "mx66l1g45g",
26d5df95	105	.num_cs = 2,
ef17f836	106	},
c3ba99f7 CLG	107	};
c3ba99f7 CLG	108
d769a1da CLG	109	#define FIRMWARE_ADDR 0x0
	110
	111	static void write_boot_rom(DriveInfo *dinfo, hwaddr addr, size_t rom_size,
	112	Error **errp)
	113	{
	114	BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
	115	uint8_t *storage;
0c7209be CLG	116	int64_t size;
	117
	118	/* The block backend size should have already been 'validated' by
	119	* the creation of the m25p80 object.
	120	*/
	121	size = blk_getlength(blk);
	122	if (size <= 0) {
	123	error_setg(errp, "failed to get flash size");
	124	return;
	125	}
d769a1da	126
0c7209be CLG	127	if (rom_size > size) {
0c7209be CLG	128	rom_size = size;
d769a1da CLG	129	}
	130
	131	storage = g_new0(uint8_t, rom_size);
	132	if (blk_pread(blk, 0, storage, rom_size) < 0) {
	133	error_setg(errp, "failed to read the initial flash content");
	134	return;
	135	}
	136
	137	rom_add_blob_fixed("aspeed.boot_rom", storage, rom_size, addr);
	138	g_free(storage);
	139	}
	140
74fb1f38	141	static void aspeed_board_init_flashes(AspeedSMCState s, const char flashtype,
e1ad9bc4 CLG	142	Error **errp)
	143	{
	144	int i ;
	145
	146	for (i = 0; i < s->num_cs; ++i) {
	147	AspeedSMCFlash *fl = &s->flashes[i];
	148	DriveInfo *dinfo = drive_get_next(IF_MTD);
	149	qemu_irq cs_line;
	150
e1ad9bc4 CLG	151	fl->flash = ssi_create_slave_no_init(s->spi, flashtype);
	152	if (dinfo) {
	153	qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(dinfo),
	154	errp);
	155	}
	156	qdev_init_nofail(fl->flash);
	157
	158	cs_line = qdev_get_gpio_in_named(fl->flash, SSI_GPIO_CS, 0);
	159	sysbus_connect_irq(SYS_BUS_DEVICE(s), i + 1, cs_line);
	160	}
	161	}
	162
c3ba99f7 CLG	163	static void aspeed_board_init(MachineState *machine,
c3ba99f7 CLG	164	const AspeedBoardConfig *cfg)
327d8e4e	165	{
74fb1f38	166	AspeedBoardState *bmc;
b033271f	167	AspeedSoCClass *sc;
d769a1da	168	DriveInfo *drive0 = drive_get(IF_MTD, 0, 0);
327d8e4e	169
74fb1f38	170	bmc = g_new0(AspeedBoardState, 1);
c3ba99f7	171	object_initialize(&bmc->soc, (sizeof(bmc->soc)), cfg->soc_name);
327d8e4e AJ	172	object_property_add_child(OBJECT(machine), "soc", OBJECT(&bmc->soc),
	173	&error_abort);
	174
b033271f CLG	175	sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
b033271f CLG	176
c6c7cfb0 CLG	177	object_property_set_int(OBJECT(&bmc->soc), ram_size, "ram-size",
c6c7cfb0 CLG	178	&error_abort);
c3ba99f7	179	object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1",
87e79af0	180	&error_abort);
26d5df95 CLG	181	object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs",
26d5df95 CLG	182	&error_abort);
327d8e4e AJ	183	object_property_set_bool(OBJECT(&bmc->soc), true, "realized",
	184	&error_abort);
	185
de46f5f4 CLG	186	/*
	187	* Allocate RAM after the memory controller has checked the size
	188	* was valid. If not, a default value is used.
	189	*/
	190	ram_size = object_property_get_int(OBJECT(&bmc->soc), "ram-size",
	191	&error_abort);
	192
	193	memory_region_allocate_system_memory(&bmc->ram, NULL, "ram", ram_size);
	194	memory_region_add_subregion(get_system_memory(), sc->info->sdram_base,
	195	&bmc->ram);
	196	object_property_add_const_link(OBJECT(&bmc->soc), "ram", OBJECT(&bmc->ram),
	197	&error_abort);
	198
6a0e947b CLG	199	aspeed_board_init_flashes(&bmc->soc.fmc, cfg->fmc_model, &error_abort);
6a0e947b CLG	200	aspeed_board_init_flashes(&bmc->soc.spi[0], cfg->spi_model, &error_abort);
74fb1f38	201
d769a1da CLG	202	/* Install first FMC flash content as a boot rom. */
	203	if (drive0) {
	204	AspeedSMCFlash *fl = &bmc->soc.fmc.flashes[0];
	205	MemoryRegion *boot_rom = g_new(MemoryRegion, 1);
	206
	207	/*
	208	* create a ROM region using the default mapping window size of
93bf276d CLG	209	* the flash module. The window size is 64MB for the AST2400
	210	* SoC and 128MB for the AST2500 SoC, which is twice as big as
	211	* needed by the flash modules of the Aspeed machines.
d769a1da CLG	212	*/
	213	memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom",
	214	fl->size, &error_abort);
	215	memory_region_add_subregion(get_system_memory(), FIRMWARE_ADDR,
	216	boot_rom);
	217	write_boot_rom(drive0, FIRMWARE_ADDR, fl->size, &error_abort);
	218	}
	219
74fb1f38 CLG	220	aspeed_board_binfo.kernel_filename = machine->kernel_filename;
	221	aspeed_board_binfo.initrd_filename = machine->initrd_filename;
	222	aspeed_board_binfo.kernel_cmdline = machine->kernel_cmdline;
	223	aspeed_board_binfo.ram_size = ram_size;
	224	aspeed_board_binfo.loader_start = sc->info->sdram_base;
e1ad9bc4	225
74fb1f38 CLG	226	arm_load_kernel(ARM_CPU(first_cpu), &aspeed_board_binfo);
74fb1f38 CLG	227	}
b033271f	228
74fb1f38 CLG	229	static void palmetto_bmc_init(MachineState *machine)
74fb1f38 CLG	230	{
c3ba99f7	231	aspeed_board_init(machine, &aspeed_boards[PALMETTO_BMC]);
327d8e4e AJ	232	}
327d8e4e AJ	233
74fb1f38	234	static void palmetto_bmc_class_init(ObjectClass oc, void data)
327d8e4e	235	{
74fb1f38 CLG	236	MachineClass *mc = MACHINE_CLASS(oc);
	237
	238	mc->desc = "OpenPOWER Palmetto BMC (ARM926EJ-S)";
327d8e4e AJ	239	mc->init = palmetto_bmc_init;
	240	mc->max_cpus = 1;
	241	mc->no_sdcard = 1;
	242	mc->no_floppy = 1;
	243	mc->no_cdrom = 1;
327d8e4e AJ	244	mc->no_parallel = 1;
	245	}
	246
74fb1f38 CLG	247	static const TypeInfo palmetto_bmc_type = {
	248	.name = MACHINE_TYPE_NAME("palmetto-bmc"),
	249	.parent = TYPE_MACHINE,
	250	.class_init = palmetto_bmc_class_init,
	251	};
	252
9a7c1750 CLG	253	static void ast2500_evb_init(MachineState *machine)
	254	{
	255	aspeed_board_init(machine, &aspeed_boards[AST2500_EVB]);
	256	}
	257
	258	static void ast2500_evb_class_init(ObjectClass oc, void data)
	259	{
	260	MachineClass *mc = MACHINE_CLASS(oc);
	261
	262	mc->desc = "Aspeed AST2500 EVB (ARM1176)";
	263	mc->init = ast2500_evb_init;
	264	mc->max_cpus = 1;
	265	mc->no_sdcard = 1;
	266	mc->no_floppy = 1;
	267	mc->no_cdrom = 1;
	268	mc->no_parallel = 1;
	269	}
	270
	271	static const TypeInfo ast2500_evb_type = {
	272	.name = MACHINE_TYPE_NAME("ast2500-evb"),
	273	.parent = TYPE_MACHINE,
	274	.class_init = ast2500_evb_class_init,
	275	};
	276
ef17f836 CLG	277	static void romulus_bmc_init(MachineState *machine)
	278	{
	279	aspeed_board_init(machine, &aspeed_boards[ROMULUS_BMC]);
	280	}
	281
	282	static void romulus_bmc_class_init(ObjectClass oc, void data)
	283	{
	284	MachineClass *mc = MACHINE_CLASS(oc);
	285
	286	mc->desc = "OpenPOWER Romulus BMC (ARM1176)";
	287	mc->init = romulus_bmc_init;
	288	mc->max_cpus = 1;
	289	mc->no_sdcard = 1;
	290	mc->no_floppy = 1;
	291	mc->no_cdrom = 1;
	292	mc->no_parallel = 1;
	293	}
	294
	295	static const TypeInfo romulus_bmc_type = {
	296	.name = MACHINE_TYPE_NAME("romulus-bmc"),
	297	.parent = TYPE_MACHINE,
	298	.class_init = romulus_bmc_class_init,
	299	};
	300
74fb1f38 CLG	301	static void aspeed_machine_init(void)
	302	{
	303	type_register_static(&palmetto_bmc_type);
9a7c1750	304	type_register_static(&ast2500_evb_type);
ef17f836	305	type_register_static(&romulus_bmc_type);
74fb1f38 CLG	306	}
	307
	308	type_init(aspeed_machine_init)