]> git.proxmox.com Git - mirror_qemu.git/blame - hw/arm/bcm2835_peripherals.c
qom: Use returned bool to check for failure, Coccinelle part
[mirror_qemu.git] / hw / arm / bcm2835_peripherals.c
CommitLineData
7c62aeb8
AB
1/*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4 *
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
7 *
6111a0c0
PMD
8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
7c62aeb8
AB
10 */
11
c964b660 12#include "qemu/osdep.h"
da34e65c 13#include "qapi/error.h"
0b8fa32f 14#include "qemu/module.h"
7c62aeb8
AB
15#include "hw/arm/bcm2835_peripherals.h"
16#include "hw/misc/bcm2835_mbox_defs.h"
17#include "hw/arm/raspi_platform.h"
f0d1d2c1 18#include "sysemu/sysemu.h"
7c62aeb8
AB
19
20/* Peripheral base address on the VC (GPU) system bus */
21#define BCM2835_VC_PERI_BASE 0x7e000000
22
23/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
e4fcd07c 24#define BCM2835_SDHC_CAPAREG 0x52134b4
7c62aeb8 25
00cbd5bd
PMD
26static void create_unimp(BCM2835PeripheralState *ps,
27 UnimplementedDeviceState *uds,
28 const char *name, hwaddr ofs, hwaddr size)
29{
0074fce6 30 object_initialize_child(OBJECT(ps), name, uds, TYPE_UNIMPLEMENTED_DEVICE);
00cbd5bd
PMD
31 qdev_prop_set_string(DEVICE(uds), "name", name);
32 qdev_prop_set_uint64(DEVICE(uds), "size", size);
0074fce6 33 sysbus_realize(SYS_BUS_DEVICE(uds), &error_fatal);
00cbd5bd
PMD
34 memory_region_add_subregion_overlap(&ps->peri_mr, ofs,
35 sysbus_mmio_get_region(SYS_BUS_DEVICE(uds), 0), -1000);
36}
37
7c62aeb8
AB
38static void bcm2835_peripherals_init(Object *obj)
39{
40 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
41
42 /* Memory region for peripheral devices, which we export to our parent */
43 memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
7c62aeb8
AB
44 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
45
46 /* Internal memory region for peripheral bus addresses (not exported) */
47 memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
7c62aeb8
AB
48
49 /* Internal memory region for request/response communication with
50 * mailbox-addressable peripherals (not exported)
51 */
52 memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
53 MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
54
55 /* Interrupt Controller */
db873cc5 56 object_initialize_child(obj, "ic", &s->ic, TYPE_BCM2835_IC);
7c62aeb8 57
0e5bbd74 58 /* SYS Timer */
db873cc5
MA
59 object_initialize_child(obj, "systimer", &s->systmr,
60 TYPE_BCM2835_SYSTIMER);
0e5bbd74 61
7c62aeb8 62 /* UART0 */
db873cc5 63 object_initialize_child(obj, "uart0", &s->uart0, TYPE_PL011);
7c62aeb8 64
97398d90 65 /* AUX / UART1 */
db873cc5 66 object_initialize_child(obj, "aux", &s->aux, TYPE_BCM2835_AUX);
97398d90 67
7c62aeb8 68 /* Mailboxes */
db873cc5 69 object_initialize_child(obj, "mbox", &s->mboxes, TYPE_BCM2835_MBOX);
7c62aeb8
AB
70
71 object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
d2623129 72 OBJECT(&s->mbox_mr));
7c62aeb8 73
5e9c2a8d 74 /* Framebuffer */
db873cc5 75 object_initialize_child(obj, "fb", &s->fb, TYPE_BCM2835_FB);
d2623129 76 object_property_add_alias(obj, "vcram-size", OBJECT(&s->fb), "vcram-size");
5e9c2a8d
GE
77
78 object_property_add_const_link(OBJECT(&s->fb), "dma-mr",
d2623129 79 OBJECT(&s->gpu_bus_mr));
5e9c2a8d 80
7c62aeb8 81 /* Property channel */
db873cc5
MA
82 object_initialize_child(obj, "property", &s->property,
83 TYPE_BCM2835_PROPERTY);
f0afa731 84 object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
d2623129 85 "board-rev");
7c62aeb8 86
355a8ccc 87 object_property_add_const_link(OBJECT(&s->property), "fb",
d2623129 88 OBJECT(&s->fb));
7c62aeb8 89 object_property_add_const_link(OBJECT(&s->property), "dma-mr",
d2623129 90 OBJECT(&s->gpu_bus_mr));
7c62aeb8 91
54a5ba13 92 /* Random Number Generator */
db873cc5 93 object_initialize_child(obj, "rng", &s->rng, TYPE_BCM2835_RNG);
54a5ba13 94
7c62aeb8 95 /* Extended Mass Media Controller */
db873cc5 96 object_initialize_child(obj, "sdhci", &s->sdhci, TYPE_SYSBUS_SDHCI);
6717f587 97
1eeb5c7d 98 /* SDHOST */
db873cc5 99 object_initialize_child(obj, "sdhost", &s->sdhost, TYPE_BCM2835_SDHOST);
1eeb5c7d 100
6717f587 101 /* DMA Channels */
db873cc5 102 object_initialize_child(obj, "dma", &s->dma, TYPE_BCM2835_DMA);
6717f587
GE
103
104 object_property_add_const_link(OBJECT(&s->dma), "dma-mr",
d2623129 105 OBJECT(&s->gpu_bus_mr));
1eeb5c7d 106
d442d95f 107 /* Thermal */
db873cc5 108 object_initialize_child(obj, "thermal", &s->thermal, TYPE_BCM2835_THERMAL);
d442d95f 109
1eeb5c7d 110 /* GPIO */
db873cc5 111 object_initialize_child(obj, "gpio", &s->gpio, TYPE_BCM2835_GPIO);
1eeb5c7d
CD
112
113 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhci",
d2623129 114 OBJECT(&s->sdhci.sdbus));
1eeb5c7d 115 object_property_add_const_link(OBJECT(&s->gpio), "sdbus-sdhost",
d2623129 116 OBJECT(&s->sdhost.sdbus));
3d46938b
PZ
117
118 /* Mphi */
db873cc5 119 object_initialize_child(obj, "mphi", &s->mphi, TYPE_BCM2835_MPHI);
60bf734e
PZ
120
121 /* DWC2 */
db873cc5 122 object_initialize_child(obj, "dwc2", &s->dwc2, TYPE_DWC2_USB);
60bf734e
PZ
123
124 object_property_add_const_link(OBJECT(&s->dwc2), "dma-mr",
125 OBJECT(&s->gpu_bus_mr));
7c62aeb8
AB
126}
127
128static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
129{
130 BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
131 Object *obj;
132 MemoryRegion *ram;
133 Error *err = NULL;
c5c6c47c 134 uint64_t ram_size, vcram_size;
7c62aeb8
AB
135 int n;
136
4d21fcd5 137 obj = object_property_get_link(OBJECT(dev), "ram", &error_abort);
7c62aeb8
AB
138
139 ram = MEMORY_REGION(obj);
140 ram_size = memory_region_size(ram);
141
142 /* Map peripherals and RAM into the GPU address space. */
143 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
144 "bcm2835-peripherals", &s->peri_mr, 0,
145 memory_region_size(&s->peri_mr));
146
147 memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
148 &s->peri_mr_alias, 1);
149
150 /* RAM is aliased four times (different cache configurations) on the GPU */
151 for (n = 0; n < 4; n++) {
152 memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
153 "bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
154 memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
155 &s->ram_alias[n], 0);
156 }
157
158 /* Interrupt Controller */
118bfd76 159 if (!sysbus_realize(SYS_BUS_DEVICE(&s->ic), &err)) {
7c62aeb8
AB
160 error_propagate(errp, err);
161 return;
162 }
163
164 memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
165 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
166 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
167
0e5bbd74 168 /* Sys Timer */
118bfd76 169 if (!sysbus_realize(SYS_BUS_DEVICE(&s->systmr), &err)) {
0e5bbd74
PMD
170 error_propagate(errp, err);
171 return;
172 }
173 memory_region_add_subregion(&s->peri_mr, ST_OFFSET,
174 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->systmr), 0));
175 sysbus_connect_irq(SYS_BUS_DEVICE(&s->systmr), 0,
176 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
177 INTERRUPT_ARM_TIMER));
178
7c62aeb8 179 /* UART0 */
948770b0 180 qdev_prop_set_chr(DEVICE(&s->uart0), "chardev", serial_hd(0));
118bfd76 181 if (!sysbus_realize(SYS_BUS_DEVICE(&s->uart0), &err)) {
7c62aeb8
AB
182 error_propagate(errp, err);
183 return;
184 }
185
186 memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
948770b0
PMD
187 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->uart0), 0));
188 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart0), 0,
7c62aeb8 189 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
5cd436f9
PMD
190 INTERRUPT_UART0));
191
97398d90 192 /* AUX / UART1 */
9bca0edb 193 qdev_prop_set_chr(DEVICE(&s->aux), "chardev", serial_hd(1));
97398d90 194
118bfd76 195 if (!sysbus_realize(SYS_BUS_DEVICE(&s->aux), &err)) {
97398d90
AB
196 error_propagate(errp, err);
197 return;
198 }
199
5cd436f9 200 memory_region_add_subregion(&s->peri_mr, AUX_OFFSET,
97398d90
AB
201 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->aux), 0));
202 sysbus_connect_irq(SYS_BUS_DEVICE(&s->aux), 0,
203 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
204 INTERRUPT_AUX));
205
7c62aeb8 206 /* Mailboxes */
118bfd76 207 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mboxes), &err)) {
7c62aeb8
AB
208 error_propagate(errp, err);
209 return;
210 }
211
212 memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
213 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
214 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
215 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
216 INTERRUPT_ARM_MAILBOX));
217
5e9c2a8d 218 /* Framebuffer */
c5c6c47c 219 vcram_size = object_property_get_uint(OBJECT(s), "vcram-size", &err);
5e9c2a8d
GE
220 if (err) {
221 error_propagate(errp, err);
222 return;
223 }
224
778a2dc5
MA
225 if (!object_property_set_uint(OBJECT(&s->fb), "vcram-base",
226 ram_size - vcram_size, &err)) {
5e9c2a8d
GE
227 error_propagate(errp, err);
228 return;
229 }
230
118bfd76 231 if (!sysbus_realize(SYS_BUS_DEVICE(&s->fb), &err)) {
5e9c2a8d
GE
232 error_propagate(errp, err);
233 return;
234 }
235
236 memory_region_add_subregion(&s->mbox_mr, MBOX_CHAN_FB << MBOX_AS_CHAN_SHIFT,
237 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->fb), 0));
238 sysbus_connect_irq(SYS_BUS_DEVICE(&s->fb), 0,
239 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_FB));
240
7c62aeb8 241 /* Property channel */
118bfd76 242 if (!sysbus_realize(SYS_BUS_DEVICE(&s->property), &err)) {
7c62aeb8
AB
243 error_propagate(errp, err);
244 return;
245 }
246
247 memory_region_add_subregion(&s->mbox_mr,
248 MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
249 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
250 sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
251 qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
252
54a5ba13 253 /* Random Number Generator */
118bfd76 254 if (!sysbus_realize(SYS_BUS_DEVICE(&s->rng), &err)) {
54a5ba13
MC
255 error_propagate(errp, err);
256 return;
257 }
258
259 memory_region_add_subregion(&s->peri_mr, RNG_OFFSET,
260 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->rng), 0));
261
ed6c5e93
PMD
262 /* Extended Mass Media Controller
263 *
264 * Compatible with:
265 * - SD Host Controller Specification Version 3.0 Draft 1.0
266 * - SDIO Specification Version 3.0
267 * - MMC Specification Version 4.4
268 *
269 * For the exact details please refer to the Arasan documentation:
270 * SD3.0_Host_AHB_eMMC4.4_Usersguide_ver5.9_jan11_10.pdf
271 */
5325cc34 272 object_property_set_uint(OBJECT(&s->sdhci), "sd-spec-version", 3,
7cd1c981 273 &error_abort);
5325cc34
MA
274 object_property_set_uint(OBJECT(&s->sdhci), "capareg",
275 BCM2835_SDHC_CAPAREG, &error_abort);
276 object_property_set_bool(OBJECT(&s->sdhci), "pending-insert-quirk", true,
7cd1c981 277 &error_abort);
118bfd76 278 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhci), &err)) {
7c62aeb8
AB
279 error_propagate(errp, err);
280 return;
281 }
282
5cd436f9 283 memory_region_add_subregion(&s->peri_mr, EMMC1_OFFSET,
7c62aeb8
AB
284 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
285 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
286 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
287 INTERRUPT_ARASANSDIO));
1eeb5c7d
CD
288
289 /* SDHOST */
118bfd76 290 if (!sysbus_realize(SYS_BUS_DEVICE(&s->sdhost), &err)) {
a55b53a2
AB
291 error_propagate(errp, err);
292 return;
293 }
294
1eeb5c7d
CD
295 memory_region_add_subregion(&s->peri_mr, MMCI0_OFFSET,
296 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhost), 0));
297 sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhost), 0,
298 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
299 INTERRUPT_SDIO));
300
6717f587 301 /* DMA Channels */
118bfd76 302 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dma), &err)) {
6717f587
GE
303 error_propagate(errp, err);
304 return;
305 }
306
307 memory_region_add_subregion(&s->peri_mr, DMA_OFFSET,
308 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 0));
309 memory_region_add_subregion(&s->peri_mr, DMA15_OFFSET,
310 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dma), 1));
311
312 for (n = 0; n <= 12; n++) {
313 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dma), n,
314 qdev_get_gpio_in_named(DEVICE(&s->ic),
315 BCM2835_IC_GPU_IRQ,
316 INTERRUPT_DMA0 + n));
317 }
1eeb5c7d 318
d442d95f 319 /* THERMAL */
118bfd76 320 if (!sysbus_realize(SYS_BUS_DEVICE(&s->thermal), &err)) {
d442d95f
PMD
321 error_propagate(errp, err);
322 return;
323 }
324 memory_region_add_subregion(&s->peri_mr, THERMAL_OFFSET,
325 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->thermal), 0));
326
1eeb5c7d 327 /* GPIO */
118bfd76 328 if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err)) {
1eeb5c7d
CD
329 error_propagate(errp, err);
330 return;
331 }
332
333 memory_region_add_subregion(&s->peri_mr, GPIO_OFFSET,
334 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->gpio), 0));
335
d2623129 336 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->gpio), "sd-bus");
00cbd5bd 337
3d46938b 338 /* Mphi */
118bfd76 339 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mphi), &err)) {
3d46938b
PZ
340 error_propagate(errp, err);
341 return;
342 }
343
344 memory_region_add_subregion(&s->peri_mr, MPHI_OFFSET,
345 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mphi), 0));
346 sysbus_connect_irq(SYS_BUS_DEVICE(&s->mphi), 0,
347 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
348 INTERRUPT_HOSTPORT));
349
60bf734e 350 /* DWC2 */
118bfd76 351 if (!sysbus_realize(SYS_BUS_DEVICE(&s->dwc2), &err)) {
60bf734e
PZ
352 error_propagate(errp, err);
353 return;
354 }
355
356 memory_region_add_subregion(&s->peri_mr, USB_OTG_OFFSET,
357 sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->dwc2), 0));
358 sysbus_connect_irq(SYS_BUS_DEVICE(&s->dwc2), 0,
359 qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
360 INTERRUPT_USB));
361
00cbd5bd 362 create_unimp(s, &s->armtmr, "bcm2835-sp804", ARMCTRL_TIMER0_1_OFFSET, 0x40);
00cbd5bd
PMD
363 create_unimp(s, &s->cprman, "bcm2835-cprman", CPRMAN_OFFSET, 0x1000);
364 create_unimp(s, &s->a2w, "bcm2835-a2w", A2W_OFFSET, 0x1000);
365 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100);
366 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100);
367 create_unimp(s, &s->spi[0], "bcm2835-spi0", SPI0_OFFSET, 0x20);
368 create_unimp(s, &s->bscsl, "bcm2835-spis", BSC_SL_OFFSET, 0x100);
369 create_unimp(s, &s->i2c[0], "bcm2835-i2c0", BSC0_OFFSET, 0x20);
370 create_unimp(s, &s->i2c[1], "bcm2835-i2c1", BSC1_OFFSET, 0x20);
371 create_unimp(s, &s->i2c[2], "bcm2835-i2c2", BSC2_OFFSET, 0x20);
372 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80);
373 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000);
374 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000);
00cbd5bd 375 create_unimp(s, &s->sdramc, "bcm2835-sdramc", SDRAMC_OFFSET, 0x100);
7c62aeb8
AB
376}
377
378static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
379{
380 DeviceClass *dc = DEVICE_CLASS(oc);
381
382 dc->realize = bcm2835_peripherals_realize;
383}
384
385static const TypeInfo bcm2835_peripherals_type_info = {
386 .name = TYPE_BCM2835_PERIPHERALS,
387 .parent = TYPE_SYS_BUS_DEVICE,
388 .instance_size = sizeof(BCM2835PeripheralState),
389 .instance_init = bcm2835_peripherals_init,
390 .class_init = bcm2835_peripherals_class_init,
391};
392
393static void bcm2835_peripherals_register_types(void)
394{
395 type_register_static(&bcm2835_peripherals_type_info);
396}
397
398type_init(bcm2835_peripherals_register_types)