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qdev: Use returned bool to check for qdev_realize() etc. failure
[mirror_qemu.git] / hw / arm / bcm2836.c
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1/*
2 * Raspberry Pi emulation (c) 2012 Gregory Estrade
3 * Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
4 *
5 * Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
6 * Written by Andrew Baumann
7 *
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8 * This work is licensed under the terms of the GNU GPL, version 2 or later.
9 * See the COPYING file in the top-level directory.
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10 */
11
c964b660 12#include "qemu/osdep.h"
da34e65c 13#include "qapi/error.h"
0b8fa32f 14#include "qemu/module.h"
4771d756 15#include "cpu.h"
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16#include "hw/arm/bcm2836.h"
17#include "hw/arm/raspi_platform.h"
18#include "hw/sysbus.h"
bad56236 19
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20struct BCM283XInfo {
21 const char *name;
210f4784 22 const char *cpu_type;
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23 hwaddr peri_base; /* Peripheral base address seen by the CPU */
24 hwaddr ctrl_base; /* Interrupt controller and mailboxes etc. */
1bcb4d16 25 int clusterid;
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26};
27
28static const BCM283XInfo bcm283x_socs[] = {
29 {
30 .name = TYPE_BCM2836,
2b0b9321 31 .cpu_type = ARM_CPU_TYPE_NAME("cortex-a7"),
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32 .peri_base = 0x3f000000,
33 .ctrl_base = 0x40000000,
1bcb4d16 34 .clusterid = 0xf,
0fd74f03 35 },
210f4784 36#ifdef TARGET_AARCH64
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37 {
38 .name = TYPE_BCM2837,
210f4784 39 .cpu_type = ARM_CPU_TYPE_NAME("cortex-a53"),
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40 .peri_base = 0x3f000000,
41 .ctrl_base = 0x40000000,
1bcb4d16 42 .clusterid = 0x0,
0fd74f03 43 },
210f4784 44#endif
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45};
46
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47static void bcm2836_init(Object *obj)
48{
926dcdf0 49 BCM283XState *s = BCM283X(obj);
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50 BCM283XClass *bc = BCM283X_GET_CLASS(obj);
51 const BCM283XInfo *info = bc->info;
52 int n;
53
54 for (n = 0; n < BCM283X_NCPUS; n++) {
5e5e9ed6 55 object_initialize_child(obj, "cpu[*]", &s->cpu[n].core,
9fc7fc4d 56 info->cpu_type);
210f4784 57 }
bad56236 58
db873cc5 59 object_initialize_child(obj, "control", &s->control, TYPE_BCM2836_CONTROL);
bad56236 60
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61 object_initialize_child(obj, "peripherals", &s->peripherals,
62 TYPE_BCM2835_PERIPHERALS);
f0afa731 63 object_property_add_alias(obj, "board-rev", OBJECT(&s->peripherals),
d2623129 64 "board-rev");
5e9c2a8d 65 object_property_add_alias(obj, "vcram-size", OBJECT(&s->peripherals),
d2623129 66 "vcram-size");
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67}
68
69static void bcm2836_realize(DeviceState *dev, Error **errp)
70{
926dcdf0 71 BCM283XState *s = BCM283X(dev);
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72 BCM283XClass *bc = BCM283X_GET_CLASS(dev);
73 const BCM283XInfo *info = bc->info;
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74 Object *obj;
75 Error *err = NULL;
76 int n;
77
78 /* common peripherals from bcm2835 */
79
80 obj = object_property_get_link(OBJECT(dev), "ram", &err);
81 if (obj == NULL) {
82 error_setg(errp, "%s: required ram link not found: %s",
83 __func__, error_get_pretty(err));
84 return;
85 }
86
d2623129 87 object_property_add_const_link(OBJECT(&s->peripherals), "ram", obj);
bad56236 88
118bfd76 89 if (!sysbus_realize(SYS_BUS_DEVICE(&s->peripherals), &err)) {
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90 error_propagate(errp, err);
91 return;
92 }
93
a55b53a2 94 object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->peripherals),
d2623129 95 "sd-bus");
a55b53a2 96
bad56236 97 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->peripherals), 0,
d0567e94 98 info->peri_base, 1);
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99
100 /* bcm2836 interrupt controller (and mailboxes, etc.) */
118bfd76 101 if (!sysbus_realize(SYS_BUS_DEVICE(&s->control), &err)) {
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102 error_propagate(errp, err);
103 return;
104 }
105
d0567e94 106 sysbus_mmio_map(SYS_BUS_DEVICE(&s->control), 0, info->ctrl_base);
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107
108 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 0,
109 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-irq", 0));
110 sysbus_connect_irq(SYS_BUS_DEVICE(&s->peripherals), 1,
111 qdev_get_gpio_in_named(DEVICE(&s->control), "gpu-fiq", 0));
112
926dcdf0 113 for (n = 0; n < BCM283X_NCPUS; n++) {
1bcb4d16 114 /* TODO: this should be converted to a property of ARM_CPU */
5e5e9ed6 115 s->cpu[n].core.mp_affinity = (info->clusterid << 8) | n;
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116
117 /* set periphbase/CBAR value for CPU-local registers */
5e5e9ed6 118 object_property_set_int(OBJECT(&s->cpu[n].core),
d0567e94 119 info->peri_base,
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120 "reset-cbar", &err);
121 if (err) {
122 error_propagate(errp, err);
123 return;
124 }
125
126 /* start powered off if not enabled */
5e5e9ed6 127 object_property_set_bool(OBJECT(&s->cpu[n].core), n >= s->enabled_cpus,
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128 "start-powered-off", &err);
129 if (err) {
130 error_propagate(errp, err);
131 return;
132 }
133
118bfd76 134 if (!qdev_realize(DEVICE(&s->cpu[n].core), NULL, &err)) {
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135 error_propagate(errp, err);
136 return;
137 }
138
139 /* Connect irq/fiq outputs from the interrupt controller. */
140 qdev_connect_gpio_out_named(DEVICE(&s->control), "irq", n,
5e5e9ed6 141 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_IRQ));
bad56236 142 qdev_connect_gpio_out_named(DEVICE(&s->control), "fiq", n,
5e5e9ed6 143 qdev_get_gpio_in(DEVICE(&s->cpu[n].core), ARM_CPU_FIQ));
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144
145 /* Connect timers from the CPU to the interrupt controller */
5e5e9ed6 146 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_PHYS,
0dc19823 147 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpnsirq", n));
5e5e9ed6 148 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_VIRT,
bad56236 149 qdev_get_gpio_in_named(DEVICE(&s->control), "cntvirq", n));
5e5e9ed6 150 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_HYP,
0dc19823 151 qdev_get_gpio_in_named(DEVICE(&s->control), "cnthpirq", n));
5e5e9ed6 152 qdev_connect_gpio_out(DEVICE(&s->cpu[n].core), GTIMER_SEC,
0dc19823 153 qdev_get_gpio_in_named(DEVICE(&s->control), "cntpsirq", n));
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154 }
155}
156
157static Property bcm2836_props[] = {
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158 DEFINE_PROP_UINT32("enabled-cpus", BCM283XState, enabled_cpus,
159 BCM283X_NCPUS),
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160 DEFINE_PROP_END_OF_LIST()
161};
162
0fd74f03 163static void bcm283x_class_init(ObjectClass *oc, void *data)
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164{
165 DeviceClass *dc = DEVICE_CLASS(oc);
0fd74f03 166 BCM283XClass *bc = BCM283X_CLASS(oc);
bad56236 167
0fd74f03 168 bc->info = data;
bad56236 169 dc->realize = bcm2836_realize;
4f67d30b 170 device_class_set_props(dc, bcm2836_props);
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171 /* Reason: Must be wired up in code (see raspi_init() function) */
172 dc->user_creatable = false;
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173}
174
0fd74f03 175static const TypeInfo bcm283x_type_info = {
926dcdf0 176 .name = TYPE_BCM283X,
3d260cf3 177 .parent = TYPE_DEVICE,
926dcdf0 178 .instance_size = sizeof(BCM283XState),
bad56236 179 .instance_init = bcm2836_init,
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180 .class_size = sizeof(BCM283XClass),
181 .abstract = true,
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182};
183
184static void bcm2836_register_types(void)
185{
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186 int i;
187
188 type_register_static(&bcm283x_type_info);
189 for (i = 0; i < ARRAY_SIZE(bcm283x_socs); i++) {
190 TypeInfo ti = {
191 .name = bcm283x_socs[i].name,
192 .parent = TYPE_BCM283X,
193 .class_init = bcm283x_class_init,
194 .class_data = (void *) &bcm283x_socs[i],
195 };
196 type_register(&ti);
197 }
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198}
199
200type_init(bcm2836_register_types)