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1/*
2 * PXA270-based Clamshell PDA platforms.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This code is licensed under the GNU GPL v2.
6b620ca3
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8 *
9 * Contributions after 2012-01-13 are licensed under the terms of the
10 * GNU GPL, version 2 or (at your option) any later version.
b00052e4
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11 */
12
12b16722 13#include "qemu/osdep.h"
da34e65c 14#include "qapi/error.h"
0d09e41a 15#include "hw/arm/pxa.h"
12ec8bd5 16#include "hw/arm/boot.h"
9c17d615 17#include "sysemu/sysemu.h"
83c9f4ca 18#include "hw/pcmcia.h"
a27bd6c7 19#include "hw/qdev-properties.h"
0d09e41a 20#include "hw/i2c/i2c.h"
64552b6b 21#include "hw/irq.h"
8fd06719 22#include "hw/ssi/ssi.h"
0d09e41a 23#include "hw/block/flash.h"
1de7afc9 24#include "qemu/timer.h"
0d09e41a 25#include "hw/arm/sharpsl.h"
28ecbaee 26#include "ui/console.h"
7ab14c5a 27#include "hw/audio/wm8750.h"
87ecb68b 28#include "audio/audio.h"
83c9f4ca 29#include "hw/boards.h"
83c9f4ca 30#include "hw/sysbus.h"
d6454270 31#include "migration/vmstate.h"
022c62cb 32#include "exec/address-spaces.h"
ba1ba5cc 33#include "cpu.h"
b00052e4 34
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35#undef REG_FMT
36#define REG_FMT "0x%02lx"
37
38/* Spitz Flash */
39#define FLASH_BASE 0x0c000000
40#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */
41#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */
42#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */
43#define FLASH_ECCCNTR 0x0c /* ECC byte counter */
44#define FLASH_ECCCLRR 0x10 /* Clear ECC */
45#define FLASH_FLASHIO 0x14 /* Flash I/O */
46#define FLASH_FLASHCTL 0x18 /* Flash Control */
47
48#define FLASHCTL_CE0 (1 << 0)
49#define FLASHCTL_CLE (1 << 1)
50#define FLASHCTL_ALE (1 << 2)
51#define FLASHCTL_WP (1 << 3)
52#define FLASHCTL_CE1 (1 << 4)
53#define FLASHCTL_RYBY (1 << 5)
54#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
55
7eb8104a
AF
56#define TYPE_SL_NAND "sl-nand"
57#define SL_NAND(obj) OBJECT_CHECK(SLNANDState, (obj), TYPE_SL_NAND)
58
bc24a225 59typedef struct {
7eb8104a
AF
60 SysBusDevice parent_obj;
61
7cc09e6c 62 MemoryRegion iomem;
d4220389 63 DeviceState *nand;
b00052e4 64 uint8_t ctl;
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65 uint8_t manf_id;
66 uint8_t chip_id;
bc24a225
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67 ECCState ecc;
68} SLNANDState;
b00052e4 69
a8170e5e 70static uint64_t sl_read(void *opaque, hwaddr addr, unsigned size)
b00052e4 71{
bc24a225 72 SLNANDState *s = (SLNANDState *) opaque;
b00052e4 73 int ryby;
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74
75 switch (addr) {
76#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to))
77 case FLASH_ECCLPLB:
78 return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) |
79 BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7);
80
81#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to))
82 case FLASH_ECCLPUB:
83 return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) |
84 BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7);
85
86 case FLASH_ECCCP:
87 return s->ecc.cp;
88
89 case FLASH_ECCCNTR:
90 return s->ecc.count & 0xff;
91
92 case FLASH_FLASHCTL:
93 nand_getpins(s->nand, &ryby);
94 if (ryby)
95 return s->ctl | FLASHCTL_RYBY;
96 else
97 return s->ctl;
98
99 case FLASH_FLASHIO:
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100 if (size == 4) {
101 return ecc_digest(&s->ecc, nand_getio(s->nand)) |
102 (ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
103 }
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104 return ecc_digest(&s->ecc, nand_getio(s->nand));
105
106 default:
a8b7063b 107 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
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108 }
109 return 0;
110}
111
a8170e5e 112static void sl_write(void *opaque, hwaddr addr,
7cc09e6c 113 uint64_t value, unsigned size)
b00052e4 114{
bc24a225 115 SLNANDState *s = (SLNANDState *) opaque;
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116
117 switch (addr) {
118 case FLASH_ECCCLRR:
119 /* Value is ignored. */
120 ecc_reset(&s->ecc);
121 break;
122
123 case FLASH_FLASHCTL:
124 s->ctl = value & 0xff & ~FLASHCTL_RYBY;
125 nand_setpins(s->nand,
126 s->ctl & FLASHCTL_CLE,
127 s->ctl & FLASHCTL_ALE,
128 s->ctl & FLASHCTL_NCE,
129 s->ctl & FLASHCTL_WP,
130 0);
131 break;
132
133 case FLASH_FLASHIO:
134 nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
135 break;
136
137 default:
a8b7063b 138 zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr);
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139 }
140}
141
142enum {
143 FLASH_128M,
144 FLASH_1024M,
145};
146
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147static const MemoryRegionOps sl_ops = {
148 .read = sl_read,
149 .write = sl_write,
150 .endianness = DEVICE_NATIVE_ENDIAN,
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151};
152
bc24a225 153static void sl_flash_register(PXA2xxState *cpu, int size)
b00052e4 154{
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155 DeviceState *dev;
156
7eb8104a 157 dev = qdev_create(NULL, TYPE_SL_NAND);
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158
159 qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
160 if (size == FLASH_128M)
161 qdev_prop_set_uint8(dev, "chip_id", 0x73);
162 else if (size == FLASH_1024M)
163 qdev_prop_set_uint8(dev, "chip_id", 0xf1);
164
165 qdev_init_nofail(dev);
1356b98d 166 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, FLASH_BASE);
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167}
168
f68575c9 169static void sl_nand_init(Object *obj)
7eb8104a 170{
f68575c9
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171 SLNANDState *s = SL_NAND(obj);
172 SysBusDevice *dev = SYS_BUS_DEVICE(obj);
34f9f0b5 173
b00052e4 174 s->ctl = 0;
07bc425e
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175
176 memory_region_init_io(&s->iomem, obj, &sl_ops, s, "sl", 0x40);
177 sysbus_init_mmio(dev, &s->iomem);
178}
179
180static void sl_nand_realize(DeviceState *dev, Error **errp)
181{
182 SLNANDState *s = SL_NAND(dev);
183 DriveInfo *nand;
184
af9e40aa 185 /* FIXME use a qdev drive property instead of drive_get() */
522f253c 186 nand = drive_get(IF_MTD, 0, 0);
4be74634 187 s->nand = nand_init(nand ? blk_by_legacy_dinfo(nand) : NULL,
fa1d36df 188 s->manf_id, s->chip_id);
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189}
190
191/* Spitz Keyboard */
192
193#define SPITZ_KEY_STROBE_NUM 11
194#define SPITZ_KEY_SENSE_NUM 7
195
196static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = {
197 12, 17, 91, 34, 36, 38, 39
198};
199
200static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = {
201 88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114
202};
203
204/* Eighth additional row maps the special keys */
205static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = {
206 { 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 },
207 { -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 },
208 { 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 },
209 { 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 },
210 { 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 },
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211 { 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 },
212 { 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 },
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213 { 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 },
214};
215
216#define SPITZ_GPIO_AK_INT 13 /* Remote control */
217#define SPITZ_GPIO_SYNC 16 /* Sync button */
218#define SPITZ_GPIO_ON_KEY 95 /* Power button */
219#define SPITZ_GPIO_SWA 97 /* Lid */
220#define SPITZ_GPIO_SWB 96 /* Tablet mode */
221
222/* The special buttons are mapped to unused keys */
223static const int spitz_gpiomap[5] = {
224 SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY,
225 SPITZ_GPIO_SWA, SPITZ_GPIO_SWB,
226};
b00052e4 227
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228#define TYPE_SPITZ_KEYBOARD "spitz-keyboard"
229#define SPITZ_KEYBOARD(obj) \
230 OBJECT_CHECK(SpitzKeyboardState, (obj), TYPE_SPITZ_KEYBOARD)
231
bc24a225 232typedef struct {
73e9d965
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233 SysBusDevice parent_obj;
234
38641a52 235 qemu_irq sense[SPITZ_KEY_SENSE_NUM];
38641a52 236 qemu_irq gpiomap[5];
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237 int keymap[0x80];
238 uint16_t keyrow[SPITZ_KEY_SENSE_NUM];
239 uint16_t strobe_state;
240 uint16_t sense_state;
241
242 uint16_t pre_map[0x100];
243 uint16_t modifiers;
244 uint16_t imodifiers;
245 uint8_t fifo[16];
246 int fifopos, fifolen;
247 QEMUTimer *kbdtimer;
bc24a225 248} SpitzKeyboardState;
b00052e4 249
bc24a225 250static void spitz_keyboard_sense_update(SpitzKeyboardState *s)
b00052e4
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251{
252 int i;
253 uint16_t strobe, sense = 0;
254 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) {
255 strobe = s->keyrow[i] & s->strobe_state;
256 if (strobe) {
257 sense |= 1 << i;
258 if (!(s->sense_state & (1 << i)))
38641a52 259 qemu_irq_raise(s->sense[i]);
b00052e4 260 } else if (s->sense_state & (1 << i))
38641a52 261 qemu_irq_lower(s->sense[i]);
b00052e4
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262 }
263
264 s->sense_state = sense;
265}
266
38641a52 267static void spitz_keyboard_strobe(void *opaque, int line, int level)
b00052e4 268{
bc24a225 269 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
38641a52
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270
271 if (level)
272 s->strobe_state |= 1 << line;
273 else
274 s->strobe_state &= ~(1 << line);
275 spitz_keyboard_sense_update(s);
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276}
277
bc24a225 278static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode)
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279{
280 int spitz_keycode = s->keymap[keycode & 0x7f];
281 if (spitz_keycode == -1)
282 return;
283
284 /* Handle the additional keys */
285 if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) {
7ef4227b 286 qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80));
b00052e4
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287 return;
288 }
289
290 if (keycode & 0x80)
291 s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf));
292 else
293 s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf);
294
295 spitz_keyboard_sense_update(s);
296}
297
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298#define SPITZ_MOD_SHIFT (1 << 7)
299#define SPITZ_MOD_CTRL (1 << 8)
300#define SPITZ_MOD_FN (1 << 9)
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301
302#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c
303
7ef4227b 304static void spitz_keyboard_handler(void *opaque, int keycode)
b00052e4 305{
7ef4227b 306 SpitzKeyboardState *s = opaque;
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307 uint16_t code;
308 int mapcode;
309 switch (keycode) {
310 case 0x2a: /* Left Shift */
311 s->modifiers |= 1;
312 break;
313 case 0xaa:
314 s->modifiers &= ~1;
315 break;
316 case 0x36: /* Right Shift */
317 s->modifiers |= 2;
318 break;
319 case 0xb6:
320 s->modifiers &= ~2;
321 break;
322 case 0x1d: /* Control */
323 s->modifiers |= 4;
324 break;
325 case 0x9d:
326 s->modifiers &= ~4;
327 break;
328 case 0x38: /* Alt */
329 s->modifiers |= 8;
330 break;
331 case 0xb8:
332 s->modifiers &= ~8;
333 break;
334 }
335
336 code = s->pre_map[mapcode = ((s->modifiers & 3) ?
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337 (keycode | SPITZ_MOD_SHIFT) :
338 (keycode & ~SPITZ_MOD_SHIFT))];
b00052e4
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339
340 if (code != mapcode) {
341#if 0
0062609f 342 if ((code & SPITZ_MOD_SHIFT) && !(s->modifiers & 1)) {
b00052e4 343 QUEUE_KEY(0x2a | (keycode & 0x80));
0062609f
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344 }
345 if ((code & SPITZ_MOD_CTRL) && !(s->modifiers & 4)) {
b00052e4 346 QUEUE_KEY(0x1d | (keycode & 0x80));
0062609f
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347 }
348 if ((code & SPITZ_MOD_FN) && !(s->modifiers & 8)) {
b00052e4 349 QUEUE_KEY(0x38 | (keycode & 0x80));
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350 }
351 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1)) {
b00052e4 352 QUEUE_KEY(0x2a | (~keycode & 0x80));
0062609f
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353 }
354 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2)) {
b00052e4 355 QUEUE_KEY(0x36 | (~keycode & 0x80));
0062609f 356 }
b00052e4
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357#else
358 if (keycode & 0x80) {
359 if ((s->imodifiers & 1 ) && !(s->modifiers & 1))
360 QUEUE_KEY(0x2a | 0x80);
361 if ((s->imodifiers & 4 ) && !(s->modifiers & 4))
362 QUEUE_KEY(0x1d | 0x80);
363 if ((s->imodifiers & 8 ) && !(s->modifiers & 8))
364 QUEUE_KEY(0x38 | 0x80);
365 if ((s->imodifiers & 0x10) && (s->modifiers & 1))
366 QUEUE_KEY(0x2a);
367 if ((s->imodifiers & 0x20) && (s->modifiers & 2))
368 QUEUE_KEY(0x36);
369 s->imodifiers = 0;
370 } else {
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371 if ((code & SPITZ_MOD_SHIFT) &&
372 !((s->modifiers | s->imodifiers) & 1)) {
b00052e4
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373 QUEUE_KEY(0x2a);
374 s->imodifiers |= 1;
375 }
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376 if ((code & SPITZ_MOD_CTRL) &&
377 !((s->modifiers | s->imodifiers) & 4)) {
b00052e4
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378 QUEUE_KEY(0x1d);
379 s->imodifiers |= 4;
380 }
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381 if ((code & SPITZ_MOD_FN) &&
382 !((s->modifiers | s->imodifiers) & 8)) {
b00052e4
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383 QUEUE_KEY(0x38);
384 s->imodifiers |= 8;
385 }
0062609f 386 if ((code & SPITZ_MOD_FN) && (s->modifiers & 1) &&
b00052e4
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387 !(s->imodifiers & 0x10)) {
388 QUEUE_KEY(0x2a | 0x80);
389 s->imodifiers |= 0x10;
390 }
0062609f 391 if ((code & SPITZ_MOD_FN) && (s->modifiers & 2) &&
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392 !(s->imodifiers & 0x20)) {
393 QUEUE_KEY(0x36 | 0x80);
394 s->imodifiers |= 0x20;
395 }
396 }
397#endif
398 }
399
400 QUEUE_KEY((code & 0x7f) | (keycode & 0x80));
401}
402
403static void spitz_keyboard_tick(void *opaque)
404{
bc24a225 405 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
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406
407 if (s->fifolen) {
408 spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]);
409 s->fifolen --;
410 if (s->fifopos >= 16)
411 s->fifopos = 0;
412 }
413
bc72ad67 414 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
73bcb24d 415 NANOSECONDS_PER_SECOND / 32);
b00052e4
AZ
416}
417
bc24a225 418static void spitz_keyboard_pre_map(SpitzKeyboardState *s)
b00052e4
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419{
420 int i;
421 for (i = 0; i < 0x100; i ++)
422 s->pre_map[i] = i;
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423 s->pre_map[0x02 | SPITZ_MOD_SHIFT] = 0x02 | SPITZ_MOD_SHIFT; /* exclam */
424 s->pre_map[0x28 | SPITZ_MOD_SHIFT] = 0x03 | SPITZ_MOD_SHIFT; /* quotedbl */
425 s->pre_map[0x04 | SPITZ_MOD_SHIFT] = 0x04 | SPITZ_MOD_SHIFT; /* # */
426 s->pre_map[0x05 | SPITZ_MOD_SHIFT] = 0x05 | SPITZ_MOD_SHIFT; /* dollar */
427 s->pre_map[0x06 | SPITZ_MOD_SHIFT] = 0x06 | SPITZ_MOD_SHIFT; /* percent */
428 s->pre_map[0x08 | SPITZ_MOD_SHIFT] = 0x07 | SPITZ_MOD_SHIFT; /* ampersand */
429 s->pre_map[0x28] = 0x08 | SPITZ_MOD_SHIFT; /* ' */
430 s->pre_map[0x0a | SPITZ_MOD_SHIFT] = 0x09 | SPITZ_MOD_SHIFT; /* ( */
431 s->pre_map[0x0b | SPITZ_MOD_SHIFT] = 0x0a | SPITZ_MOD_SHIFT; /* ) */
432 s->pre_map[0x29 | SPITZ_MOD_SHIFT] = 0x0b | SPITZ_MOD_SHIFT; /* tilde */
433 s->pre_map[0x03 | SPITZ_MOD_SHIFT] = 0x0c | SPITZ_MOD_SHIFT; /* at */
434 s->pre_map[0xd3] = 0x0e | SPITZ_MOD_FN; /* Delete */
435 s->pre_map[0x3a] = 0x0f | SPITZ_MOD_FN; /* Caps_Lock */
436 s->pre_map[0x07 | SPITZ_MOD_SHIFT] = 0x11 | SPITZ_MOD_FN; /* ^ */
437 s->pre_map[0x0d] = 0x12 | SPITZ_MOD_FN; /* equal */
438 s->pre_map[0x0d | SPITZ_MOD_SHIFT] = 0x13 | SPITZ_MOD_FN; /* plus */
439 s->pre_map[0x1a] = 0x14 | SPITZ_MOD_FN; /* [ */
440 s->pre_map[0x1b] = 0x15 | SPITZ_MOD_FN; /* ] */
441 s->pre_map[0x1a | SPITZ_MOD_SHIFT] = 0x16 | SPITZ_MOD_FN; /* { */
442 s->pre_map[0x1b | SPITZ_MOD_SHIFT] = 0x17 | SPITZ_MOD_FN; /* } */
443 s->pre_map[0x27] = 0x22 | SPITZ_MOD_FN; /* semicolon */
444 s->pre_map[0x27 | SPITZ_MOD_SHIFT] = 0x23 | SPITZ_MOD_FN; /* colon */
445 s->pre_map[0x09 | SPITZ_MOD_SHIFT] = 0x24 | SPITZ_MOD_FN; /* asterisk */
446 s->pre_map[0x2b] = 0x25 | SPITZ_MOD_FN; /* backslash */
447 s->pre_map[0x2b | SPITZ_MOD_SHIFT] = 0x26 | SPITZ_MOD_FN; /* bar */
448 s->pre_map[0x0c | SPITZ_MOD_SHIFT] = 0x30 | SPITZ_MOD_FN; /* _ */
449 s->pre_map[0x33 | SPITZ_MOD_SHIFT] = 0x33 | SPITZ_MOD_FN; /* less */
450 s->pre_map[0x35] = 0x33 | SPITZ_MOD_SHIFT; /* slash */
451 s->pre_map[0x34 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_FN; /* greater */
452 s->pre_map[0x35 | SPITZ_MOD_SHIFT] = 0x34 | SPITZ_MOD_SHIFT; /* question */
453 s->pre_map[0x49] = 0x48 | SPITZ_MOD_FN; /* Page_Up */
454 s->pre_map[0x51] = 0x50 | SPITZ_MOD_FN; /* Page_Down */
b00052e4
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455
456 s->modifiers = 0;
457 s->imodifiers = 0;
458 s->fifopos = 0;
459 s->fifolen = 0;
b00052e4
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460}
461
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462#undef SPITZ_MOD_SHIFT
463#undef SPITZ_MOD_CTRL
464#undef SPITZ_MOD_FN
b00052e4 465
7ef4227b 466static int spitz_keyboard_post_load(void *opaque, int version_id)
aa941b94 467{
bc24a225 468 SpitzKeyboardState *s = (SpitzKeyboardState *) opaque;
aa941b94
AZ
469
470 /* Release all pressed keys */
471 memset(s->keyrow, 0, sizeof(s->keyrow));
472 spitz_keyboard_sense_update(s);
473 s->modifiers = 0;
474 s->imodifiers = 0;
475 s->fifopos = 0;
476 s->fifolen = 0;
477
478 return 0;
479}
480
bc24a225 481static void spitz_keyboard_register(PXA2xxState *cpu)
b00052e4 482{
7ef4227b
DES
483 int i;
484 DeviceState *dev;
bc24a225 485 SpitzKeyboardState *s;
b00052e4 486
73e9d965
AF
487 dev = sysbus_create_simple(TYPE_SPITZ_KEYBOARD, -1, NULL);
488 s = SPITZ_KEYBOARD(dev);
b00052e4 489
38641a52 490 for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++)
0bb53337 491 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i]));
38641a52
AZ
492
493 for (i = 0; i < 5; i ++)
0bb53337 494 s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]);
38641a52 495
7ef4227b
DES
496 if (!graphic_rotate)
497 s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]);
498
499 for (i = 0; i < 5; i++)
500 qemu_set_irq(s->gpiomap[i], 0);
501
b00052e4 502 for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++)
0bb53337 503 qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i],
7ef4227b
DES
504 qdev_get_gpio_in(dev, i));
505
bc72ad67 506 timer_mod(s->kbdtimer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL));
7ef4227b
DES
507
508 qemu_add_kbd_event_handler(spitz_keyboard_handler, s);
509}
510
f68575c9 511static void spitz_keyboard_init(Object *obj)
7ef4227b 512{
f68575c9
XZ
513 DeviceState *dev = DEVICE(obj);
514 SpitzKeyboardState *s = SPITZ_KEYBOARD(obj);
7ef4227b
DES
515 int i, j;
516
7ef4227b
DES
517 for (i = 0; i < 0x80; i ++)
518 s->keymap[i] = -1;
519 for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++)
520 for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++)
521 if (spitz_keymap[i][j] != -1)
522 s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
b00052e4
AZ
523
524 spitz_keyboard_pre_map(s);
aa941b94 525
bc72ad67 526 s->kbdtimer = timer_new_ns(QEMU_CLOCK_VIRTUAL, spitz_keyboard_tick, s);
73e9d965
AF
527 qdev_init_gpio_in(dev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM);
528 qdev_init_gpio_out(dev, s->sense, SPITZ_KEY_SENSE_NUM);
b00052e4
AZ
529}
530
b00052e4
AZ
531/* LCD backlight controller */
532
533#define LCDTG_RESCTL 0x00
534#define LCDTG_PHACTRL 0x01
535#define LCDTG_DUTYCTRL 0x02
536#define LCDTG_POWERREG0 0x03
537#define LCDTG_POWERREG1 0x04
538#define LCDTG_GPOR3 0x05
539#define LCDTG_PICTRL 0x06
540#define LCDTG_POLCTRL 0x07
541
a984a69e
PB
542typedef struct {
543 SSISlave ssidev;
43842120
DES
544 uint32_t bl_intensity;
545 uint32_t bl_power;
a984a69e 546} SpitzLCDTG;
b00052e4 547
a984a69e 548static void spitz_bl_update(SpitzLCDTG *s)
b00052e4 549{
a984a69e
PB
550 if (s->bl_power && s->bl_intensity)
551 zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
b00052e4 552 else
89cdb6af 553 zaurus_printf("LCD Backlight now off\n");
b00052e4
AZ
554}
555
a984a69e
PB
556/* FIXME: Implement GPIO properly and remove this hack. */
557static SpitzLCDTG *spitz_lcdtg;
558
38641a52 559static inline void spitz_bl_bit5(void *opaque, int line, int level)
b00052e4 560{
a984a69e
PB
561 SpitzLCDTG *s = spitz_lcdtg;
562 int prev = s->bl_intensity;
b00052e4
AZ
563
564 if (level)
a984a69e 565 s->bl_intensity &= ~0x20;
b00052e4 566 else
a984a69e 567 s->bl_intensity |= 0x20;
b00052e4 568
a984a69e
PB
569 if (s->bl_power && prev != s->bl_intensity)
570 spitz_bl_update(s);
b00052e4
AZ
571}
572
38641a52 573static inline void spitz_bl_power(void *opaque, int line, int level)
b00052e4 574{
a984a69e
PB
575 SpitzLCDTG *s = spitz_lcdtg;
576 s->bl_power = !!level;
577 spitz_bl_update(s);
b00052e4
AZ
578}
579
a984a69e 580static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
b00052e4 581{
a984a69e
PB
582 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
583 int addr;
584 addr = value >> 5;
585 value &= 0x1f;
b00052e4
AZ
586
587 switch (addr) {
588 case LCDTG_RESCTL:
589 if (value)
89cdb6af 590 zaurus_printf("LCD in QVGA mode\n");
b00052e4 591 else
89cdb6af 592 zaurus_printf("LCD in VGA mode\n");
b00052e4
AZ
593 break;
594
595 case LCDTG_DUTYCTRL:
a984a69e
PB
596 s->bl_intensity &= ~0x1f;
597 s->bl_intensity |= value;
598 if (s->bl_power)
599 spitz_bl_update(s);
b00052e4
AZ
600 break;
601
602 case LCDTG_POWERREG0:
603 /* Set common voltage to M62332FP */
604 break;
605 }
a984a69e
PB
606 return 0;
607}
608
7673bb4c 609static void spitz_lcdtg_realize(SSISlave *dev, Error **errp)
a984a69e
PB
610{
611 SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev);
612
613 spitz_lcdtg = s;
614 s->bl_power = 0;
615 s->bl_intensity = 0x20;
b00052e4
AZ
616}
617
618/* SSP devices */
619
620#define CORGI_SSP_PORT 2
621
622#define SPITZ_GPIO_LCDCON_CS 53
623#define SPITZ_GPIO_ADS7846_CS 14
624#define SPITZ_GPIO_MAX1111_CS 20
625#define SPITZ_GPIO_TP_INT 11
626
a984a69e 627static DeviceState *max1111;
b00052e4
AZ
628
629/* "Demux" the signal based on current chipselect */
a984a69e
PB
630typedef struct {
631 SSISlave ssidev;
632 SSIBus *bus[3];
43842120 633 uint32_t enable[3];
a984a69e 634} CorgiSSPState;
b00052e4 635
a984a69e 636static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
b00052e4 637{
a984a69e
PB
638 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev);
639 int i;
640
641 for (i = 0; i < 3; i++) {
642 if (s->enable[i]) {
643 return ssi_transfer(s->bus[i], value);
644 }
645 }
646 return 0;
b00052e4
AZ
647}
648
38641a52 649static void corgi_ssp_gpio_cs(void *opaque, int line, int level)
b00052e4 650{
a984a69e
PB
651 CorgiSSPState *s = (CorgiSSPState *)opaque;
652 assert(line >= 0 && line < 3);
653 s->enable[line] = !level;
b00052e4
AZ
654}
655
656#define MAX1111_BATT_VOLT 1
657#define MAX1111_BATT_TEMP 2
658#define MAX1111_ACIN_VOLT 3
659
660#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */
661#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */
662#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */
663
38641a52 664static void spitz_adc_temp_on(void *opaque, int line, int level)
b00052e4
AZ
665{
666 if (!max1111)
667 return;
668
669 if (level)
670 max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP);
671 else
672 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
673}
674
7673bb4c 675static void corgi_ssp_realize(SSISlave *d, Error **errp)
a984a69e 676{
1a7d9ee6
PC
677 DeviceState *dev = DEVICE(d);
678 CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, d);
a984a69e 679
1a7d9ee6
PC
680 qdev_init_gpio_in(dev, corgi_ssp_gpio_cs, 3);
681 s->bus[0] = ssi_create_bus(dev, "ssi0");
682 s->bus[1] = ssi_create_bus(dev, "ssi1");
683 s->bus[2] = ssi_create_bus(dev, "ssi2");
a984a69e
PB
684}
685
bc24a225 686static void spitz_ssp_attach(PXA2xxState *cpu)
b00052e4 687{
a984a69e
PB
688 DeviceState *mux;
689 DeviceState *dev;
690 void *bus;
691
692 mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp");
38641a52 693
a984a69e 694 bus = qdev_get_child_bus(mux, "ssi0");
22ed1d34 695 ssi_create_slave(bus, "spitz-lcdtg");
b00052e4 696
a984a69e
PB
697 bus = qdev_get_child_bus(mux, "ssi1");
698 dev = ssi_create_slave(bus, "ads7846");
699 qdev_connect_gpio_out(dev, 0,
0bb53337 700 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT));
b00052e4 701
a984a69e
PB
702 bus = qdev_get_child_bus(mux, "ssi2");
703 max1111 = ssi_create_slave(bus, "max1111");
b00052e4
AZ
704 max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT);
705 max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
706 max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN);
707
0bb53337 708 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS,
a984a69e 709 qdev_get_gpio_in(mux, 0));
0bb53337 710 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS,
a984a69e 711 qdev_get_gpio_in(mux, 1));
0bb53337 712 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS,
a984a69e 713 qdev_get_gpio_in(mux, 2));
b00052e4
AZ
714}
715
716/* CF Microdrive */
717
bc24a225 718static void spitz_microdrive_attach(PXA2xxState *cpu, int slot)
b00052e4 719{
bc24a225 720 PCMCIACardState *md;
751c6a17 721 DriveInfo *dinfo;
b00052e4 722
751c6a17 723 dinfo = drive_get(IF_IDE, 0, 0);
124386cc 724 if (!dinfo || dinfo->media_cd)
e4bcb14c 725 return;
124386cc
MA
726 md = dscm1xxxx_init(dinfo);
727 pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md);
b00052e4
AZ
728}
729
adb86c37
AZ
730/* Wm8750 and Max7310 on I2C */
731
732#define AKITA_MAX_ADDR 0x18
611d7189
AZ
733#define SPITZ_WM_ADDRL 0x1b
734#define SPITZ_WM_ADDRH 0x1a
adb86c37
AZ
735
736#define SPITZ_GPIO_WM 5
737
38641a52 738static void spitz_wm8750_addr(void *opaque, int line, int level)
adb86c37 739{
9e07bdf8 740 I2CSlave *wm = (I2CSlave *) opaque;
adb86c37
AZ
741 if (level)
742 i2c_set_slave_address(wm, SPITZ_WM_ADDRH);
743 else
744 i2c_set_slave_address(wm, SPITZ_WM_ADDRL);
745}
adb86c37 746
bc24a225 747static void spitz_i2c_setup(PXA2xxState *cpu)
adb86c37
AZ
748{
749 /* Attach the CPU on one end of our I2C bus. */
a5c82852 750 I2CBus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
adb86c37 751
cdbe40ca 752 DeviceState *wm;
adb86c37 753
adb86c37 754 /* Attach a WM8750 to the bus */
7ab14c5a 755 wm = i2c_create_slave(bus, TYPE_WM8750, 0);
adb86c37 756
38641a52 757 spitz_wm8750_addr(wm, 0, 0);
0bb53337 758 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM,
f3c7d038 759 qemu_allocate_irq(spitz_wm8750_addr, wm, 0));
adb86c37
AZ
760 /* .. and to the sound interface. */
761 cpu->i2s->opaque = wm;
762 cpu->i2s->codec_out = wm8750_dac_dat;
763 cpu->i2s->codec_in = wm8750_adc_dat;
764 wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s);
adb86c37
AZ
765}
766
bc24a225 767static void spitz_akita_i2c_setup(PXA2xxState *cpu)
adb86c37
AZ
768{
769 /* Attach a Max7310 to Akita I2C bus. */
6c0bd6bd
PB
770 i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310",
771 AKITA_MAX_ADDR);
adb86c37
AZ
772}
773
b00052e4
AZ
774/* Other peripherals */
775
38641a52 776static void spitz_out_switch(void *opaque, int line, int level)
b00052e4 777{
38641a52
AZ
778 switch (line) {
779 case 0:
89cdb6af 780 zaurus_printf("Charging %s.\n", level ? "off" : "on");
38641a52
AZ
781 break;
782 case 1:
89cdb6af 783 zaurus_printf("Discharging %s.\n", level ? "on" : "off");
38641a52
AZ
784 break;
785 case 2:
89cdb6af 786 zaurus_printf("Green LED %s.\n", level ? "on" : "off");
38641a52
AZ
787 break;
788 case 3:
89cdb6af 789 zaurus_printf("Orange LED %s.\n", level ? "on" : "off");
38641a52
AZ
790 break;
791 case 4:
792 spitz_bl_bit5(opaque, line, level);
793 break;
794 case 5:
795 spitz_bl_power(opaque, line, level);
796 break;
797 case 6:
798 spitz_adc_temp_on(opaque, line, level);
799 break;
800 }
b00052e4
AZ
801}
802
803#define SPITZ_SCP_LED_GREEN 1
804#define SPITZ_SCP_JK_B 2
805#define SPITZ_SCP_CHRG_ON 3
806#define SPITZ_SCP_MUTE_L 4
807#define SPITZ_SCP_MUTE_R 5
808#define SPITZ_SCP_CF_POWER 6
809#define SPITZ_SCP_LED_ORANGE 7
810#define SPITZ_SCP_JK_A 8
811#define SPITZ_SCP_ADC_TEMP_ON 9
812#define SPITZ_SCP2_IR_ON 1
813#define SPITZ_SCP2_AKIN_PULLUP 2
814#define SPITZ_SCP2_BACKLIGHT_CONT 7
815#define SPITZ_SCP2_BACKLIGHT_ON 8
816#define SPITZ_SCP2_MIC_BIAS 9
817
bc24a225 818static void spitz_scoop_gpio_setup(PXA2xxState *cpu,
383d01c6 819 DeviceState *scp0, DeviceState *scp1)
b00052e4 820{
38641a52
AZ
821 qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
822
383d01c6
DES
823 qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
824 qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
825 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
826 qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
b00052e4 827
e33d8cdb 828 if (scp1) {
383d01c6
DES
829 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
830 qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
b00052e4
AZ
831 }
832
383d01c6 833 qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
b00052e4
AZ
834}
835
836#define SPITZ_GPIO_HSYNC 22
837#define SPITZ_GPIO_SD_DETECT 9
838#define SPITZ_GPIO_SD_WP 81
839#define SPITZ_GPIO_ON_RESET 89
840#define SPITZ_GPIO_BAT_COVER 90
841#define SPITZ_GPIO_CF1_IRQ 105
842#define SPITZ_GPIO_CF1_CD 94
843#define SPITZ_GPIO_CF2_IRQ 106
844#define SPITZ_GPIO_CF2_CD 93
845
38641a52 846static int spitz_hsync;
b00052e4 847
38641a52 848static void spitz_lcd_hsync_handler(void *opaque, int line, int level)
b00052e4 849{
bc24a225 850 PXA2xxState *cpu = (PXA2xxState *) opaque;
0bb53337 851 qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync);
b00052e4
AZ
852 spitz_hsync ^= 1;
853}
854
14da5821
GR
855static void spitz_reset(void *opaque, int line, int level)
856{
857 if (level) {
cf83f140 858 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
14da5821
GR
859 }
860}
861
bc24a225 862static void spitz_gpio_setup(PXA2xxState *cpu, int slots)
b00052e4 863{
38641a52 864 qemu_irq lcd_hsync;
14da5821
GR
865 qemu_irq reset;
866
b00052e4
AZ
867 /*
868 * Bad hack: We toggle the LCD hsync GPIO on every GPIO status
869 * read to satisfy broken guests that poll-wait for hsync.
870 * Simulating a real hsync event would be less practical and
871 * wouldn't guarantee that a guest ever exits the loop.
872 */
873 spitz_hsync = 0;
f3c7d038 874 lcd_hsync = qemu_allocate_irq(spitz_lcd_hsync_handler, cpu, 0);
38641a52
AZ
875 pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync);
876 pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync);
b00052e4
AZ
877
878 /* MMC/SD host */
02ce600c 879 pxa2xx_mmci_handlers(cpu->mmc,
0bb53337
DES
880 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP),
881 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT));
b00052e4
AZ
882
883 /* Battery lock always closed */
0bb53337 884 qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER));
b00052e4
AZ
885
886 /* Handle reset */
14da5821
GR
887 reset = qemu_allocate_irq(spitz_reset, cpu, 0);
888 qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, reset);
b00052e4
AZ
889
890 /* PCMCIA signals: card's IRQ and Card-Detect */
b00052e4 891 if (slots >= 1)
38641a52 892 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
0bb53337
DES
893 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ),
894 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD));
b00052e4 895 if (slots >= 2)
38641a52 896 pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
0bb53337
DES
897 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ),
898 qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD));
b00052e4
AZ
899}
900
b00052e4
AZ
901/* Board init. */
902enum spitz_model_e { spitz, akita, borzoi, terrier };
903
7fb4fdcf
AZ
904#define SPITZ_RAM 0x04000000
905#define SPITZ_ROM 0x00800000
906
f93eb9ff
AZ
907static struct arm_boot_info spitz_binfo = {
908 .loader_start = PXA2XX_SDRAM_BASE,
909 .ram_size = 0x04000000,
910};
911
3ef96221 912static void spitz_common_init(MachineState *machine,
72a9f5b7 913 enum spitz_model_e model, int arm_id)
b00052e4 914{
2e7ad760 915 PXA2xxState *mpu;
383d01c6 916 DeviceState *scp0, *scp1 = NULL;
a6dc4c2d 917 MemoryRegion *address_space_mem = get_system_memory();
7cc09e6c 918 MemoryRegion *rom = g_new(MemoryRegion, 1);
b00052e4 919
d95b2f8d 920 /* Setup CPU & memory */
ba1ba5cc
IM
921 mpu = pxa270_init(address_space_mem, spitz_binfo.ram_size,
922 machine->cpu_type);
b00052e4 923
2e7ad760 924 sl_flash_register(mpu, (model == spitz) ? FLASH_128M : FLASH_1024M);
b00052e4 925
98a99ce0 926 memory_region_init_ram(rom, NULL, "spitz.rom", SPITZ_ROM, &error_fatal);
7cc09e6c
AK
927 memory_region_set_readonly(rom, true);
928 memory_region_add_subregion(address_space_mem, 0, rom);
b00052e4
AZ
929
930 /* Setup peripherals */
2e7ad760 931 spitz_keyboard_register(mpu);
b00052e4 932
2e7ad760 933 spitz_ssp_attach(mpu);
b00052e4 934
383d01c6 935 scp0 = sysbus_create_simple("scoop", 0x10800000, NULL);
e33d8cdb 936 if (model != akita) {
383d01c6 937 scp1 = sysbus_create_simple("scoop", 0x08800040, NULL);
e33d8cdb 938 }
b00052e4 939
2e7ad760 940 spitz_scoop_gpio_setup(mpu, scp0, scp1);
b00052e4 941
2e7ad760 942 spitz_gpio_setup(mpu, (model == akita) ? 1 : 2);
b00052e4 943
2e7ad760 944 spitz_i2c_setup(mpu);
adb86c37
AZ
945
946 if (model == akita)
2e7ad760 947 spitz_akita_i2c_setup(mpu);
adb86c37 948
b00052e4 949 if (model == terrier)
bf5ee248 950 /* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
2e7ad760 951 spitz_microdrive_attach(mpu, 1);
b00052e4 952 else if (model != akita)
15b18ec2 953 /* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
2e7ad760 954 spitz_microdrive_attach(mpu, 0);
b00052e4 955
3ef96221
MA
956 spitz_binfo.kernel_filename = machine->kernel_filename;
957 spitz_binfo.kernel_cmdline = machine->kernel_cmdline;
958 spitz_binfo.initrd_filename = machine->initrd_filename;
f93eb9ff 959 spitz_binfo.board_id = arm_id;
3aaa8dfa 960 arm_load_kernel(mpu->cpu, &spitz_binfo);
f78630ab 961 sl_bootparam_write(SL_PXA_PARAM_BASE);
b00052e4
AZ
962}
963
3ef96221 964static void spitz_init(MachineState *machine)
b00052e4 965{
3ef96221 966 spitz_common_init(machine, spitz, 0x2c9);
b00052e4
AZ
967}
968
3ef96221 969static void borzoi_init(MachineState *machine)
b00052e4 970{
3ef96221 971 spitz_common_init(machine, borzoi, 0x33f);
b00052e4
AZ
972}
973
3ef96221 974static void akita_init(MachineState *machine)
b00052e4 975{
3ef96221 976 spitz_common_init(machine, akita, 0x2e8);
b00052e4
AZ
977}
978
3ef96221 979static void terrier_init(MachineState *machine)
b00052e4 980{
3ef96221 981 spitz_common_init(machine, terrier, 0x33f);
b00052e4
AZ
982}
983
8a661aea 984static void akitapda_class_init(ObjectClass *oc, void *data)
e264d29d 985{
8a661aea
AF
986 MachineClass *mc = MACHINE_CLASS(oc);
987
ad1e8db8 988 mc->desc = "Sharp SL-C1000 (Akita) PDA (PXA270)";
e264d29d 989 mc->init = akita_init;
4672cbd7 990 mc->ignore_memory_transaction_failures = true;
ba1ba5cc 991 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
e264d29d 992}
b00052e4 993
8a661aea
AF
994static const TypeInfo akitapda_type = {
995 .name = MACHINE_TYPE_NAME("akita"),
996 .parent = TYPE_MACHINE,
997 .class_init = akitapda_class_init,
998};
b00052e4 999
8a661aea 1000static void spitzpda_class_init(ObjectClass *oc, void *data)
e264d29d 1001{
8a661aea
AF
1002 MachineClass *mc = MACHINE_CLASS(oc);
1003
ad1e8db8 1004 mc->desc = "Sharp SL-C3000 (Spitz) PDA (PXA270)";
e264d29d 1005 mc->init = spitz_init;
2059839b 1006 mc->block_default_type = IF_IDE;
4672cbd7 1007 mc->ignore_memory_transaction_failures = true;
ba1ba5cc 1008 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
e264d29d 1009}
b00052e4 1010
8a661aea
AF
1011static const TypeInfo spitzpda_type = {
1012 .name = MACHINE_TYPE_NAME("spitz"),
1013 .parent = TYPE_MACHINE,
1014 .class_init = spitzpda_class_init,
1015};
e264d29d 1016
8a661aea 1017static void borzoipda_class_init(ObjectClass *oc, void *data)
e264d29d 1018{
8a661aea
AF
1019 MachineClass *mc = MACHINE_CLASS(oc);
1020
ad1e8db8 1021 mc->desc = "Sharp SL-C3100 (Borzoi) PDA (PXA270)";
e264d29d 1022 mc->init = borzoi_init;
2059839b 1023 mc->block_default_type = IF_IDE;
4672cbd7 1024 mc->ignore_memory_transaction_failures = true;
ba1ba5cc 1025 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c0");
e264d29d
EH
1026}
1027
8a661aea
AF
1028static const TypeInfo borzoipda_type = {
1029 .name = MACHINE_TYPE_NAME("borzoi"),
1030 .parent = TYPE_MACHINE,
1031 .class_init = borzoipda_class_init,
1032};
a984a69e 1033
8a661aea 1034static void terrierpda_class_init(ObjectClass *oc, void *data)
f80f9ec9 1035{
8a661aea
AF
1036 MachineClass *mc = MACHINE_CLASS(oc);
1037
ad1e8db8 1038 mc->desc = "Sharp SL-C3200 (Terrier) PDA (PXA270)";
e264d29d 1039 mc->init = terrier_init;
2059839b 1040 mc->block_default_type = IF_IDE;
4672cbd7 1041 mc->ignore_memory_transaction_failures = true;
ba1ba5cc 1042 mc->default_cpu_type = ARM_CPU_TYPE_NAME("pxa270-c5");
f80f9ec9
AL
1043}
1044
8a661aea
AF
1045static const TypeInfo terrierpda_type = {
1046 .name = MACHINE_TYPE_NAME("terrier"),
1047 .parent = TYPE_MACHINE,
1048 .class_init = terrierpda_class_init,
1049};
1050
1051static void spitz_machine_init(void)
1052{
1053 type_register_static(&akitapda_type);
1054 type_register_static(&spitzpda_type);
1055 type_register_static(&borzoipda_type);
1056 type_register_static(&terrierpda_type);
1057}
1058
0e6aac87 1059type_init(spitz_machine_init)
f80f9ec9 1060
7ef4227b
DES
1061static bool is_version_0(void *opaque, int version_id)
1062{
1063 return version_id == 0;
1064}
1065
34f9f0b5
DES
1066static VMStateDescription vmstate_sl_nand_info = {
1067 .name = "sl-nand",
1068 .version_id = 0,
1069 .minimum_version_id = 0,
8f1e884b 1070 .fields = (VMStateField[]) {
34f9f0b5
DES
1071 VMSTATE_UINT8(ctl, SLNANDState),
1072 VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
1073 VMSTATE_END_OF_LIST(),
1074 },
1075};
1076
999e12bb
AL
1077static Property sl_nand_properties[] = {
1078 DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
1079 DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1),
1080 DEFINE_PROP_END_OF_LIST(),
1081};
1082
1083static void sl_nand_class_init(ObjectClass *klass, void *data)
1084{
39bffca2 1085 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 1086
39bffca2
AL
1087 dc->vmsd = &vmstate_sl_nand_info;
1088 dc->props = sl_nand_properties;
07bc425e 1089 dc->realize = sl_nand_realize;
9f9bdf43 1090 /* Reason: init() method uses drive_get() */
e90f2a8c 1091 dc->user_creatable = false;
999e12bb
AL
1092}
1093
8c43a6f0 1094static const TypeInfo sl_nand_info = {
7eb8104a 1095 .name = TYPE_SL_NAND,
39bffca2
AL
1096 .parent = TYPE_SYS_BUS_DEVICE,
1097 .instance_size = sizeof(SLNANDState),
f68575c9 1098 .instance_init = sl_nand_init,
39bffca2 1099 .class_init = sl_nand_class_init,
34f9f0b5
DES
1100};
1101
7ef4227b
DES
1102static VMStateDescription vmstate_spitz_kbd = {
1103 .name = "spitz-keyboard",
1104 .version_id = 1,
1105 .minimum_version_id = 0,
7ef4227b 1106 .post_load = spitz_keyboard_post_load,
8f1e884b 1107 .fields = (VMStateField[]) {
7ef4227b
DES
1108 VMSTATE_UINT16(sense_state, SpitzKeyboardState),
1109 VMSTATE_UINT16(strobe_state, SpitzKeyboardState),
1110 VMSTATE_UNUSED_TEST(is_version_0, 5),
1111 VMSTATE_END_OF_LIST(),
1112 },
1113};
1114
999e12bb
AL
1115static void spitz_keyboard_class_init(ObjectClass *klass, void *data)
1116{
39bffca2 1117 DeviceClass *dc = DEVICE_CLASS(klass);
999e12bb 1118
39bffca2 1119 dc->vmsd = &vmstate_spitz_kbd;
999e12bb
AL
1120}
1121
8c43a6f0 1122static const TypeInfo spitz_keyboard_info = {
73e9d965 1123 .name = TYPE_SPITZ_KEYBOARD,
39bffca2
AL
1124 .parent = TYPE_SYS_BUS_DEVICE,
1125 .instance_size = sizeof(SpitzKeyboardState),
f68575c9 1126 .instance_init = spitz_keyboard_init,
39bffca2 1127 .class_init = spitz_keyboard_class_init,
7ef4227b
DES
1128};
1129
43842120
DES
1130static const VMStateDescription vmstate_corgi_ssp_regs = {
1131 .name = "corgi-ssp",
66530953
PC
1132 .version_id = 2,
1133 .minimum_version_id = 2,
8f1e884b 1134 .fields = (VMStateField[]) {
66530953 1135 VMSTATE_SSI_SLAVE(ssidev, CorgiSSPState),
43842120
DES
1136 VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
1137 VMSTATE_END_OF_LIST(),
1138 }
1139};
1140
cd6c4cf2
AL
1141static void corgi_ssp_class_init(ObjectClass *klass, void *data)
1142{
39bffca2 1143 DeviceClass *dc = DEVICE_CLASS(klass);
cd6c4cf2
AL
1144 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1145
7673bb4c 1146 k->realize = corgi_ssp_realize;
cd6c4cf2 1147 k->transfer = corgi_ssp_transfer;
39bffca2 1148 dc->vmsd = &vmstate_corgi_ssp_regs;
cd6c4cf2
AL
1149}
1150
8c43a6f0 1151static const TypeInfo corgi_ssp_info = {
39bffca2
AL
1152 .name = "corgi-ssp",
1153 .parent = TYPE_SSI_SLAVE,
1154 .instance_size = sizeof(CorgiSSPState),
1155 .class_init = corgi_ssp_class_init,
a984a69e
PB
1156};
1157
43842120
DES
1158static const VMStateDescription vmstate_spitz_lcdtg_regs = {
1159 .name = "spitz-lcdtg",
1160 .version_id = 1,
1161 .minimum_version_id = 1,
8f1e884b 1162 .fields = (VMStateField[]) {
66530953 1163 VMSTATE_SSI_SLAVE(ssidev, SpitzLCDTG),
43842120
DES
1164 VMSTATE_UINT32(bl_intensity, SpitzLCDTG),
1165 VMSTATE_UINT32(bl_power, SpitzLCDTG),
1166 VMSTATE_END_OF_LIST(),
1167 }
1168};
1169
cd6c4cf2
AL
1170static void spitz_lcdtg_class_init(ObjectClass *klass, void *data)
1171{
39bffca2 1172 DeviceClass *dc = DEVICE_CLASS(klass);
cd6c4cf2
AL
1173 SSISlaveClass *k = SSI_SLAVE_CLASS(klass);
1174
7673bb4c 1175 k->realize = spitz_lcdtg_realize;
cd6c4cf2 1176 k->transfer = spitz_lcdtg_transfer;
39bffca2 1177 dc->vmsd = &vmstate_spitz_lcdtg_regs;
cd6c4cf2
AL
1178}
1179
8c43a6f0 1180static const TypeInfo spitz_lcdtg_info = {
39bffca2
AL
1181 .name = "spitz-lcdtg",
1182 .parent = TYPE_SSI_SLAVE,
1183 .instance_size = sizeof(SpitzLCDTG),
1184 .class_init = spitz_lcdtg_class_init,
a984a69e
PB
1185};
1186
83f7d43a 1187static void spitz_register_types(void)
a984a69e 1188{
39bffca2
AL
1189 type_register_static(&corgi_ssp_info);
1190 type_register_static(&spitz_lcdtg_info);
1191 type_register_static(&spitz_keyboard_info);
1192 type_register_static(&sl_nand_info);
a984a69e
PB
1193}
1194
83f7d43a 1195type_init(spitz_register_types)