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419ad672 GH |
1 | /* |
2 | * QEMU 16550A UART emulation | |
3 | * | |
4 | * Copyright (c) 2003-2004 Fabrice Bellard | |
5 | * Copyright (c) 2008 Citrix Systems, Inc. | |
6 | * | |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy | |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
90734e02 GH |
26 | /* see docs/specs/pci-serial.txt */ |
27 | ||
b6a0aa05 | 28 | #include "qemu/osdep.h" |
da34e65c | 29 | #include "qapi/error.h" |
0b8fa32f | 30 | #include "qemu/module.h" |
0d09e41a | 31 | #include "hw/char/serial.h" |
64552b6b | 32 | #include "hw/irq.h" |
83c9f4ca | 33 | #include "hw/pci/pci.h" |
a27bd6c7 | 34 | #include "hw/qdev-properties.h" |
d6454270 | 35 | #include "migration/vmstate.h" |
419ad672 GH |
36 | |
37 | typedef struct PCISerialState { | |
38 | PCIDevice dev; | |
39 | SerialState state; | |
13cc2c3e | 40 | uint8_t prog_if; |
419ad672 GH |
41 | } PCISerialState; |
42 | ||
7781b88e MAL |
43 | #define TYPE_PCI_SERIAL "pci-serial" |
44 | #define PCI_SERIAL(s) OBJECT_CHECK(PCISerialState, (s), TYPE_PCI_SERIAL) | |
a48da7b5 | 45 | |
28d85904 | 46 | static void serial_pci_realize(PCIDevice *dev, Error **errp) |
419ad672 GH |
47 | { |
48 | PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); | |
49 | SerialState *s = &pci->state; | |
db895a1e | 50 | Error *err = NULL; |
419ad672 | 51 | |
118bfd76 | 52 | if (!qdev_realize(DEVICE(s), NULL, &err)) { |
28d85904 MA |
53 | error_propagate(errp, err); |
54 | return; | |
db895a1e | 55 | } |
419ad672 | 56 | |
13cc2c3e | 57 | pci->dev.config[PCI_CLASS_PROG] = pci->prog_if; |
419ad672 | 58 | pci->dev.config[PCI_INTERRUPT_PIN] = 0x01; |
9e64f8a3 | 59 | s->irq = pci_allocate_irq(&pci->dev); |
419ad672 | 60 | |
300b1fc6 | 61 | memory_region_init_io(&s->io, OBJECT(pci), &serial_io_ops, s, "serial", 8); |
419ad672 | 62 | pci_register_bar(&pci->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io); |
419ad672 GH |
63 | } |
64 | ||
65 | static void serial_pci_exit(PCIDevice *dev) | |
66 | { | |
67 | PCISerialState *pci = DO_UPCAST(PCISerialState, dev, dev); | |
68 | SerialState *s = &pci->state; | |
69 | ||
981c3dcd | 70 | qdev_unrealize(DEVICE(s)); |
9e64f8a3 | 71 | qemu_free_irq(s->irq); |
419ad672 GH |
72 | } |
73 | ||
74 | static const VMStateDescription vmstate_pci_serial = { | |
75 | .name = "pci-serial", | |
76 | .version_id = 1, | |
77 | .minimum_version_id = 1, | |
d49805ae | 78 | .fields = (VMStateField[]) { |
419ad672 GH |
79 | VMSTATE_PCI_DEVICE(dev, PCISerialState), |
80 | VMSTATE_STRUCT(state, PCISerialState, 0, vmstate_serial, SerialState), | |
81 | VMSTATE_END_OF_LIST() | |
82 | } | |
83 | }; | |
84 | ||
85 | static Property serial_pci_properties[] = { | |
86 | DEFINE_PROP_CHR("chardev", PCISerialState, state.chr), | |
13cc2c3e | 87 | DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02), |
419ad672 GH |
88 | DEFINE_PROP_END_OF_LIST(), |
89 | }; | |
90 | ||
91 | static void serial_pci_class_initfn(ObjectClass *klass, void *data) | |
92 | { | |
93 | DeviceClass *dc = DEVICE_CLASS(klass); | |
94 | PCIDeviceClass *pc = PCI_DEVICE_CLASS(klass); | |
28d85904 | 95 | pc->realize = serial_pci_realize; |
419ad672 | 96 | pc->exit = serial_pci_exit; |
5c03a254 PB |
97 | pc->vendor_id = PCI_VENDOR_ID_REDHAT; |
98 | pc->device_id = PCI_DEVICE_ID_REDHAT_SERIAL; | |
419ad672 GH |
99 | pc->revision = 1; |
100 | pc->class_id = PCI_CLASS_COMMUNICATION_SERIAL; | |
101 | dc->vmsd = &vmstate_pci_serial; | |
4f67d30b | 102 | device_class_set_props(dc, serial_pci_properties); |
125ee0ed | 103 | set_bit(DEVICE_CATEGORY_INPUT, dc->categories); |
419ad672 GH |
104 | } |
105 | ||
7781b88e MAL |
106 | static void serial_pci_init(Object *o) |
107 | { | |
108 | PCISerialState *ps = PCI_SERIAL(o); | |
109 | ||
9fc7fc4d | 110 | object_initialize_child(o, "serial", &ps->state, TYPE_SERIAL); |
7781b88e MAL |
111 | } |
112 | ||
8c43a6f0 | 113 | static const TypeInfo serial_pci_info = { |
7781b88e | 114 | .name = TYPE_PCI_SERIAL, |
419ad672 GH |
115 | .parent = TYPE_PCI_DEVICE, |
116 | .instance_size = sizeof(PCISerialState), | |
7781b88e | 117 | .instance_init = serial_pci_init, |
419ad672 | 118 | .class_init = serial_pci_class_initfn, |
fd3b02c8 EH |
119 | .interfaces = (InterfaceInfo[]) { |
120 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, | |
121 | { }, | |
122 | }, | |
419ad672 GH |
123 | }; |
124 | ||
125 | static void serial_pci_register_types(void) | |
126 | { | |
127 | type_register_static(&serial_pci_info); | |
128 | } | |
129 | ||
130 | type_init(serial_pci_register_types) |