]>
Commit | Line | Data |
---|---|---|
36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 LX |
14 | #include "qemu/option.h" |
15 | #include "qapi/qmp/qerror.h" | |
16 | #include "sysemu/replay.h" | |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
da34e65c | 19 | #include "qapi/error.h" |
9af23989 | 20 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 21 | #include "qapi/visitor.h" |
33cd52b5 AG |
22 | #include "hw/sysbus.h" |
23 | #include "sysemu/sysemu.h" | |
3bfe5716 | 24 | #include "sysemu/numa.h" |
33cd52b5 | 25 | #include "qemu/error-report.h" |
c6ff347c | 26 | #include "sysemu/qtest.h" |
edc24ccd | 27 | #include "hw/pci/pci.h" |
f6a0d06b | 28 | #include "hw/mem/nvdimm.h" |
82b911aa | 29 | #include "migration/vmstate.h" |
6b1b1440 | 30 | |
7483cbba AD |
31 | GlobalProperty hw_compat_5_0[] = { |
32 | { "virtio-balloon-device", "page-poison", "false" }, | |
f983ff95 PB |
33 | { "vmport", "x-read-set-eax", "off" }, |
34 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
35 | { "vmport", "x-report-vmx-type", "off" }, | |
36 | { "vmport", "x-cmds-v2", "off" }, | |
7483cbba | 37 | }; |
541aaa1d CH |
38 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
39 | ||
5f258577 | 40 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
41 | { "virtio-blk-device", "queue-size", "128"}, |
42 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 43 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
44 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
45 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
46 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 47 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 48 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
49 | { "qxl", "revision", "4" }, |
50 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 51 | { "fw_cfg", "acpi-mr-restore", "false" }, |
5f258577 EY |
52 | }; |
53 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
54 | ||
eb1556c4 JS |
55 | GlobalProperty hw_compat_4_1[] = { |
56 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
9d7bd082 | 57 | { "virtio-device", "use-disabled-flag", "false" }, |
eb1556c4 | 58 | }; |
9aec2e52 CH |
59 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
60 | ||
8e8cbed0 | 61 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
62 | { "VGA", "edid", "false" }, |
63 | { "secondary-vga", "edid", "false" }, | |
64 | { "bochs-display", "edid", "false" }, | |
65 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 66 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 67 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 68 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 69 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 70 | }; |
9bf2650b CH |
71 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
72 | ||
abd93cc7 | 73 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
74 | { "pcie-root-port", "x-speed", "2_5" }, |
75 | { "pcie-root-port", "x-width", "1" }, | |
76 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
77 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
78 | { "tpm-crb", "ppi", "false" }, |
79 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
80 | { "usb-kbd", "serial", "42" }, |
81 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 82 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
83 | { "virtio-blk-device", "discard", "false" }, |
84 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 85 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 86 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
87 | }; |
88 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
89 | ||
ddb3235d MAL |
90 | GlobalProperty hw_compat_3_0[] = {}; |
91 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
92 | ||
0d47310b | 93 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
94 | { "migration", "decompress-error-check", "off" }, |
95 | { "hda-audio", "use-timer", "false" }, | |
96 | { "cirrus-vga", "global-vmstate", "true" }, | |
97 | { "VGA", "global-vmstate", "true" }, | |
98 | { "vmware-svga", "global-vmstate", "true" }, | |
99 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
100 | }; |
101 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
102 | ||
43df70a9 | 103 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
104 | { "hpet", "hpet-offset-saved", "false" }, |
105 | { "virtio-blk-pci", "vectors", "2" }, | |
106 | { "vhost-user-blk-pci", "vectors", "2" }, | |
107 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
108 | }; |
109 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
110 | ||
503224f4 | 111 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
112 | { "virtio-mouse-device", "wheel-axis", "false" }, |
113 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
114 | }; |
115 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
116 | ||
3e803152 | 117 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
118 | { "pci-bridge", "shpc", "off" }, |
119 | { "intel-iommu", "pt", "off" }, | |
120 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
121 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
122 | }; |
123 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
124 | ||
edc24ccd | 125 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
126 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
127 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
128 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
129 | { "pci-bridge", "shpc", "on" }, | |
130 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
131 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
132 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
133 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
134 | { "cirrus-vga", "vgamem_mb", "8" }, | |
135 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
136 | }; |
137 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
138 | ||
5a995064 | 139 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
140 | { "virtio-pci", "page-per-vq", "on" }, |
141 | { "virtio-serial-device", "emergency-write", "off" }, | |
142 | { "ioapic", "version", "0x11" }, | |
143 | { "intel-iommu", "x-buggy-eim", "true" }, | |
144 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
145 | }; |
146 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
147 | ||
ff8f261f | 148 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 149 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
150 | /* Optional because not all virtio-pci devices support legacy mode */ |
151 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
152 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
153 | }; |
154 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
155 | ||
fe759610 | 156 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
157 | { "isa-fdc", "fallback", "144" }, |
158 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
159 | { "pvscsi", "x-disable-pcie", "on" }, | |
160 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
161 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
162 | }; |
163 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
164 | ||
2f99b9c2 | 165 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
166 | /* Optional because the 'scsi' property is Linux-only */ |
167 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
168 | { "e1000", "extra_mac_registers", "off" }, |
169 | { "virtio-pci", "x-disable-pcie", "on" }, | |
170 | { "virtio-pci", "migrate-extra", "off" }, | |
171 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
172 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
173 | }; |
174 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
175 | ||
8995dd90 | 176 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
177 | { "virtio-blk-pci", "any_layout", "off" }, |
178 | { "virtio-balloon-pci", "any_layout", "off" }, | |
179 | { "virtio-serial-pci", "any_layout", "off" }, | |
180 | { "virtio-9p-pci", "any_layout", "off" }, | |
181 | { "virtio-rng-pci", "any_layout", "off" }, | |
182 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
183 | { "migration", "send-configuration", "off" }, | |
184 | { "migration", "send-section-footer", "off" }, | |
185 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
186 | }; |
187 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
188 | ||
1c30044e MAL |
189 | GlobalProperty hw_compat_2_2[] = {}; |
190 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
191 | ||
c4fc5695 | 192 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
193 | { "intel-hda", "old_msi_addr", "on" }, |
194 | { "VGA", "qemu-extended-regs", "off" }, | |
195 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
196 | { "virtio-scsi-pci", "any_layout", "off" }, | |
197 | { "usb-mouse", "usb_version", "1" }, | |
198 | { "usb-kbd", "usb_version", "1" }, | |
199 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
200 | }; |
201 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
202 | ||
6b1b1440 MA |
203 | static char *machine_get_kernel(Object *obj, Error **errp) |
204 | { | |
205 | MachineState *ms = MACHINE(obj); | |
206 | ||
207 | return g_strdup(ms->kernel_filename); | |
208 | } | |
209 | ||
210 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
211 | { | |
212 | MachineState *ms = MACHINE(obj); | |
213 | ||
556068ee | 214 | g_free(ms->kernel_filename); |
6b1b1440 MA |
215 | ms->kernel_filename = g_strdup(value); |
216 | } | |
217 | ||
218 | static char *machine_get_initrd(Object *obj, Error **errp) | |
219 | { | |
220 | MachineState *ms = MACHINE(obj); | |
221 | ||
222 | return g_strdup(ms->initrd_filename); | |
223 | } | |
224 | ||
225 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
226 | { | |
227 | MachineState *ms = MACHINE(obj); | |
228 | ||
556068ee | 229 | g_free(ms->initrd_filename); |
6b1b1440 MA |
230 | ms->initrd_filename = g_strdup(value); |
231 | } | |
232 | ||
233 | static char *machine_get_append(Object *obj, Error **errp) | |
234 | { | |
235 | MachineState *ms = MACHINE(obj); | |
236 | ||
237 | return g_strdup(ms->kernel_cmdline); | |
238 | } | |
239 | ||
240 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
241 | { | |
242 | MachineState *ms = MACHINE(obj); | |
243 | ||
556068ee | 244 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
245 | ms->kernel_cmdline = g_strdup(value); |
246 | } | |
247 | ||
248 | static char *machine_get_dtb(Object *obj, Error **errp) | |
249 | { | |
250 | MachineState *ms = MACHINE(obj); | |
251 | ||
252 | return g_strdup(ms->dtb); | |
253 | } | |
254 | ||
255 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
256 | { | |
257 | MachineState *ms = MACHINE(obj); | |
258 | ||
556068ee | 259 | g_free(ms->dtb); |
6b1b1440 MA |
260 | ms->dtb = g_strdup(value); |
261 | } | |
262 | ||
263 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
264 | { | |
265 | MachineState *ms = MACHINE(obj); | |
266 | ||
267 | return g_strdup(ms->dumpdtb); | |
268 | } | |
269 | ||
270 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
271 | { | |
272 | MachineState *ms = MACHINE(obj); | |
273 | ||
556068ee | 274 | g_free(ms->dumpdtb); |
6b1b1440 MA |
275 | ms->dumpdtb = g_strdup(value); |
276 | } | |
277 | ||
278 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
279 | const char *name, void *opaque, |
280 | Error **errp) | |
6b1b1440 MA |
281 | { |
282 | MachineState *ms = MACHINE(obj); | |
283 | int64_t value = ms->phandle_start; | |
284 | ||
51e72bc1 | 285 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
286 | } |
287 | ||
288 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
289 | const char *name, void *opaque, |
290 | Error **errp) | |
6b1b1440 MA |
291 | { |
292 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
293 | int64_t value; |
294 | ||
668f62ec | 295 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
296 | return; |
297 | } | |
298 | ||
299 | ms->phandle_start = value; | |
300 | } | |
301 | ||
302 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
303 | { | |
304 | MachineState *ms = MACHINE(obj); | |
305 | ||
306 | return g_strdup(ms->dt_compatible); | |
307 | } | |
308 | ||
309 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
310 | { | |
311 | MachineState *ms = MACHINE(obj); | |
312 | ||
556068ee | 313 | g_free(ms->dt_compatible); |
6b1b1440 MA |
314 | ms->dt_compatible = g_strdup(value); |
315 | } | |
316 | ||
317 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
318 | { | |
319 | MachineState *ms = MACHINE(obj); | |
320 | ||
321 | return ms->dump_guest_core; | |
322 | } | |
323 | ||
324 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
325 | { | |
326 | MachineState *ms = MACHINE(obj); | |
327 | ||
328 | ms->dump_guest_core = value; | |
329 | } | |
330 | ||
331 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
332 | { | |
333 | MachineState *ms = MACHINE(obj); | |
334 | ||
335 | return ms->mem_merge; | |
336 | } | |
337 | ||
338 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
339 | { | |
340 | MachineState *ms = MACHINE(obj); | |
341 | ||
342 | ms->mem_merge = value; | |
343 | } | |
344 | ||
345 | static bool machine_get_usb(Object *obj, Error **errp) | |
346 | { | |
347 | MachineState *ms = MACHINE(obj); | |
348 | ||
349 | return ms->usb; | |
350 | } | |
351 | ||
352 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
353 | { | |
354 | MachineState *ms = MACHINE(obj); | |
355 | ||
356 | ms->usb = value; | |
c6e76503 | 357 | ms->usb_disabled = !value; |
6b1b1440 MA |
358 | } |
359 | ||
cfc58cf3 EH |
360 | static bool machine_get_graphics(Object *obj, Error **errp) |
361 | { | |
362 | MachineState *ms = MACHINE(obj); | |
363 | ||
364 | return ms->enable_graphics; | |
365 | } | |
366 | ||
367 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
368 | { | |
369 | MachineState *ms = MACHINE(obj); | |
370 | ||
371 | ms->enable_graphics = value; | |
372 | } | |
373 | ||
6b1b1440 MA |
374 | static char *machine_get_firmware(Object *obj, Error **errp) |
375 | { | |
376 | MachineState *ms = MACHINE(obj); | |
377 | ||
378 | return g_strdup(ms->firmware); | |
379 | } | |
380 | ||
381 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
382 | { | |
383 | MachineState *ms = MACHINE(obj); | |
384 | ||
556068ee | 385 | g_free(ms->firmware); |
6b1b1440 MA |
386 | ms->firmware = g_strdup(value); |
387 | } | |
388 | ||
9850c604 AG |
389 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
390 | { | |
391 | MachineState *ms = MACHINE(obj); | |
392 | ||
393 | ms->suppress_vmdesc = value; | |
394 | } | |
395 | ||
396 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
397 | { | |
398 | MachineState *ms = MACHINE(obj); | |
399 | ||
400 | return ms->suppress_vmdesc; | |
401 | } | |
402 | ||
902c053d GK |
403 | static void machine_set_enforce_config_section(Object *obj, bool value, |
404 | Error **errp) | |
405 | { | |
406 | MachineState *ms = MACHINE(obj); | |
407 | ||
91c082ad TH |
408 | warn_report("enforce-config-section is deprecated, please use " |
409 | "-global migration.send-configuration=on|off instead"); | |
410 | ||
902c053d GK |
411 | ms->enforce_config_section = value; |
412 | } | |
413 | ||
414 | static bool machine_get_enforce_config_section(Object *obj, Error **errp) | |
415 | { | |
416 | MachineState *ms = MACHINE(obj); | |
417 | ||
418 | return ms->enforce_config_section; | |
419 | } | |
420 | ||
db588194 BS |
421 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
422 | { | |
423 | MachineState *ms = MACHINE(obj); | |
424 | ||
425 | return g_strdup(ms->memory_encryption); | |
426 | } | |
427 | ||
428 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
429 | Error **errp) | |
430 | { | |
431 | MachineState *ms = MACHINE(obj); | |
432 | ||
433 | g_free(ms->memory_encryption); | |
434 | ms->memory_encryption = g_strdup(value); | |
4ba59be1 DDAG |
435 | |
436 | /* | |
437 | * With memory encryption, the host can't see the real contents of RAM, | |
438 | * so there's no point in it trying to merge areas. | |
439 | */ | |
440 | if (value) { | |
441 | machine_set_mem_merge(obj, false, errp); | |
442 | } | |
db588194 BS |
443 | } |
444 | ||
f6a0d06b EA |
445 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
446 | { | |
447 | MachineState *ms = MACHINE(obj); | |
448 | ||
449 | return ms->nvdimms_state->is_enabled; | |
450 | } | |
451 | ||
452 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
453 | { | |
454 | MachineState *ms = MACHINE(obj); | |
455 | ||
456 | ms->nvdimms_state->is_enabled = value; | |
457 | } | |
458 | ||
244b3f44 TX |
459 | static bool machine_get_hmat(Object *obj, Error **errp) |
460 | { | |
461 | MachineState *ms = MACHINE(obj); | |
462 | ||
463 | return ms->numa_state->hmat_enabled; | |
464 | } | |
465 | ||
466 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
467 | { | |
468 | MachineState *ms = MACHINE(obj); | |
469 | ||
470 | ms->numa_state->hmat_enabled = value; | |
471 | } | |
472 | ||
f6a0d06b EA |
473 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
474 | { | |
475 | MachineState *ms = MACHINE(obj); | |
476 | ||
477 | return g_strdup(ms->nvdimms_state->persistence_string); | |
478 | } | |
479 | ||
480 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
481 | Error **errp) | |
482 | { | |
483 | MachineState *ms = MACHINE(obj); | |
484 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
485 | ||
486 | if (strcmp(value, "cpu") == 0) { | |
487 | nvdimms_state->persistence = 3; | |
488 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
489 | nvdimms_state->persistence = 2; | |
490 | } else { | |
491 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
492 | value); | |
493 | return; | |
494 | } | |
495 | ||
496 | g_free(nvdimms_state->persistence_string); | |
497 | nvdimms_state->persistence_string = g_strdup(value); | |
498 | } | |
499 | ||
0bd1909d | 500 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 501 | { |
0bd1909d EH |
502 | strList *item = g_new0(strList, 1); |
503 | ||
504 | item->value = g_strdup(type); | |
505 | item->next = mc->allowed_dynamic_sysbus_devices; | |
506 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
507 | } |
508 | ||
0bd1909d | 509 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 510 | { |
0bd1909d EH |
511 | MachineState *machine = opaque; |
512 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
513 | bool allowed = false; | |
514 | strList *wl; | |
33cd52b5 | 515 | |
0bd1909d EH |
516 | for (wl = mc->allowed_dynamic_sysbus_devices; |
517 | !allowed && wl; | |
518 | wl = wl->next) { | |
519 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
520 | } | |
521 | ||
522 | if (!allowed) { | |
523 | error_report("Option '-device %s' cannot be handled by this machine", | |
524 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
525 | exit(1); | |
33cd52b5 | 526 | } |
0bd1909d EH |
527 | } |
528 | ||
aa8b1839 IM |
529 | static char *machine_get_memdev(Object *obj, Error **errp) |
530 | { | |
531 | MachineState *ms = MACHINE(obj); | |
532 | ||
533 | return g_strdup(ms->ram_memdev_id); | |
534 | } | |
535 | ||
536 | static void machine_set_memdev(Object *obj, const char *value, Error **errp) | |
537 | { | |
538 | MachineState *ms = MACHINE(obj); | |
539 | ||
540 | g_free(ms->ram_memdev_id); | |
541 | ms->ram_memdev_id = g_strdup(value); | |
542 | } | |
543 | ||
544 | ||
0bd1909d EH |
545 | static void machine_init_notify(Notifier *notifier, void *data) |
546 | { | |
547 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
548 | |
549 | /* | |
0bd1909d EH |
550 | * Loop through all dynamically created sysbus devices and check if they are |
551 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 552 | */ |
0bd1909d | 553 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
554 | } |
555 | ||
f2d672c2 IM |
556 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
557 | { | |
558 | int i; | |
f2d672c2 | 559 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
560 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
561 | ||
562 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
563 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 564 | |
f2d672c2 | 565 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 566 | Object *cpu; |
f2d672c2 IM |
567 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
568 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
569 | ||
d342eb76 | 570 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
571 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
572 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
573 | sizeof(*cpu_item->props)); | |
574 | ||
575 | cpu = machine->possible_cpus->cpus[i].cpu; | |
576 | if (cpu) { | |
577 | cpu_item->has_qom_path = true; | |
578 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
579 | } | |
580 | list_item->value = cpu_item; | |
581 | list_item->next = head; | |
582 | head = list_item; | |
583 | } | |
584 | return head; | |
585 | } | |
586 | ||
7c88e65d IM |
587 | /** |
588 | * machine_set_cpu_numa_node: | |
589 | * @machine: machine object to modify | |
590 | * @props: specifies which cpu objects to assign to | |
591 | * numa node specified by @props.node_id | |
592 | * @errp: if an error occurs, a pointer to an area to store the error | |
593 | * | |
594 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
595 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
596 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
597 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
598 | * | |
599 | * However for CLI convenience it's possible to pass in subset of properties, | |
600 | * which would affect all cpu slots that match it. | |
601 | * Ex for pc machine: | |
602 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
603 | * -numa cpu,node-id=0,socket_id=0 \ | |
604 | * -numa cpu,node-id=1,socket_id=1 | |
605 | * will assign all child cores of socket 0 to node 0 and | |
606 | * of socket 1 to node 1. | |
607 | * | |
608 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
609 | * return error. | |
610 | * Empty subset is disallowed and function will return with error in this case. | |
611 | */ | |
612 | void machine_set_cpu_numa_node(MachineState *machine, | |
613 | const CpuInstanceProperties *props, Error **errp) | |
614 | { | |
615 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 616 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
617 | bool match = false; |
618 | int i; | |
619 | ||
620 | if (!mc->possible_cpu_arch_ids) { | |
621 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
622 | return; | |
623 | } | |
624 | ||
625 | /* disabling node mapping is not supported, forbid it */ | |
626 | assert(props->has_node_id); | |
627 | ||
628 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
629 | mc->possible_cpu_arch_ids(machine); | |
630 | ||
631 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
632 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
633 | ||
634 | /* reject unsupported by board properties */ | |
635 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
636 | error_setg(errp, "thread-id is not supported"); | |
637 | return; | |
638 | } | |
639 | ||
640 | if (props->has_core_id && !slot->props.has_core_id) { | |
641 | error_setg(errp, "core-id is not supported"); | |
642 | return; | |
643 | } | |
644 | ||
645 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
646 | error_setg(errp, "socket-id is not supported"); | |
647 | return; | |
648 | } | |
649 | ||
176d2cda LX |
650 | if (props->has_die_id && !slot->props.has_die_id) { |
651 | error_setg(errp, "die-id is not supported"); | |
652 | return; | |
653 | } | |
654 | ||
7c88e65d IM |
655 | /* skip slots with explicit mismatch */ |
656 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
657 | continue; | |
658 | } | |
659 | ||
660 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
661 | continue; | |
662 | } | |
663 | ||
176d2cda LX |
664 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
665 | continue; | |
666 | } | |
667 | ||
7c88e65d IM |
668 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
669 | continue; | |
670 | } | |
671 | ||
672 | /* reject assignment if slot is already assigned, for compatibility | |
673 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
674 | * error out if cpu thread and matched core have the same node-id */ | |
675 | if (slot->props.has_node_id && | |
676 | slot->props.node_id != props->node_id) { | |
677 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
678 | slot->props.node_id); | |
679 | return; | |
680 | } | |
681 | ||
682 | /* assign slot to node as it's matched '-numa cpu' key */ | |
683 | match = true; | |
684 | slot->props.node_id = props->node_id; | |
685 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
686 | |
687 | if (machine->numa_state->hmat_enabled) { | |
688 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
689 | (props->node_id != numa_info[props->node_id].initiator)) { | |
690 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
691 | " should be itself", props->node_id); | |
692 | return; | |
693 | } | |
694 | numa_info[props->node_id].has_cpu = true; | |
695 | numa_info[props->node_id].initiator = props->node_id; | |
696 | } | |
7c88e65d IM |
697 | } |
698 | ||
699 | if (!match) { | |
700 | error_setg(errp, "no match found"); | |
701 | } | |
702 | } | |
703 | ||
6f479566 LX |
704 | static void smp_parse(MachineState *ms, QemuOpts *opts) |
705 | { | |
706 | if (opts) { | |
707 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
708 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
709 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); | |
710 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
711 | ||
712 | /* compute missing values, prefer sockets over cores over threads */ | |
713 | if (cpus == 0 || sockets == 0) { | |
714 | cores = cores > 0 ? cores : 1; | |
715 | threads = threads > 0 ? threads : 1; | |
716 | if (cpus == 0) { | |
717 | sockets = sockets > 0 ? sockets : 1; | |
718 | cpus = cores * threads * sockets; | |
719 | } else { | |
720 | ms->smp.max_cpus = | |
721 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
722 | sockets = ms->smp.max_cpus / (cores * threads); | |
723 | } | |
724 | } else if (cores == 0) { | |
725 | threads = threads > 0 ? threads : 1; | |
726 | cores = cpus / (sockets * threads); | |
727 | cores = cores > 0 ? cores : 1; | |
728 | } else if (threads == 0) { | |
729 | threads = cpus / (cores * sockets); | |
730 | threads = threads > 0 ? threads : 1; | |
731 | } else if (sockets * cores * threads < cpus) { | |
732 | error_report("cpu topology: " | |
733 | "sockets (%u) * cores (%u) * threads (%u) < " | |
734 | "smp_cpus (%u)", | |
735 | sockets, cores, threads, cpus); | |
736 | exit(1); | |
737 | } | |
738 | ||
739 | ms->smp.max_cpus = | |
740 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
741 | ||
742 | if (ms->smp.max_cpus < cpus) { | |
743 | error_report("maxcpus must be equal to or greater than smp"); | |
744 | exit(1); | |
745 | } | |
746 | ||
747 | if (sockets * cores * threads > ms->smp.max_cpus) { | |
748 | error_report("cpu topology: " | |
749 | "sockets (%u) * cores (%u) * threads (%u) > " | |
750 | "maxcpus (%u)", | |
751 | sockets, cores, threads, | |
752 | ms->smp.max_cpus); | |
753 | exit(1); | |
754 | } | |
755 | ||
756 | if (sockets * cores * threads != ms->smp.max_cpus) { | |
757 | warn_report("Invalid CPU topology deprecated: " | |
758 | "sockets (%u) * cores (%u) * threads (%u) " | |
759 | "!= maxcpus (%u)", | |
760 | sockets, cores, threads, | |
761 | ms->smp.max_cpus); | |
762 | } | |
763 | ||
764 | ms->smp.cpus = cpus; | |
765 | ms->smp.cores = cores; | |
766 | ms->smp.threads = threads; | |
8cb30e3a | 767 | ms->smp.sockets = sockets; |
6f479566 LX |
768 | } |
769 | ||
770 | if (ms->smp.cpus > 1) { | |
771 | Error *blocker = NULL; | |
772 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
773 | replay_add_blocker(blocker); | |
774 | } | |
775 | } | |
776 | ||
076b35b5 ND |
777 | static void machine_class_init(ObjectClass *oc, void *data) |
778 | { | |
779 | MachineClass *mc = MACHINE_CLASS(oc); | |
780 | ||
781 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 782 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 783 | mc->rom_file_has_mr = true; |
6f479566 | 784 | mc->smp_parse = smp_parse; |
26b81df4 | 785 | |
55641213 LV |
786 | /* numa node memory size aligned on 8MB by default. |
787 | * On Linux, each node's border has to be 8MB aligned | |
788 | */ | |
789 | mc->numa_mem_align_shift = 23; | |
3bfe5716 | 790 | mc->numa_auto_assign_ram = numa_default_auto_assign_ram; |
55641213 | 791 | |
26b81df4 | 792 | object_class_property_add_str(oc, "kernel", |
d2623129 | 793 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 794 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 795 | "Linux kernel image file"); |
26b81df4 EH |
796 | |
797 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 798 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 799 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 800 | "Linux initial ramdisk file"); |
26b81df4 EH |
801 | |
802 | object_class_property_add_str(oc, "append", | |
d2623129 | 803 | machine_get_append, machine_set_append); |
26b81df4 | 804 | object_class_property_set_description(oc, "append", |
7eecec7d | 805 | "Linux kernel command line"); |
26b81df4 EH |
806 | |
807 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 808 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 809 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 810 | "Linux kernel device tree file"); |
26b81df4 EH |
811 | |
812 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 813 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 814 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 815 | "Dump current dtb to a file and quit"); |
26b81df4 EH |
816 | |
817 | object_class_property_add(oc, "phandle-start", "int", | |
818 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 819 | NULL, NULL); |
26b81df4 | 820 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 821 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
822 | |
823 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 824 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 825 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 826 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
827 | |
828 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 829 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 830 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 831 | "Include guest memory in a core dump"); |
26b81df4 EH |
832 | |
833 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 834 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 835 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 836 | "Enable/disable memory merge support"); |
26b81df4 EH |
837 | |
838 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 839 | machine_get_usb, machine_set_usb); |
26b81df4 | 840 | object_class_property_set_description(oc, "usb", |
7eecec7d | 841 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
842 | |
843 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 844 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 845 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 846 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 847 | |
26b81df4 | 848 | object_class_property_add_str(oc, "firmware", |
d2623129 | 849 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 850 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 851 | "Firmware image"); |
26b81df4 EH |
852 | |
853 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 854 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 855 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 856 | "Set on to disable self-describing migration"); |
26b81df4 EH |
857 | |
858 | object_class_property_add_bool(oc, "enforce-config-section", | |
d2623129 | 859 | machine_get_enforce_config_section, machine_set_enforce_config_section); |
26b81df4 | 860 | object_class_property_set_description(oc, "enforce-config-section", |
7eecec7d | 861 | "Set on to enforce configuration section migration"); |
db588194 BS |
862 | |
863 | object_class_property_add_str(oc, "memory-encryption", | |
d2623129 | 864 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 865 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 866 | "Set memory encryption object to use"); |
076b35b5 ND |
867 | } |
868 | ||
dcb3d601 EH |
869 | static void machine_class_base_init(ObjectClass *oc, void *data) |
870 | { | |
871 | if (!object_class_is_abstract(oc)) { | |
98cec76a | 872 | MachineClass *mc = MACHINE_CLASS(oc); |
dcb3d601 EH |
873 | const char *cname = object_class_get_name(oc); |
874 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
875 | mc->name = g_strndup(cname, |
876 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 877 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
878 | } |
879 | } | |
880 | ||
6b1b1440 MA |
881 | static void machine_initfn(Object *obj) |
882 | { | |
33cd52b5 | 883 | MachineState *ms = MACHINE(obj); |
b2fc91db | 884 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 885 | |
47c8ca53 | 886 | ms->dump_guest_core = true; |
75cc7f01 | 887 | ms->mem_merge = true; |
cfc58cf3 | 888 | ms->enable_graphics = true; |
d8870d02 | 889 | |
f6a0d06b EA |
890 | if (mc->nvdimm_supported) { |
891 | Object *obj = OBJECT(ms); | |
892 | ||
893 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
894 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 895 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
896 | object_property_set_description(obj, "nvdimm", |
897 | "Set on/off to enable/disable " | |
7eecec7d | 898 | "NVDIMM instantiation"); |
f6a0d06b EA |
899 | |
900 | object_property_add_str(obj, "nvdimm-persistence", | |
901 | machine_get_nvdimm_persistence, | |
d2623129 | 902 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
903 | object_property_set_description(obj, "nvdimm-persistence", |
904 | "Set NVDIMM persistence" | |
7eecec7d | 905 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
906 | } |
907 | ||
fcd3f2cc | 908 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 909 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 910 | object_property_add_bool(obj, "hmat", |
d2623129 | 911 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
912 | object_property_set_description(obj, "hmat", |
913 | "Set on/off to enable/disable " | |
914 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 915 | "Table (HMAT)"); |
aa570207 | 916 | } |
f6a0d06b | 917 | |
aa8b1839 | 918 | object_property_add_str(obj, "memory-backend", |
d2623129 | 919 | machine_get_memdev, machine_set_memdev); |
aa8b1839 IM |
920 | object_property_set_description(obj, "memory-backend", |
921 | "Set RAM backend" | |
7eecec7d | 922 | "Valid value is ID of hostmem based backend"); |
aa8b1839 | 923 | |
33cd52b5 AG |
924 | /* Register notifier when init is done for sysbus sanity checks */ |
925 | ms->sysbus_notifier.notify = machine_init_notify; | |
926 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
6b1b1440 MA |
927 | } |
928 | ||
929 | static void machine_finalize(Object *obj) | |
930 | { | |
931 | MachineState *ms = MACHINE(obj); | |
932 | ||
6b1b1440 MA |
933 | g_free(ms->kernel_filename); |
934 | g_free(ms->initrd_filename); | |
935 | g_free(ms->kernel_cmdline); | |
936 | g_free(ms->dtb); | |
937 | g_free(ms->dumpdtb); | |
938 | g_free(ms->dt_compatible); | |
939 | g_free(ms->firmware); | |
2ff4f67c | 940 | g_free(ms->device_memory); |
f6a0d06b | 941 | g_free(ms->nvdimms_state); |
aa570207 | 942 | g_free(ms->numa_state); |
6b1b1440 | 943 | } |
36d20cb2 | 944 | |
5e97b623 MA |
945 | bool machine_usb(MachineState *machine) |
946 | { | |
947 | return machine->usb; | |
948 | } | |
949 | ||
6cabe7fa MA |
950 | int machine_phandle_start(MachineState *machine) |
951 | { | |
952 | return machine->phandle_start; | |
953 | } | |
954 | ||
47c8ca53 MA |
955 | bool machine_dump_guest_core(MachineState *machine) |
956 | { | |
957 | return machine->dump_guest_core; | |
958 | } | |
959 | ||
75cc7f01 MA |
960 | bool machine_mem_merge(MachineState *machine) |
961 | { | |
962 | return machine->mem_merge; | |
963 | } | |
964 | ||
ec78f811 IM |
965 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
966 | { | |
967 | GString *s = g_string_new(NULL); | |
968 | if (cpu->props.has_socket_id) { | |
969 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
970 | } | |
176d2cda LX |
971 | if (cpu->props.has_die_id) { |
972 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); | |
973 | } | |
ec78f811 IM |
974 | if (cpu->props.has_core_id) { |
975 | if (s->len) { | |
976 | g_string_append_printf(s, ", "); | |
977 | } | |
978 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
979 | } | |
980 | if (cpu->props.has_thread_id) { | |
981 | if (s->len) { | |
982 | g_string_append_printf(s, ", "); | |
983 | } | |
984 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
985 | } | |
986 | return g_string_free(s, false); | |
987 | } | |
988 | ||
244b3f44 TX |
989 | static void numa_validate_initiator(NumaState *numa_state) |
990 | { | |
991 | int i; | |
992 | NodeInfo *numa_info = numa_state->nodes; | |
993 | ||
994 | for (i = 0; i < numa_state->num_nodes; i++) { | |
995 | if (numa_info[i].initiator == MAX_NODES) { | |
996 | error_report("The initiator of NUMA node %d is missing, use " | |
997 | "'-numa node,initiator' option to declare it", i); | |
998 | exit(1); | |
999 | } | |
1000 | ||
1001 | if (!numa_info[numa_info[i].initiator].present) { | |
1002 | error_report("NUMA node %" PRIu16 " is missing, use " | |
1003 | "'-numa node' option to declare it first", | |
1004 | numa_info[i].initiator); | |
1005 | exit(1); | |
1006 | } | |
1007 | ||
1008 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
1009 | error_report("The initiator of NUMA node %d is invalid", i); | |
1010 | exit(1); | |
1011 | } | |
1012 | } | |
1013 | } | |
1014 | ||
7a3099fc | 1015 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
1016 | { |
1017 | int i; | |
60bed6a3 | 1018 | bool default_mapping; |
ec78f811 IM |
1019 | GString *s = g_string_new(NULL); |
1020 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1021 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1022 | ||
aa570207 | 1023 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1024 | for (i = 0; i < possible_cpus->len; i++) { |
1025 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1026 | break; | |
1027 | } | |
1028 | } | |
1029 | default_mapping = (i == possible_cpus->len); | |
1030 | ||
ec78f811 IM |
1031 | for (i = 0; i < possible_cpus->len; i++) { |
1032 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1033 | ||
ec78f811 | 1034 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1035 | /* fetch default mapping from board and enable it */ |
1036 | CpuInstanceProperties props = cpu_slot->props; | |
1037 | ||
79e07936 | 1038 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1039 | if (!default_mapping) { |
60bed6a3 IM |
1040 | /* record slots with not set mapping, |
1041 | * TODO: make it hard error in future */ | |
1042 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1043 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1044 | s->len ? ", " : "", i, cpu_str); | |
1045 | g_free(cpu_str); | |
d41f3e75 IM |
1046 | |
1047 | /* non mapped cpus used to fallback to node 0 */ | |
1048 | props.node_id = 0; | |
60bed6a3 | 1049 | } |
d41f3e75 IM |
1050 | |
1051 | props.has_node_id = true; | |
1052 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1053 | } |
1054 | } | |
244b3f44 TX |
1055 | |
1056 | if (machine->numa_state->hmat_enabled) { | |
1057 | numa_validate_initiator(machine->numa_state); | |
1058 | } | |
1059 | ||
c6ff347c | 1060 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1061 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1062 | s->str); | |
1063 | warn_report("All CPU(s) up to maxcpus should be described " | |
1064 | "in NUMA config, ability to start up with partial NUMA " | |
1065 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1066 | } |
1067 | g_string_free(s, true); | |
1068 | } | |
1069 | ||
82b911aa IM |
1070 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1071 | HostMemoryBackend *backend) | |
1072 | { | |
1073 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1074 | ||
1075 | if (memory_region_is_mapped(ret)) { | |
1076 | char *path = object_get_canonical_path_component(OBJECT(backend)); | |
1077 | error_report("memory backend %s can't be used multiple times.", path); | |
1078 | g_free(path); | |
1079 | exit(EXIT_FAILURE); | |
1080 | } | |
1081 | host_memory_backend_set_mapped(backend, true); | |
1082 | vmstate_register_ram_global(ret); | |
1083 | return ret; | |
1084 | } | |
1085 | ||
482dfe9a IM |
1086 | void machine_run_board_init(MachineState *machine) |
1087 | { | |
1088 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
ec78f811 | 1089 | |
82b911aa IM |
1090 | if (machine->ram_memdev_id) { |
1091 | Object *o; | |
1092 | o = object_resolve_path_type(machine->ram_memdev_id, | |
1093 | TYPE_MEMORY_BACKEND, NULL); | |
1094 | machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); | |
1095 | } | |
1096 | ||
fcd3f2cc | 1097 | if (machine->numa_state) { |
aa570207 TX |
1098 | numa_complete_configuration(machine); |
1099 | if (machine->numa_state->num_nodes) { | |
1100 | machine_numa_finish_cpu_init(machine); | |
1101 | } | |
3aeaac8f | 1102 | } |
c9cf636d AF |
1103 | |
1104 | /* If the machine supports the valid_cpu_types check and the user | |
1105 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1106 | */ | |
1107 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
1108 | ObjectClass *class = object_class_by_name(machine->cpu_type); | |
1109 | int i; | |
1110 | ||
1111 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
1112 | if (object_class_dynamic_cast(class, | |
1113 | machine_class->valid_cpu_types[i])) { | |
1114 | /* The user specificed CPU is in the valid field, we are | |
1115 | * good to go. | |
1116 | */ | |
1117 | break; | |
1118 | } | |
1119 | } | |
1120 | ||
1121 | if (!machine_class->valid_cpu_types[i]) { | |
1122 | /* The user specified CPU is not valid */ | |
1123 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1124 | error_printf("The valid types are: %s", | |
1125 | machine_class->valid_cpu_types[0]); | |
1126 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1127 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1128 | } | |
1129 | error_printf("\n"); | |
1130 | ||
1131 | exit(1); | |
1132 | } | |
1133 | } | |
1134 | ||
482dfe9a IM |
1135 | machine_class->init(machine); |
1136 | } | |
1137 | ||
36d20cb2 MA |
1138 | static const TypeInfo machine_info = { |
1139 | .name = TYPE_MACHINE, | |
1140 | .parent = TYPE_OBJECT, | |
1141 | .abstract = true, | |
1142 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1143 | .class_init = machine_class_init, |
dcb3d601 | 1144 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1145 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1146 | .instance_init = machine_initfn, |
1147 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1148 | }; |
1149 | ||
1150 | static void machine_register_types(void) | |
1151 | { | |
1152 | type_register_static(&machine_info); | |
1153 | } | |
1154 | ||
1155 | type_init(machine_register_types) |