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Commit | Line | Data |
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9eafb62d GH |
1 | /* |
2 | * Virtio video device | |
3 | * | |
4 | * Copyright Red Hat | |
5 | * | |
6 | * Authors: | |
7 | * Dave Airlie | |
8 | * | |
2e252145 GH |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
10 | * See the COPYING file in the top-level directory. | |
9eafb62d GH |
11 | * |
12 | */ | |
e688df6b | 13 | |
9b8bfe21 | 14 | #include "qemu/osdep.h" |
e688df6b | 15 | #include "qapi/error.h" |
0b8fa32f | 16 | #include "qemu/module.h" |
9eafb62d | 17 | #include "hw/pci/pci.h" |
a27bd6c7 | 18 | #include "hw/qdev-properties.h" |
9eafb62d GH |
19 | #include "hw/virtio/virtio.h" |
20 | #include "hw/virtio/virtio-bus.h" | |
267f6646 | 21 | #include "hw/virtio/virtio-gpu-pci.h" |
7ecb381f | 22 | |
c68082c4 | 23 | static Property virtio_gpu_pci_base_properties[] = { |
9eafb62d GH |
24 | DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy), |
25 | DEFINE_PROP_END_OF_LIST(), | |
26 | }; | |
27 | ||
c68082c4 | 28 | static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) |
9eafb62d | 29 | { |
c68082c4 MAL |
30 | VirtIOGPUPCIBase *vgpu = VIRTIO_GPU_PCI_BASE(vpci_dev); |
31 | VirtIOGPUBase *g = vgpu->vgpu; | |
32 | DeviceState *vdev = DEVICE(g); | |
e1888295 | 33 | int i; |
34e304e9 | 34 | Error *local_error = NULL; |
9eafb62d | 35 | |
dd56040d | 36 | virtio_pci_force_virtio_1(vpci_dev); |
118bfd76 | 37 | if (!qdev_realize(vdev, BUS(&vpci_dev->bus), &local_error)) { |
34e304e9 PX |
38 | error_propagate(errp, local_error); |
39 | return; | |
40 | } | |
e1888295 GH |
41 | |
42 | for (i = 0; i < g->conf.max_outputs; i++) { | |
43 | object_property_set_link(OBJECT(g->scanout[i].con), | |
44 | OBJECT(vpci_dev), | |
2726dc51 | 45 | "device", &error_abort); |
e1888295 | 46 | } |
9eafb62d GH |
47 | } |
48 | ||
c68082c4 | 49 | static void virtio_gpu_pci_base_class_init(ObjectClass *klass, void *data) |
9eafb62d GH |
50 | { |
51 | DeviceClass *dc = DEVICE_CLASS(klass); | |
52 | VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass); | |
53 | PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass); | |
54 | ||
55 | set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories); | |
4f67d30b | 56 | device_class_set_props(dc, virtio_gpu_pci_base_properties); |
597966d1 | 57 | dc->hotpluggable = false; |
c68082c4 | 58 | k->realize = virtio_gpu_pci_base_realize; |
9eafb62d GH |
59 | pcidev_k->class_id = PCI_CLASS_DISPLAY_OTHER; |
60 | } | |
61 | ||
c68082c4 MAL |
62 | static const TypeInfo virtio_gpu_pci_base_info = { |
63 | .name = TYPE_VIRTIO_GPU_PCI_BASE, | |
64 | .parent = TYPE_VIRTIO_PCI, | |
65 | .instance_size = sizeof(VirtIOGPUPCIBase), | |
66 | .class_init = virtio_gpu_pci_base_class_init, | |
67 | .abstract = true | |
68 | }; | |
69 | ||
70 | #define TYPE_VIRTIO_GPU_PCI "virtio-gpu-pci" | |
71 | #define VIRTIO_GPU_PCI(obj) \ | |
72 | OBJECT_CHECK(VirtIOGPUPCI, (obj), TYPE_VIRTIO_GPU_PCI) | |
73 | ||
74 | typedef struct VirtIOGPUPCI { | |
75 | VirtIOGPUPCIBase parent_obj; | |
76 | VirtIOGPU vdev; | |
77 | } VirtIOGPUPCI; | |
78 | ||
9eafb62d GH |
79 | static void virtio_gpu_initfn(Object *obj) |
80 | { | |
81 | VirtIOGPUPCI *dev = VIRTIO_GPU_PCI(obj); | |
b3409a31 GH |
82 | |
83 | virtio_instance_init_common(obj, &dev->vdev, sizeof(dev->vdev), | |
84 | TYPE_VIRTIO_GPU); | |
c68082c4 | 85 | VIRTIO_GPU_PCI_BASE(obj)->vgpu = VIRTIO_GPU_BASE(&dev->vdev); |
9eafb62d GH |
86 | } |
87 | ||
a4ee4c8b EH |
88 | static const VirtioPCIDeviceTypeInfo virtio_gpu_pci_info = { |
89 | .generic_name = TYPE_VIRTIO_GPU_PCI, | |
c68082c4 | 90 | .parent = TYPE_VIRTIO_GPU_PCI_BASE, |
9eafb62d GH |
91 | .instance_size = sizeof(VirtIOGPUPCI), |
92 | .instance_init = virtio_gpu_initfn, | |
9eafb62d GH |
93 | }; |
94 | ||
95 | static void virtio_gpu_pci_register_types(void) | |
96 | { | |
c68082c4 | 97 | type_register_static(&virtio_gpu_pci_base_info); |
a4ee4c8b | 98 | virtio_pci_types_register(&virtio_gpu_pci_info); |
9eafb62d | 99 | } |
c68082c4 | 100 | |
9eafb62d | 101 | type_init(virtio_gpu_pci_register_types) |