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813dff13
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1/*
2 * QEMU HPPA hardware system emulator.
3 * Copyright 2018 Helge Deller <deller@gmx.de>
4 */
5
6#include "qemu/osdep.h"
2c65db5e 7#include "qemu/datadir.h"
813dff13 8#include "cpu.h"
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9#include "elf.h"
10#include "hw/loader.h"
813dff13 11#include "qemu/error-report.h"
71e8a915 12#include "sysemu/reset.h"
813dff13 13#include "sysemu/sysemu.h"
b28c4a64 14#include "sysemu/runstate.h"
bcdb9064 15#include "hw/rtc/mc146818rtc.h"
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16#include "hw/timer/i8254.h"
17#include "hw/char/serial.h"
376b8519 18#include "hw/net/lasi_82596.h"
4a4554c6 19#include "hw/nmi.h"
070e9a1e 20#include "hppa_sys.h"
c108cc59 21#include "qemu/units.h"
813dff13 22#include "qapi/error.h"
852c27e2 23#include "net/net.h"
691cbbad 24#include "qemu/log.h"
e07c4f44 25#include "net/net.h"
813dff13 26
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27#define MAX_IDE_BUS 2
28
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29#define MIN_SEABIOS_HPPA_VERSION 1 /* require at least this fw version */
30
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31#define HPA_POWER_BUTTON (FIRMWARE_END - 0x10)
32
33static void hppa_powerdown_req(Notifier *n, void *opaque)
34{
35 hwaddr soft_power_reg = HPA_POWER_BUTTON;
36 uint32_t val;
37
38 val = ldl_be_phys(&address_space_memory, soft_power_reg);
39 if ((val >> 8) == 0) {
40 /* immediately shut down when under hardware control */
41 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
42 return;
43 }
44
45 /* clear bit 31 to indicate that the power switch was pressed. */
46 val &= ~1;
47 stl_be_phys(&address_space_memory, soft_power_reg, val);
48}
49
50static Notifier hppa_system_powerdown_notifier = {
51 .notify = hppa_powerdown_req
52};
53
54
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55static ISABus *hppa_isa_bus(void)
56{
57 ISABus *isa_bus;
58 qemu_irq *isa_irqs;
59 MemoryRegion *isa_region;
60
61 isa_region = g_new(MemoryRegion, 1);
62 memory_region_init_io(isa_region, NULL, &hppa_pci_ignore_ops,
63 NULL, "isa-io", 0x800);
64 memory_region_add_subregion(get_system_memory(), IDE_HPA,
65 isa_region);
66
67 isa_bus = isa_bus_new(NULL, get_system_memory(), isa_region,
68 &error_abort);
69 isa_irqs = i8259_init(isa_bus,
70 /* qemu_allocate_irq(dino_set_isa_irq, s, 0)); */
71 NULL);
72 isa_bus_irqs(isa_bus, isa_irqs);
73
74 return isa_bus;
75}
76
77static uint64_t cpu_hppa_to_phys(void *opaque, uint64_t addr)
78{
79 addr &= (0x10000000 - 1);
80 return addr;
81}
82
83static HPPACPU *cpu[HPPA_MAX_CPUS];
84static uint64_t firmware_entry;
813dff13 85
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86static void fw_cfg_boot_set(void *opaque, const char *boot_device,
87 Error **errp)
88{
89 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
90}
91
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92static FWCfgState *create_fw_cfg(MachineState *ms)
93{
94 FWCfgState *fw_cfg;
95 uint64_t val;
96
24576007 97 fw_cfg = fw_cfg_init_mem(FW_CFG_IO_BASE, FW_CFG_IO_BASE + 4);
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98 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, ms->smp.cpus);
99 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, HPPA_MAX_CPUS);
bfdf22bc 100 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, ms->ram_size);
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101
102 val = cpu_to_le64(MIN_SEABIOS_HPPA_VERSION);
103 fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
104 g_memdup(&val, sizeof(val)), sizeof(val));
105
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106 val = cpu_to_le64(HPPA_TLB_ENTRIES);
107 fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
108 g_memdup(&val, sizeof(val)), sizeof(val));
109
110 val = cpu_to_le64(HPPA_BTLB_ENTRIES);
111 fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
112 g_memdup(&val, sizeof(val)), sizeof(val));
113
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114 val = cpu_to_le64(HPA_POWER_BUTTON);
115 fw_cfg_add_file(fw_cfg, "/etc/power-button-addr",
116 g_memdup(&val, sizeof(val)), sizeof(val));
117
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118 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ms->boot_order[0]);
119 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
120
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121 return fw_cfg;
122}
123
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124static void machine_hppa_init(MachineState *machine)
125{
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126 const char *kernel_filename = machine->kernel_filename;
127 const char *kernel_cmdline = machine->kernel_cmdline;
128 const char *initrd_filename = machine->initrd_filename;
877eb21d 129 DeviceState *dev;
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130 PCIBus *pci_bus;
131 ISABus *isa_bus;
132 qemu_irq rtc_irq, serial_irq;
133 char *firmware_filename;
134 uint64_t firmware_low, firmware_high;
135 long size;
136 uint64_t kernel_entry = 0, kernel_low, kernel_high;
137 MemoryRegion *addr_space = get_system_memory();
138 MemoryRegion *rom_region;
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139 MemoryRegion *cpu_region;
140 long i;
33decbd2 141 unsigned int smp_cpus = machine->smp.cpus;
4765384c 142 SysBusDevice *s;
a72bd606 143
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144 /* Create CPUs. */
145 for (i = 0; i < smp_cpus; i++) {
266a880e 146 char *name = g_strdup_printf("cpu%ld-io-eir", i);
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147 cpu[i] = HPPA_CPU(cpu_create(machine->cpu_type));
148
149 cpu_region = g_new(MemoryRegion, 1);
150 memory_region_init_io(cpu_region, OBJECT(cpu[i]), &hppa_io_eir_ops,
266a880e 151 cpu[i], name, 4);
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152 memory_region_add_subregion(addr_space, CPU_HPA + i * 0x1000,
153 cpu_region);
266a880e 154 g_free(name);
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155 }
156
a72bd606 157 /* Main memory region. */
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158 if (machine->ram_size > 3 * GiB) {
159 error_report("RAM size is currently restricted to 3GB");
160 exit(EXIT_FAILURE);
161 }
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162 memory_region_add_subregion_overlap(addr_space, 0, machine->ram, -1);
163
a72bd606 164
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165 /* Init Lasi chip */
166 lasi_init(addr_space);
167
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168 /* Init Dino (PCI host bus chip). */
169 pci_bus = dino_init(addr_space, &rtc_irq, &serial_irq);
170 assert(pci_bus);
171
172 /* Create ISA bus. */
173 isa_bus = hppa_isa_bus();
174 assert(isa_bus);
175
176 /* Realtime clock, used by firmware for PDC_TOD call. */
177 mc146818_rtc_init(isa_bus, 2000, rtc_irq);
178
179 /* Serial code setup. */
9bca0edb 180 if (serial_hd(0)) {
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181 uint32_t addr = DINO_UART_HPA + 0x800;
182 serial_mm_init(addr_space, addr, 0, serial_irq,
9bca0edb 183 115200, serial_hd(0), DEVICE_BIG_ENDIAN);
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184 }
185
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186 /* fw_cfg configuration interface */
187 create_fw_cfg(machine);
188
a72bd606 189 /* SCSI disk setup. */
877eb21d
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190 dev = DEVICE(pci_create_simple(pci_bus, -1, "lsi53c895a"));
191 lsi53c8xx_handle_legacy_cmdline(dev);
a72bd606 192
4765384c
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193 /* Graphics setup. */
194 if (machine->enable_graphics && vga_interface_type != VGA_NONE) {
3e80f690 195 dev = qdev_new("artist");
4765384c 196 s = SYS_BUS_DEVICE(dev);
3c6ef471 197 sysbus_realize_and_unref(s, &error_fatal);
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198 sysbus_mmio_map(s, 0, LASI_GFX_HPA);
199 sysbus_mmio_map(s, 1, ARTIST_FB_ADDR);
200 }
201
0e6de551 202 /* Network setup. */
a72bd606 203 for (i = 0; i < nb_nics; i++) {
376b8519 204 if (!enable_lasi_lan()) {
0e6de551 205 pci_nic_init_nofail(&nd_table[i], pci_bus, "tulip", NULL);
376b8519 206 }
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207 }
208
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209 /* register power switch emulation */
210 qemu_register_powerdown_notifier(&hppa_system_powerdown_notifier);
211
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212 /* Load firmware. Given that this is not "real" firmware,
213 but one explicitly written for the emulation, we might as
214 well load it directly from an ELF image. */
215 firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
b57e3e97 216 machine->firmware ?: "hppa-firmware.img");
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217 if (firmware_filename == NULL) {
218 error_report("no firmware provided");
219 exit(1);
220 }
221
4366e1db 222 size = load_elf(firmware_filename, NULL, NULL, NULL,
6cdda0ff 223 &firmware_entry, &firmware_low, &firmware_high, NULL,
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224 true, EM_PARISC, 0, 0);
225
226 /* Unfortunately, load_elf sign-extends reading elf32. */
227 firmware_entry = (target_ureg)firmware_entry;
228 firmware_low = (target_ureg)firmware_low;
229 firmware_high = (target_ureg)firmware_high;
230
231 if (size < 0) {
232 error_report("could not load firmware '%s'", firmware_filename);
233 exit(1);
234 }
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235 qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
236 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
237 firmware_low, firmware_high, firmware_entry);
8262863d 238 if (firmware_low < FIRMWARE_START || firmware_high >= FIRMWARE_END) {
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239 error_report("Firmware overlaps with memory or IO space");
240 exit(1);
241 }
242 g_free(firmware_filename);
243
244 rom_region = g_new(MemoryRegion, 1);
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245 memory_region_init_ram(rom_region, NULL, "firmware",
246 (FIRMWARE_END - FIRMWARE_START), &error_fatal);
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247 memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
248
249 /* Load kernel */
250 if (kernel_filename) {
4366e1db 251 size = load_elf(kernel_filename, NULL, &cpu_hppa_to_phys,
6cdda0ff 252 NULL, &kernel_entry, &kernel_low, &kernel_high, NULL,
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253 true, EM_PARISC, 0, 0);
254
255 /* Unfortunately, load_elf sign-extends reading elf32. */
256 kernel_entry = (target_ureg) cpu_hppa_to_phys(NULL, kernel_entry);
257 kernel_low = (target_ureg)kernel_low;
258 kernel_high = (target_ureg)kernel_high;
259
260 if (size < 0) {
261 error_report("could not load kernel '%s'", kernel_filename);
262 exit(1);
263 }
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264 qemu_log_mask(CPU_LOG_PAGE, "Kernel loaded at 0x%08" PRIx64
265 "-0x%08" PRIx64 ", entry at 0x%08" PRIx64
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266 ", size %" PRIu64 " kB\n",
267 kernel_low, kernel_high, kernel_entry, size / KiB);
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268
269 if (kernel_cmdline) {
270 cpu[0]->env.gr[24] = 0x4000;
271 pstrcpy_targphys("cmdline", cpu[0]->env.gr[24],
272 TARGET_PAGE_SIZE, kernel_cmdline);
273 }
274
275 if (initrd_filename) {
276 ram_addr_t initrd_base;
f3839fda 277 int64_t initrd_size;
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278
279 initrd_size = get_image_size(initrd_filename);
280 if (initrd_size < 0) {
281 error_report("could not load initial ram disk '%s'",
282 initrd_filename);
283 exit(1);
284 }
285
286 /* Load the initrd image high in memory.
287 Mirror the algorithm used by palo:
288 (1) Due to sign-extension problems and PDC,
289 put the initrd no higher than 1G.
290 (2) Reserve 64k for stack. */
bfdf22bc 291 initrd_base = MIN(machine->ram_size, 1 * GiB);
c108cc59 292 initrd_base = initrd_base - 64 * KiB;
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293 initrd_base = (initrd_base - initrd_size) & TARGET_PAGE_MASK;
294
295 if (initrd_base < kernel_high) {
296 error_report("kernel and initial ram disk too large!");
297 exit(1);
298 }
299
300 load_image_targphys(initrd_filename, initrd_base, initrd_size);
301 cpu[0]->env.gr[23] = initrd_base;
302 cpu[0]->env.gr[22] = initrd_base + initrd_size;
303 }
304 }
305
306 if (!kernel_entry) {
307 /* When booting via firmware, tell firmware if we want interactive
308 * mode (kernel_entry=1), and to boot from CD (gr[24]='d')
309 * or hard disc * (gr[24]='c').
310 */
311 kernel_entry = boot_menu ? 1 : 0;
312 cpu[0]->env.gr[24] = machine->boot_order[0];
313 }
314
315 /* We jump to the firmware entry routine and pass the
316 * various parameters in registers. After firmware initialization,
317 * firmware will start the Linux kernel with ramdisk and cmdline.
318 */
bfdf22bc 319 cpu[0]->env.gr[26] = machine->ram_size;
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320 cpu[0]->env.gr[25] = kernel_entry;
321
322 /* tell firmware how many SMP CPUs to present in inventory table */
323 cpu[0]->env.gr[21] = smp_cpus;
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324
325 /* tell firmware fw_cfg port */
326 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
813dff13
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327}
328
a0628599 329static void hppa_machine_reset(MachineState *ms)
a72bd606 330{
33decbd2 331 unsigned int smp_cpus = ms->smp.cpus;
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332 int i;
333
334 qemu_devices_reset();
335
336 /* Start all CPUs at the firmware entry point.
337 * Monarch CPU will initialize firmware, secondary CPUs
338 * will enter a small idle look and wait for rendevouz. */
339 for (i = 0; i < smp_cpus; i++) {
340 cpu_set_pc(CPU(cpu[i]), firmware_entry);
341 cpu[i]->env.gr[5] = CPU_HPA + i * 0x1000;
342 }
343
344 /* already initialized by machine_hppa_init()? */
bfdf22bc 345 if (cpu[0]->env.gr[26] == ms->ram_size) {
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346 return;
347 }
348
bfdf22bc 349 cpu[0]->env.gr[26] = ms->ram_size;
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350 cpu[0]->env.gr[25] = 0; /* no firmware boot menu */
351 cpu[0]->env.gr[24] = 'c';
352 /* gr22/gr23 unused, no initrd while reboot. */
353 cpu[0]->env.gr[21] = smp_cpus;
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354 /* tell firmware fw_cfg port */
355 cpu[0]->env.gr[19] = FW_CFG_IO_BASE;
a72bd606
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356}
357
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358static void hppa_nmi(NMIState *n, int cpu_index, Error **errp)
359{
360 CPUState *cs;
361
362 CPU_FOREACH(cs) {
363 cpu_interrupt(cs, CPU_INTERRUPT_NMI);
364 }
365}
a72bd606 366
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367static void machine_hppa_machine_init(MachineClass *mc)
368{
369 mc->desc = "HPPA generic machine";
a72bd606 370 mc->default_cpu_type = TYPE_HPPA_CPU;
813dff13 371 mc->init = machine_hppa_init;
a72bd606 372 mc->reset = hppa_machine_reset;
813dff13 373 mc->block_default_type = IF_SCSI;
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374 mc->max_cpus = HPPA_MAX_CPUS;
375 mc->default_cpus = 1;
ea0ac7f6 376 mc->is_default = true;
d23b6caa 377 mc->default_ram_size = 512 * MiB;
813dff13 378 mc->default_boot_order = "cd";
7c59c1e0 379 mc->default_ram_id = "ram";
813dff13
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380}
381
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382static void machine_hppa_machine_init_class_init(ObjectClass *oc, void *data)
383{
384 MachineClass *mc = MACHINE_CLASS(oc);
385 machine_hppa_machine_init(mc);
386
387 NMIClass *nc = NMI_CLASS(oc);
388 nc->nmi_monitor_handler = hppa_nmi;
389}
390
391static const TypeInfo machine_hppa_machine_init_typeinfo = {
392 .name = ("hppa" "-machine"),
393 .parent = "machine",
394 .class_init = machine_hppa_machine_init_class_init,
395 .interfaces = (InterfaceInfo[]) {
396 { TYPE_NMI },
397 { }
398 },
399};
400
401static void machine_hppa_machine_init_register_types(void)
402{
403 type_register_static(&machine_hppa_machine_init_typeinfo);
404}
405
406type_init(machine_hppa_machine_init_register_types)