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267002cd 1/*
3cbee15b 2 * QEMU PowerMac CUDA device support
5fafdf24 3 *
3cbee15b
JM
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
5fafdf24 6 *
267002cd
FB
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
0b8fa32f 25
0d75590d 26#include "qemu/osdep.h"
a8d25326 27#include "qemu-common.h"
83c9f4ca 28#include "hw/ppc/mac.h"
a27bd6c7 29#include "hw/qdev-properties.h"
d6454270 30#include "migration/vmstate.h"
0d09e41a 31#include "hw/input/adb.h"
09a57347 32#include "hw/misc/mos6522.h"
7092e84d 33#include "hw/misc/macio/cuda.h"
db873cc5 34#include "qapi/error.h"
1de7afc9 35#include "qemu/timer.h"
54d31236 36#include "sysemu/runstate.h"
3d81f594 37#include "qapi/error.h"
f348b6d1 38#include "qemu/cutils.h"
03dd024f 39#include "qemu/log.h"
0b8fa32f 40#include "qemu/module.h"
4b402e09 41#include "trace.h"
ea026b2f 42
267002cd 43/* Bits in B data register: all active low */
09a57347
MCA
44#define TREQ 0x08 /* Transfer request (input) */
45#define TACK 0x10 /* Transfer acknowledge (output) */
46#define TIP 0x20 /* Transfer in progress (output) */
267002cd
FB
47
48/* commands (1st byte) */
09a57347
MCA
49#define ADB_PACKET 0
50#define CUDA_PACKET 1
51#define ERROR_PACKET 2
52#define TIMER_PACKET 3
53#define POWER_PACKET 4
54#define MACIIC_PACKET 5
55#define PMU_PACKET 6
267002cd
FB
56
57#define CUDA_TIMER_FREQ (4700000 / 6)
58
d7ce296f
FB
59/* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
60#define RTC_OFFSET 2082844800
61
5fafdf24 62static void cuda_receive_packet_from_host(CUDAState *s,
267002cd
FB
63 const uint8_t *data, int len);
64
09a57347
MCA
65/* MacOS uses timer 1 for calibration on startup, so we use
66 * the timebase frequency and cuda_get_counter_value() with
67 * cuda_get_load_time() to steer MacOS to calculate calibrate its timers
68 * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
69 * timer to expose tbfreq to guest" for more information) */
267002cd 70
09a57347 71static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
b981289c 72{
09a57347 73 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
2e3e5c7e 74 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
09a57347 75
ce19480e
MCA
76 /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
77 uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
09a57347 78 cs->tb_frequency, NANOSECONDS_PER_SECOND) -
ce19480e
MCA
79 ti->load_time;
80
09a57347 81 return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
ce19480e
MCA
82}
83
09a57347 84static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
ce19480e 85{
09a57347 86 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
2e3e5c7e 87 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
09a57347 88
ce19480e 89 uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
09a57347 90 cs->tb_frequency, NANOSECONDS_PER_SECOND);
ce19480e 91 return load_time;
b981289c
AG
92}
93
cffc331a
MCA
94static void cuda_set_sr_int(void *opaque)
95{
96 CUDAState *s = opaque;
2e3e5c7e 97 MOS6522CUDAState *mcs = &s->mos6522_cuda;
09a57347
MCA
98 MOS6522State *ms = MOS6522(mcs);
99 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
cffc331a 100
09a57347 101 mdc->set_sr_int(ms);
cffc331a
MCA
102}
103
104static void cuda_delay_set_sr_int(CUDAState *s)
105{
106 int64_t expire;
107
4b402e09 108 trace_cuda_delay_set_sr_int();
cffc331a 109
09a57347 110 expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
cffc331a
MCA
111 timer_mod(s->sr_delay_timer, expire);
112}
113
267002cd
FB
114/* NOTE: TIP and TREQ are negated */
115static void cuda_update(CUDAState *s)
116{
2e3e5c7e 117 MOS6522CUDAState *mcs = &s->mos6522_cuda;
09a57347 118 MOS6522State *ms = MOS6522(mcs);
45c9d721 119 ADBBusState *adb_bus = &s->adb_bus;
819e712b
FB
120 int packet_received, len;
121
122 packet_received = 0;
09a57347 123 if (!(ms->b & TIP)) {
819e712b 124 /* transfer requested from host */
267002cd 125
09a57347 126 if (ms->acr & SR_OUT) {
819e712b 127 /* data output */
09a57347 128 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
819e712b 129 if (s->data_out_index < sizeof(s->data_out)) {
45c9d721
MCA
130 if (s->data_out_index == 0) {
131 adb_autopoll_block(adb_bus);
132 }
4b402e09 133 trace_cuda_data_send(ms->sr);
09a57347 134 s->data_out[s->data_out_index++] = ms->sr;
cffc331a 135 cuda_delay_set_sr_int(s);
819e712b
FB
136 }
137 }
138 } else {
139 if (s->data_in_index < s->data_in_size) {
140 /* data input */
09a57347
MCA
141 if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
142 ms->sr = s->data_in[s->data_in_index++];
4b402e09 143 trace_cuda_data_recv(ms->sr);
819e712b
FB
144 /* indicate end of transfer */
145 if (s->data_in_index >= s->data_in_size) {
09a57347 146 ms->b = (ms->b | TREQ);
45c9d721 147 adb_autopoll_unblock(adb_bus);
819e712b 148 }
cffc331a 149 cuda_delay_set_sr_int(s);
819e712b 150 }
267002cd 151 }
819e712b
FB
152 }
153 } else {
154 /* no transfer requested: handle sync case */
09a57347 155 if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
819e712b 156 /* update TREQ state each time TACK change state */
09a57347
MCA
157 if (ms->b & TACK) {
158 ms->b = (ms->b | TREQ);
159 } else {
160 ms->b = (ms->b & ~TREQ);
161 }
cffc331a 162 cuda_delay_set_sr_int(s);
819e712b
FB
163 } else {
164 if (!(s->last_b & TIP)) {
e91c8a77 165 /* handle end of host to cuda transfer */
819e712b 166 packet_received = (s->data_out_index > 0);
e91c8a77 167 /* always an IRQ at the end of transfer */
cffc331a 168 cuda_delay_set_sr_int(s);
819e712b
FB
169 }
170 /* signal if there is data to read */
171 if (s->data_in_index < s->data_in_size) {
09a57347 172 ms->b = (ms->b & ~TREQ);
819e712b 173 }
267002cd
FB
174 }
175 }
176
09a57347
MCA
177 s->last_acr = ms->acr;
178 s->last_b = ms->b;
819e712b
FB
179
180 /* NOTE: cuda_receive_packet_from_host() can call cuda_update()
181 recursively */
182 if (packet_received) {
183 len = s->data_out_index;
184 s->data_out_index = 0;
185 cuda_receive_packet_from_host(s, s->data_out, len);
186 }
267002cd
FB
187}
188
5fafdf24 189static void cuda_send_packet_to_host(CUDAState *s,
267002cd
FB
190 const uint8_t *data, int len)
191{
4b402e09
MCA
192 int i;
193
194 trace_cuda_packet_send(len);
195 for (i = 0; i < len; i++) {
196 trace_cuda_packet_send_data(i, data[i]);
819e712b 197 }
4b402e09 198
267002cd
FB
199 memcpy(s->data_in, data, len);
200 s->data_in_size = len;
201 s->data_in_index = 0;
202 cuda_update(s);
cffc331a 203 cuda_delay_set_sr_int(s);
267002cd
FB
204}
205
7db4eea6 206static void cuda_adb_poll(void *opaque)
e2733d20
FB
207{
208 CUDAState *s = opaque;
b12a0b16 209 ADBBusState *adb_bus = &s->adb_bus;
e2733d20
FB
210 uint8_t obuf[ADB_MAX_OUT_LEN + 2];
211 int olen;
212
b12a0b16 213 olen = adb_poll(adb_bus, obuf + 2, adb_bus->autopoll_mask);
e2733d20
FB
214 if (olen > 0) {
215 obuf[0] = ADB_PACKET;
216 obuf[1] = 0x40; /* polled data */
217 cuda_send_packet_to_host(s, obuf, olen + 2);
218 }
e2733d20
FB
219}
220
d20efaeb
HP
221/* description of commands */
222typedef struct CudaCommand {
223 uint8_t command;
224 const char *name;
225 bool (*handler)(CUDAState *s,
226 const uint8_t *in_args, int in_len,
227 uint8_t *out_args, int *out_len);
228} CudaCommand;
229
1cdab104
HP
230static bool cuda_cmd_autopoll(CUDAState *s,
231 const uint8_t *in_data, int in_len,
232 uint8_t *out_data, int *out_len)
233{
b12a0b16
MCA
234 ADBBusState *adb_bus = &s->adb_bus;
235 bool autopoll;
1cdab104
HP
236
237 if (in_len != 1) {
238 return false;
239 }
240
b12a0b16
MCA
241 autopoll = (in_data[0] != 0) ? true : false;
242
243 adb_set_autopoll_enabled(adb_bus, autopoll);
1cdab104
HP
244 return true;
245}
246
374312e7
HP
247static bool cuda_cmd_set_autorate(CUDAState *s,
248 const uint8_t *in_data, int in_len,
249 uint8_t *out_data, int *out_len)
250{
b12a0b16
MCA
251 ADBBusState *adb_bus = &s->adb_bus;
252
374312e7
HP
253 if (in_len != 1) {
254 return false;
255 }
256
257 /* we don't want a period of 0 ms */
258 /* FIXME: check what real hardware does */
259 if (in_data[0] == 0) {
260 return false;
261 }
262
b12a0b16 263 adb_set_autopoll_rate_ms(adb_bus, in_data[0]);
374312e7
HP
264 return true;
265}
266
216c906e
HP
267static bool cuda_cmd_set_device_list(CUDAState *s,
268 const uint8_t *in_data, int in_len,
269 uint8_t *out_data, int *out_len)
270{
b12a0b16
MCA
271 ADBBusState *adb_bus = &s->adb_bus;
272 uint16_t mask;
273
216c906e
HP
274 if (in_len != 2) {
275 return false;
276 }
277
b12a0b16
MCA
278 mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
279
280 adb_set_autopoll_mask(adb_bus, mask);
216c906e
HP
281 return true;
282}
283
017da0b5
HP
284static bool cuda_cmd_powerdown(CUDAState *s,
285 const uint8_t *in_data, int in_len,
286 uint8_t *out_data, int *out_len)
287{
288 if (in_len != 0) {
289 return false;
290 }
291
cf83f140 292 qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
017da0b5
HP
293 return true;
294}
295
54e89444
HP
296static bool cuda_cmd_reset_system(CUDAState *s,
297 const uint8_t *in_data, int in_len,
298 uint8_t *out_data, int *out_len)
299{
300 if (in_len != 0) {
301 return false;
302 }
303
cf83f140 304 qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
54e89444
HP
305 return true;
306}
307
f5b94112
HP
308static bool cuda_cmd_set_file_server_flag(CUDAState *s,
309 const uint8_t *in_data, int in_len,
310 uint8_t *out_data, int *out_len)
311{
312 if (in_len != 1) {
313 return false;
314 }
315
316 qemu_log_mask(LOG_UNIMP,
317 "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
318 in_data[0]);
319 return true;
320}
321
15b7b09b
HP
322static bool cuda_cmd_set_power_message(CUDAState *s,
323 const uint8_t *in_data, int in_len,
324 uint8_t *out_data, int *out_len)
325{
326 if (in_len != 1) {
327 return false;
328 }
329
330 qemu_log_mask(LOG_UNIMP,
331 "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
332 in_data[0]);
333 return true;
334}
335
547a4d19
HP
336static bool cuda_cmd_get_time(CUDAState *s,
337 const uint8_t *in_data, int in_len,
338 uint8_t *out_data, int *out_len)
339{
340 uint32_t ti;
341
342 if (in_len != 0) {
343 return false;
344 }
345
346 ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
73bcb24d 347 / NANOSECONDS_PER_SECOND);
547a4d19
HP
348 out_data[0] = ti >> 24;
349 out_data[1] = ti >> 16;
350 out_data[2] = ti >> 8;
351 out_data[3] = ti;
352 *out_len = 4;
353 return true;
354}
355
e6473178
HP
356static bool cuda_cmd_set_time(CUDAState *s,
357 const uint8_t *in_data, int in_len,
358 uint8_t *out_data, int *out_len)
359{
360 uint32_t ti;
361
362 if (in_len != 4) {
363 return false;
364 }
365
ed3d807b
AJ
366 ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
367 + (((uint32_t)in_data[2]) << 8) + in_data[3];
e6473178 368 s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
73bcb24d 369 / NANOSECONDS_PER_SECOND);
e6473178
HP
370 return true;
371}
372
d20efaeb 373static const CudaCommand handlers[] = {
1cdab104 374 { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
374312e7 375 { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate },
216c906e 376 { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
017da0b5 377 { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
54e89444 378 { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
f5b94112
HP
379 { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
380 cuda_cmd_set_file_server_flag },
15b7b09b
HP
381 { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
382 cuda_cmd_set_power_message },
547a4d19 383 { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
e6473178 384 { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
d20efaeb
HP
385};
386
5fafdf24 387static void cuda_receive_packet(CUDAState *s,
267002cd
FB
388 const uint8_t *data, int len)
389{
4202e63c 390 uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
d20efaeb 391 int i, out_len = 0;
267002cd 392
d20efaeb
HP
393 for (i = 0; i < ARRAY_SIZE(handlers); i++) {
394 const CudaCommand *desc = &handlers[i];
395 if (desc->command == data[0]) {
4b402e09 396 trace_cuda_receive_packet_cmd(desc->name);
d20efaeb
HP
397 out_len = 0;
398 if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
399 cuda_send_packet_to_host(s, obuf, 3 + out_len);
400 } else {
401 qemu_log_mask(LOG_GUEST_ERROR,
402 "CUDA: %s: wrong parameters %d\n",
403 desc->name, len);
404 obuf[0] = ERROR_PACKET;
405 obuf[1] = 0x5; /* bad parameters */
406 obuf[2] = CUDA_PACKET;
407 obuf[3] = data[0];
408 cuda_send_packet_to_host(s, obuf, 4);
409 }
410 return;
411 }
412 }
413
0e8176e8
HP
414 qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
415 obuf[0] = ERROR_PACKET;
416 obuf[1] = 0x2; /* unknown command */
417 obuf[2] = CUDA_PACKET;
418 obuf[3] = data[0];
419 cuda_send_packet_to_host(s, obuf, 4);
267002cd
FB
420}
421
5fafdf24 422static void cuda_receive_packet_from_host(CUDAState *s,
267002cd
FB
423 const uint8_t *data, int len)
424{
4b402e09
MCA
425 int i;
426
427 trace_cuda_packet_receive(len);
428 for (i = 0; i < len; i++) {
429 trace_cuda_packet_receive_data(i, data[i]);
819e712b 430 }
4b402e09 431
267002cd
FB
432 switch(data[0]) {
433 case ADB_PACKET:
e2733d20 434 {
6729aa40 435 uint8_t obuf[ADB_MAX_OUT_LEN + 3];
e2733d20 436 int olen;
293c867d 437 olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
38f0b147 438 if (olen > 0) {
e2733d20
FB
439 obuf[0] = ADB_PACKET;
440 obuf[1] = 0x00;
6729aa40 441 cuda_send_packet_to_host(s, obuf, olen + 2);
e2733d20 442 } else {
38f0b147 443 /* error */
e2733d20 444 obuf[0] = ADB_PACKET;
38f0b147 445 obuf[1] = -olen;
6729aa40 446 obuf[2] = data[1];
38f0b147 447 olen = 0;
6729aa40 448 cuda_send_packet_to_host(s, obuf, olen + 3);
e2733d20 449 }
e2733d20 450 }
267002cd
FB
451 break;
452 case CUDA_PACKET:
453 cuda_receive_packet(s, data + 1, len - 1);
454 break;
455 }
456}
457
09a57347
MCA
458static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
459{
460 CUDAState *s = opaque;
2e3e5c7e 461 MOS6522CUDAState *mcs = &s->mos6522_cuda;
09a57347 462 MOS6522State *ms = MOS6522(mcs);
267002cd 463
09a57347
MCA
464 addr = (addr >> 9) & 0xf;
465 return mos6522_read(ms, addr, size);
466}
467
468static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
469 unsigned size)
9b64997f 470{
09a57347 471 CUDAState *s = opaque;
2e3e5c7e 472 MOS6522CUDAState *mcs = &s->mos6522_cuda;
09a57347 473 MOS6522State *ms = MOS6522(mcs);
9b64997f 474
09a57347
MCA
475 addr = (addr >> 9) & 0xf;
476 mos6522_write(ms, addr, val, size);
9b64997f
BS
477}
478
09a57347
MCA
479static const MemoryRegionOps mos6522_cuda_ops = {
480 .read = mos6522_cuda_read,
481 .write = mos6522_cuda_write,
482 .endianness = DEVICE_BIG_ENDIAN,
483 .valid = {
484 .min_access_size = 1,
485 .max_access_size = 1,
486 },
c0a93a9e 487};
9b64997f 488
c0a93a9e
JQ
489static const VMStateDescription vmstate_cuda = {
490 .name = "cuda",
b12a0b16
MCA
491 .version_id = 6,
492 .minimum_version_id = 6,
35d08458 493 .fields = (VMStateField[]) {
2e3e5c7e
MCA
494 VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
495 MOS6522State),
ff57eae5 496 VMSTATE_UINT8(last_b, CUDAState),
ff57eae5 497 VMSTATE_UINT8(last_acr, CUDAState),
c0a93a9e
JQ
498 VMSTATE_INT32(data_in_size, CUDAState),
499 VMSTATE_INT32(data_in_index, CUDAState),
500 VMSTATE_INT32(data_out_index, CUDAState),
c0a93a9e
JQ
501 VMSTATE_BUFFER(data_in, CUDAState),
502 VMSTATE_BUFFER(data_out, CUDAState),
503 VMSTATE_UINT32(tick_offset, CUDAState),
ff57eae5 504 VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
c0a93a9e
JQ
505 VMSTATE_END_OF_LIST()
506 }
507};
9b64997f 508
45fa67fb 509static void cuda_reset(DeviceState *dev)
6e6b7363 510{
45fa67fb 511 CUDAState *s = CUDA(dev);
b12a0b16 512 ADBBusState *adb_bus = &s->adb_bus;
6e6b7363 513
6e6b7363
BS
514 s->data_in_size = 0;
515 s->data_in_index = 0;
516 s->data_out_index = 0;
b12a0b16
MCA
517
518 adb_set_autopoll_enabled(adb_bus, false);
6e6b7363
BS
519}
520
09a57347 521static void cuda_realize(DeviceState *dev, Error **errp)
267002cd 522{
45fa67fb 523 CUDAState *s = CUDA(dev);
3d81f594 524 Error *err = NULL;
09a57347 525 SysBusDevice *sbd;
b12a0b16 526 ADBBusState *adb_bus = &s->adb_bus;
5703c174 527 struct tm tm;
819e712b 528
118bfd76 529 if (!sysbus_realize(SYS_BUS_DEVICE(&s->mos6522_cuda), &err)) {
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530 error_propagate(errp, err);
531 return;
532 }
533
09a57347 534 /* Pass IRQ from 6522 */
09a57347 535 sbd = SYS_BUS_DEVICE(s);
3d81f594 536 sysbus_pass_irq(sbd, SYS_BUS_DEVICE(&s->mos6522_cuda));
61271e5c 537
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538 qemu_get_timedate(&tm, 0);
539 s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
5703c174 540
09a57347 541 s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
d6c666ad 542 s->sr_delay_ns = 20 * SCALE_US;
09a57347 543
b12a0b16 544 adb_register_autopoll_callback(adb_bus, cuda_adb_poll, s);
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545}
546
09a57347 547static void cuda_init(Object *obj)
45fa67fb 548{
45fa67fb 549 CUDAState *s = CUDA(obj);
09a57347 550 SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
45fa67fb 551
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552 object_initialize_child(obj, "mos6522-cuda", &s->mos6522_cuda,
553 TYPE_MOS6522_CUDA);
2e3e5c7e 554
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555 memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
556 sysbus_init_mmio(sbd, &s->mem);
84ede329 557
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558 qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
559 DEVICE(obj), "adb.0");
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560}
561
b981289c 562static Property cuda_properties[] = {
27c5cee1 563 DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
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564 DEFINE_PROP_END_OF_LIST()
565};
566
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567static void cuda_class_init(ObjectClass *oc, void *data)
568{
569 DeviceClass *dc = DEVICE_CLASS(oc);
ea0a7eb4 570
09a57347 571 dc->realize = cuda_realize;
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572 dc->reset = cuda_reset;
573 dc->vmsd = &vmstate_cuda;
4f67d30b 574 device_class_set_props(dc, cuda_properties);
599d7326 575 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
267002cd 576}
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577
578static const TypeInfo cuda_type_info = {
579 .name = TYPE_CUDA,
580 .parent = TYPE_SYS_BUS_DEVICE,
581 .instance_size = sizeof(CUDAState),
09a57347 582 .instance_init = cuda_init,
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583 .class_init = cuda_class_init,
584};
585
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586static void mos6522_cuda_portB_write(MOS6522State *s)
587{
588 MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
2e3e5c7e 589 CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
09a57347 590
2e3e5c7e 591 cuda_update(cs);
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592}
593
d638fd5c 594static void mos6522_cuda_reset(DeviceState *dev)
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595{
596 MOS6522State *ms = MOS6522(dev);
597 MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
598
d638fd5c 599 mdc->parent_reset(dev);
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600
601 ms->timers[0].frequency = CUDA_TIMER_FREQ;
602 ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
603}
604
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605static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
606{
607 DeviceClass *dc = DEVICE_CLASS(oc);
608 MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
609
d638fd5c 610 dc->reset = mos6522_cuda_reset;
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611 mdc->portB_write = mos6522_cuda_portB_write;
612 mdc->get_timer1_counter_value = cuda_get_counter_value;
613 mdc->get_timer2_counter_value = cuda_get_counter_value;
614 mdc->get_timer1_load_time = cuda_get_load_time;
615 mdc->get_timer2_load_time = cuda_get_load_time;
616}
617
618static const TypeInfo mos6522_cuda_type_info = {
619 .name = TYPE_MOS6522_CUDA,
620 .parent = TYPE_MOS6522,
621 .instance_size = sizeof(MOS6522CUDAState),
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622 .class_init = mos6522_cuda_class_init,
623};
624
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625static void cuda_register_types(void)
626{
09a57347 627 type_register_static(&mos6522_cuda_type_info);
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628 type_register_static(&cuda_type_info);
629}
630
631type_init(cuda_register_types)