[mirror_qemu.git] / hw / pckbd.c

/*
 * QEMU PC keyboard emulation
 *
 * Copyright (c) 2003 Fabrice Bellard
 *
 * Permission is hereby granted, free of charge, to any person obtaining a copy
 * of this software and associated documentation files (the "Software"), to deal
 * in the Software without restriction, including without limitation the rights
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
 * copies of the Software, and to permit persons to whom the Software is
 * furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
 * THE SOFTWARE.
 */
#include "vl.h"

/* debug PC keyboard */
//#define DEBUG_KBD

/* debug PC keyboard : only mouse */
//#define DEBUG_MOUSE

/*	Keyboard Controller Commands */
#define KBD_CCMD_READ_MODE	0x20	/* Read mode bits */
#define KBD_CCMD_WRITE_MODE	0x60	/* Write mode bits */
#define KBD_CCMD_GET_VERSION	0xA1	/* Get controller version */
#define KBD_CCMD_MOUSE_DISABLE	0xA7	/* Disable mouse interface */
#define KBD_CCMD_MOUSE_ENABLE	0xA8	/* Enable mouse interface */
#define KBD_CCMD_TEST_MOUSE	0xA9	/* Mouse interface test */
#define KBD_CCMD_SELF_TEST	0xAA	/* Controller self test */
#define KBD_CCMD_KBD_TEST	0xAB	/* Keyboard interface test */
#define KBD_CCMD_KBD_DISABLE	0xAD	/* Keyboard interface disable */
#define KBD_CCMD_KBD_ENABLE	0xAE	/* Keyboard interface enable */
#define KBD_CCMD_READ_INPORT    0xC0    /* read input port */
#define KBD_CCMD_READ_OUTPORT	0xD0    /* read output port */
#define KBD_CCMD_WRITE_OUTPORT	0xD1    /* write output port */
#define KBD_CCMD_WRITE_OBUF	0xD2
#define KBD_CCMD_WRITE_AUX_OBUF	0xD3    /* Write to output buffer as if
					   initiated by the auxiliary device */
#define KBD_CCMD_WRITE_MOUSE	0xD4	/* Write the following byte to the mouse */
#define KBD_CCMD_DISABLE_A20    0xDD    /* HP vectra only ? */
#define KBD_CCMD_ENABLE_A20     0xDF    /* HP vectra only ? */
#define KBD_CCMD_RESET	        0xFE

/* Keyboard Commands */
#define KBD_CMD_SET_LEDS	0xED	/* Set keyboard leds */
#define KBD_CMD_ECHO     	0xEE
#define KBD_CMD_GET_ID 	        0xF2	/* get keyboard ID */
#define KBD_CMD_SET_RATE	0xF3	/* Set typematic rate */
#define KBD_CMD_ENABLE		0xF4	/* Enable scanning */
#define KBD_CMD_RESET_DISABLE	0xF5	/* reset and disable scanning */
#define KBD_CMD_RESET_ENABLE   	0xF6    /* reset and enable scanning */
#define KBD_CMD_RESET		0xFF	/* Reset */

/* Keyboard Replies */
#define KBD_REPLY_POR		0xAA	/* Power on reset */
#define KBD_REPLY_ACK		0xFA	/* Command ACK */
#define KBD_REPLY_RESEND	0xFE	/* Command NACK, send the cmd again */

/* Status Register Bits */
#define KBD_STAT_OBF 		0x01	/* Keyboard output buffer full */
#define KBD_STAT_IBF 		0x02	/* Keyboard input buffer full */
#define KBD_STAT_SELFTEST	0x04	/* Self test successful */
#define KBD_STAT_CMD		0x08	/* Last write was a command write (0=data) */
#define KBD_STAT_UNLOCKED	0x10	/* Zero if keyboard locked */
#define KBD_STAT_MOUSE_OBF	0x20	/* Mouse output buffer full */
#define KBD_STAT_GTO 		0x40	/* General receive/xmit timeout */
#define KBD_STAT_PERR 		0x80	/* Parity error */

/* Controller Mode Register Bits */
#define KBD_MODE_KBD_INT	0x01	/* Keyboard data generate IRQ1 */
#define KBD_MODE_MOUSE_INT	0x02	/* Mouse data generate IRQ12 */
#define KBD_MODE_SYS 		0x04	/* The system flag (?) */
#define KBD_MODE_NO_KEYLOCK	0x08	/* The keylock doesn't affect the keyboard if set */
#define KBD_MODE_DISABLE_KBD	0x10	/* Disable keyboard interface */
#define KBD_MODE_DISABLE_MOUSE	0x20	/* Disable mouse interface */
#define KBD_MODE_KCC 		0x40	/* Scan code conversion to PC format */
#define KBD_MODE_RFU		0x80

/* Mouse Commands */
#define AUX_SET_SCALE11		0xE6	/* Set 1:1 scaling */
#define AUX_SET_SCALE21		0xE7	/* Set 2:1 scaling */
#define AUX_SET_RES		0xE8	/* Set resolution */
#define AUX_GET_SCALE		0xE9	/* Get scaling factor */
#define AUX_SET_STREAM		0xEA	/* Set stream mode */
#define AUX_POLL		0xEB	/* Poll */
#define AUX_RESET_WRAP		0xEC	/* Reset wrap mode */
#define AUX_SET_WRAP		0xEE	/* Set wrap mode */
#define AUX_SET_REMOTE		0xF0	/* Set remote mode */
#define AUX_GET_TYPE		0xF2	/* Get type */
#define AUX_SET_SAMPLE		0xF3	/* Set sample rate */
#define AUX_ENABLE_DEV		0xF4	/* Enable aux device */
#define AUX_DISABLE_DEV		0xF5	/* Disable aux device */
#define AUX_SET_DEFAULT		0xF6
#define AUX_RESET		0xFF	/* Reset aux device */
#define AUX_ACK			0xFA	/* Command byte ACK. */

#define MOUSE_STATUS_REMOTE     0x40
#define MOUSE_STATUS_ENABLED    0x20
#define MOUSE_STATUS_SCALE21    0x10

#define KBD_QUEUE_SIZE 256

#define KBD_PENDING_KBD         1
#define KBD_PENDING_AUX         2

typedef struct KBDState {
    uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
    uint8_t status;
    uint8_t mode;
    /* Bitmask of devices with data available.  */
    uint8_t pending;
    void *kbd;
    void *mouse;

    qemu_irq irq_kbd;
    qemu_irq irq_mouse;
    target_phys_addr_t base;
    int it_shift;
} KBDState;

KBDState kbd_state;

/* update irq and KBD_STAT_[MOUSE_]OBF */
/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
   incorrect, but it avoids having to simulate exact delays */
static void kbd_update_irq(KBDState *s)
{
    int irq_kbd_level, irq_mouse_level;

    irq_kbd_level = 0;
    irq_mouse_level = 0;
    s->status &= ~(KBD_STAT_OBF | KBD_STAT_MOUSE_OBF);
    if (s->pending) {
        s->status |= KBD_STAT_OBF;
        /* kbd data takes priority over aux data.  */
        if (s->pending == KBD_PENDING_AUX) {
            s->status |= KBD_STAT_MOUSE_OBF;
            if (s->mode & KBD_MODE_MOUSE_INT)
                irq_mouse_level = 1;
        } else {
            if ((s->mode & KBD_MODE_KBD_INT) &&
                !(s->mode & KBD_MODE_DISABLE_KBD))
                irq_kbd_level = 1;
        }
    }
    qemu_set_irq(s->irq_kbd, irq_kbd_level);
    qemu_set_irq(s->irq_mouse, irq_mouse_level);
}

static void kbd_update_kbd_irq(void *opaque, int level)
{
    KBDState *s = (KBDState *)opaque;

    if (level)
        s->pending |= KBD_PENDING_KBD;
    else
        s->pending &= ~KBD_PENDING_KBD;
    kbd_update_irq(s);
}

static void kbd_update_aux_irq(void *opaque, int level)
{
    KBDState *s = (KBDState *)opaque;

    if (level)
        s->pending |= KBD_PENDING_AUX;
    else
        s->pending &= ~KBD_PENDING_AUX;
    kbd_update_irq(s);
}

static uint32_t kbd_read_status(void *opaque, uint32_t addr)
{
    KBDState *s = opaque;
    int val;
    val = s->status;
#if defined(DEBUG_KBD)
    printf("kbd: read status=0x%02x\n", val);
#endif
    return val;
}

static void kbd_queue(KBDState *s, int b, int aux)
{
    if (aux)
        ps2_queue(s->mouse, b);
    else
        ps2_queue(s->kbd, b);
}

static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
{
    KBDState *s = opaque;

#ifdef DEBUG_KBD
    printf("kbd: write cmd=0x%02x\n", val);
#endif
    switch(val) {
    case KBD_CCMD_READ_MODE:
        kbd_queue(s, s->mode, 0);
        break;
    case KBD_CCMD_WRITE_MODE:
    case KBD_CCMD_WRITE_OBUF:
    case KBD_CCMD_WRITE_AUX_OBUF:
    case KBD_CCMD_WRITE_MOUSE:
    case KBD_CCMD_WRITE_OUTPORT:
        s->write_cmd = val;
        break;
    case KBD_CCMD_MOUSE_DISABLE:
        s->mode |= KBD_MODE_DISABLE_MOUSE;
        break;
    case KBD_CCMD_MOUSE_ENABLE:
        s->mode &= ~KBD_MODE_DISABLE_MOUSE;
        break;
    case KBD_CCMD_TEST_MOUSE:
        kbd_queue(s, 0x00, 0);
        break;
    case KBD_CCMD_SELF_TEST:
        s->status |= KBD_STAT_SELFTEST;
        kbd_queue(s, 0x55, 0);
        break;
    case KBD_CCMD_KBD_TEST:
        kbd_queue(s, 0x00, 0);
        break;
    case KBD_CCMD_KBD_DISABLE:
        s->mode |= KBD_MODE_DISABLE_KBD;
        kbd_update_irq(s);
        break;
    case KBD_CCMD_KBD_ENABLE:
        s->mode &= ~KBD_MODE_DISABLE_KBD;
        kbd_update_irq(s);
        break;
    case KBD_CCMD_READ_INPORT:
        kbd_queue(s, 0x00, 0);
        break;
    case KBD_CCMD_READ_OUTPORT:
        /* XXX: check that */
#ifdef TARGET_I386
        val = 0x01 | (ioport_get_a20() << 1);
#else
        val = 0x01;
#endif
        if (s->status & KBD_STAT_OBF)
            val |= 0x10;
        if (s->status & KBD_STAT_MOUSE_OBF)
            val |= 0x20;
        kbd_queue(s, val, 0);
        break;
#ifdef TARGET_I386
    case KBD_CCMD_ENABLE_A20:
        ioport_set_a20(1);
        break;
    case KBD_CCMD_DISABLE_A20:
        ioport_set_a20(0);
        break;
#endif
    case KBD_CCMD_RESET:
        qemu_system_reset_request();
        break;
    case 0xff:
        /* ignore that - I don't know what is its use */
        break;
    default:
        fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
        break;
    }
}

static uint32_t kbd_read_data(void *opaque, uint32_t addr)
{
    KBDState *s = opaque;

    if (s->pending == KBD_PENDING_AUX)
        return ps2_read_data(s->mouse);

    return ps2_read_data(s->kbd);
}

void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
{
    KBDState *s = opaque;

#ifdef DEBUG_KBD
    printf("kbd: write data=0x%02x\n", val);
#endif

    switch(s->write_cmd) {
    case 0:
        ps2_write_keyboard(s->kbd, val);
        break;
    case KBD_CCMD_WRITE_MODE:
        s->mode = val;
        ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
        /* ??? */
        kbd_update_irq(s);
        break;
    case KBD_CCMD_WRITE_OBUF:
        kbd_queue(s, val, 0);
        break;
    case KBD_CCMD_WRITE_AUX_OBUF:
        kbd_queue(s, val, 1);
        break;
    case KBD_CCMD_WRITE_OUTPORT:
#ifdef TARGET_I386
        ioport_set_a20((val >> 1) & 1);
#endif
        if (!(val & 1)) {
            qemu_system_reset_request();
        }
        break;
    case KBD_CCMD_WRITE_MOUSE:
        ps2_write_mouse(s->mouse, val);
        break;
    default:
        break;
    }
    s->write_cmd = 0;
}

static void kbd_reset(void *opaque)
{
    KBDState *s = opaque;

    s->mode = KBD_MODE_KBD_INT | KBD_MODE_MOUSE_INT;
    s->status = KBD_STAT_CMD | KBD_STAT_UNLOCKED;
}

static void kbd_save(QEMUFile* f, void* opaque)
{
    KBDState *s = (KBDState*)opaque;

    qemu_put_8s(f, &s->write_cmd);
    qemu_put_8s(f, &s->status);
    qemu_put_8s(f, &s->mode);
    qemu_put_8s(f, &s->pending);
}

static int kbd_load(QEMUFile* f, void* opaque, int version_id)
{
    KBDState *s = (KBDState*)opaque;

    if (version_id != 3)
        return -EINVAL;
    qemu_get_8s(f, &s->write_cmd);
    qemu_get_8s(f, &s->status);
    qemu_get_8s(f, &s->mode);
    qemu_get_8s(f, &s->pending);
    return 0;
}

void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
{
    KBDState *s = &kbd_state;

    s->irq_kbd = kbd_irq;
    s->irq_mouse = mouse_irq;

    kbd_reset(s);
    register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
    register_ioport_read(io_base, 1, 1, kbd_read_data, s);
    register_ioport_write(io_base, 1, 1, kbd_write_data, s);
    register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s);
    register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s);

    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
#ifdef TARGET_I386
    vmmouse_init(s->mouse);
#endif
    qemu_register_reset(kbd_reset, s);
}

/* Memory mapped interface */
uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
{
    KBDState *s = opaque;

    switch ((addr - s->base) >> s->it_shift) {
    case 0:
        return kbd_read_data(s, 0) & 0xff;
    case 1:
        return kbd_read_status(s, 0) & 0xff;
    default:
        return 0xff;
    }
}

void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
{
    KBDState *s = opaque;

    switch ((addr - s->base) >> s->it_shift) {
    case 0:
        kbd_write_data(s, 0, value & 0xff);
        break;
    case 1:
        kbd_write_command(s, 0, value & 0xff);
        break;
    }
}

static CPUReadMemoryFunc *kbd_mm_read[] = {
    &kbd_mm_readb,
    &kbd_mm_readb,
    &kbd_mm_readb,
};

static CPUWriteMemoryFunc *kbd_mm_write[] = {
    &kbd_mm_writeb,
    &kbd_mm_writeb,
    &kbd_mm_writeb,
};

void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
                   target_phys_addr_t base, int it_shift)
{
    KBDState *s = &kbd_state;
    int s_io_memory;

    s->irq_kbd = kbd_irq;
    s->irq_mouse = mouse_irq;
    s->base = base;
    s->it_shift = it_shift;

    kbd_reset(s);
    register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
    s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
    cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);

    s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
    s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
#ifdef TARGET_I386
    vmmouse_init(s->mouse);
#endif
    qemu_register_reset(kbd_reset, s);
}
Commit	Line	Data
80cabfad FB	1	/*
80cabfad FB	2	* QEMU PC keyboard emulation
5fafdf24	3	*
80cabfad	4	* Copyright (c) 2003 Fabrice Bellard
5fafdf24	5	*
80cabfad FB	6	* Permission is hereby granted, free of charge, to any person obtaining a copy
	7	* of this software and associated documentation files (the "Software"), to deal
	8	* in the Software without restriction, including without limitation the rights
	9	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
	10	* copies of the Software, and to permit persons to whom the Software is
	11	* furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice shall be included in
	14	* all copies or substantial portions of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
	21	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
	22	* THE SOFTWARE.
	23	*/
80cabfad FB	24	#include "vl.h"
	25
	26	/* debug PC keyboard */
	27	//#define DEBUG_KBD
	28
	29	/* debug PC keyboard : only mouse */
	30	//#define DEBUG_MOUSE
	31
	32	/* Keyboard Controller Commands */
	33	#define KBD_CCMD_READ_MODE 0x20 /* Read mode bits */
	34	#define KBD_CCMD_WRITE_MODE 0x60 /* Write mode bits */
	35	#define KBD_CCMD_GET_VERSION 0xA1 /* Get controller version */
	36	#define KBD_CCMD_MOUSE_DISABLE 0xA7 /* Disable mouse interface */
	37	#define KBD_CCMD_MOUSE_ENABLE 0xA8 /* Enable mouse interface */
	38	#define KBD_CCMD_TEST_MOUSE 0xA9 /* Mouse interface test */
	39	#define KBD_CCMD_SELF_TEST 0xAA /* Controller self test */
	40	#define KBD_CCMD_KBD_TEST 0xAB /* Keyboard interface test */
	41	#define KBD_CCMD_KBD_DISABLE 0xAD /* Keyboard interface disable */
	42	#define KBD_CCMD_KBD_ENABLE 0xAE /* Keyboard interface enable */
	43	#define KBD_CCMD_READ_INPORT 0xC0 /* read input port */
	44	#define KBD_CCMD_READ_OUTPORT 0xD0 /* read output port */
	45	#define KBD_CCMD_WRITE_OUTPORT 0xD1 /* write output port */
	46	#define KBD_CCMD_WRITE_OBUF 0xD2
	47	#define KBD_CCMD_WRITE_AUX_OBUF 0xD3 /* Write to output buffer as if
	48	initiated by the auxiliary device */
	49	#define KBD_CCMD_WRITE_MOUSE 0xD4 /* Write the following byte to the mouse */
	50	#define KBD_CCMD_DISABLE_A20 0xDD /* HP vectra only ? */
	51	#define KBD_CCMD_ENABLE_A20 0xDF /* HP vectra only ? */
	52	#define KBD_CCMD_RESET 0xFE
	53
	54	/* Keyboard Commands */
	55	#define KBD_CMD_SET_LEDS 0xED /* Set keyboard leds */
	56	#define KBD_CMD_ECHO 0xEE
	57	#define KBD_CMD_GET_ID 0xF2 /* get keyboard ID */
	58	#define KBD_CMD_SET_RATE 0xF3 /* Set typematic rate */
	59	#define KBD_CMD_ENABLE 0xF4 /* Enable scanning */
	60	#define KBD_CMD_RESET_DISABLE 0xF5 /* reset and disable scanning */
	61	#define KBD_CMD_RESET_ENABLE 0xF6 /* reset and enable scanning */
	62	#define KBD_CMD_RESET 0xFF /* Reset */
	63
	64	/* Keyboard Replies */
	65	#define KBD_REPLY_POR 0xAA /* Power on reset */
	66	#define KBD_REPLY_ACK 0xFA /* Command ACK */
	67	#define KBD_REPLY_RESEND 0xFE /* Command NACK, send the cmd again */
	68
	69	/* Status Register Bits */
	70	#define KBD_STAT_OBF 0x01 /* Keyboard output buffer full */
	71	#define KBD_STAT_IBF 0x02 /* Keyboard input buffer full */
	72	#define KBD_STAT_SELFTEST 0x04 /* Self test successful */
	73	#define KBD_STAT_CMD 0x08 /* Last write was a command write (0=data) */
	74	#define KBD_STAT_UNLOCKED 0x10 /* Zero if keyboard locked */
	75	#define KBD_STAT_MOUSE_OBF 0x20 /* Mouse output buffer full */
	76	#define KBD_STAT_GTO 0x40 /* General receive/xmit timeout */
	77	#define KBD_STAT_PERR 0x80 /* Parity error */
	78
	79	/* Controller Mode Register Bits */
	80	#define KBD_MODE_KBD_INT 0x01 /* Keyboard data generate IRQ1 */
	81	#define KBD_MODE_MOUSE_INT 0x02 /* Mouse data generate IRQ12 */
	82	#define KBD_MODE_SYS 0x04 /* The system flag (?) */
	83	#define KBD_MODE_NO_KEYLOCK 0x08 /* The keylock doesn't affect the keyboard if set */
	84	#define KBD_MODE_DISABLE_KBD 0x10 /* Disable keyboard interface */
	85	#define KBD_MODE_DISABLE_MOUSE 0x20 /* Disable mouse interface */
	86	#define KBD_MODE_KCC 0x40 /* Scan code conversion to PC format */
	87	#define KBD_MODE_RFU 0x80
88
89	/* Mouse Commands */
90	#define AUX_SET_SCALE11 0xE6 /* Set 1:1 scaling */
91	#define AUX_SET_SCALE21 0xE7 /* Set 2:1 scaling */
92	#define AUX_SET_RES 0xE8 /* Set resolution */
93	#define AUX_GET_SCALE 0xE9 /* Get scaling factor */
94	#define AUX_SET_STREAM 0xEA /* Set stream mode */
95	#define AUX_POLL 0xEB /* Poll */
96	#define AUX_RESET_WRAP 0xEC /* Reset wrap mode */
97	#define AUX_SET_WRAP 0xEE /* Set wrap mode */
98	#define AUX_SET_REMOTE 0xF0 /* Set remote mode */
99	#define AUX_GET_TYPE 0xF2 /* Get type */
100	#define AUX_SET_SAMPLE 0xF3 /* Set sample rate */
101	#define AUX_ENABLE_DEV 0xF4 /* Enable aux device */
102	#define AUX_DISABLE_DEV 0xF5 /* Disable aux device */
103	#define AUX_SET_DEFAULT 0xF6
104	#define AUX_RESET 0xFF /* Reset aux device */
105	#define AUX_ACK 0xFA /* Command byte ACK. */
106
107	#define MOUSE_STATUS_REMOTE 0x40
108	#define MOUSE_STATUS_ENABLED 0x20
109	#define MOUSE_STATUS_SCALE21 0x10
110
111	#define KBD_QUEUE_SIZE 256
112
daa57963 FB	113	#define KBD_PENDING_KBD 1
daa57963 FB	114	#define KBD_PENDING_AUX 2
80cabfad FB	115
80cabfad FB	116	typedef struct KBDState {
80cabfad FB	117	uint8_t write_cmd; /* if non zero, write data to port 60 is expected */
	118	uint8_t status;
	119	uint8_t mode;
daa57963	120	/* Bitmask of devices with data available. */
7783e9f0	121	uint8_t pending;
daa57963 FB	122	void *kbd;
daa57963 FB	123	void *mouse;
b7678d96	124
d537cf6c PB	125	qemu_irq irq_kbd;
d537cf6c PB	126	qemu_irq irq_mouse;
b92bb99b	127	target_phys_addr_t base;
80355292	128	int it_shift;
80cabfad FB	129	} KBDState;
	130
	131	KBDState kbd_state;
80cabfad FB	132
	133	/* update irq and KBD_STAT_[MOUSE_]OBF */
	134	/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
	135	incorrect, but it avoids having to simulate exact delays */
	136	static void kbd_update_irq(KBDState *s)
	137	{
b7678d96	138	int irq_kbd_level, irq_mouse_level;
80cabfad	139
b7678d96 TS	140	irq_kbd_level = 0;
b7678d96 TS	141	irq_mouse_level = 0;
80cabfad	142	s->status &= ~(KBD_STAT_OBF \| KBD_STAT_MOUSE_OBF);
daa57963	143	if (s->pending) {
80cabfad	144	s->status \|= KBD_STAT_OBF;
b92bb99b	145	/* kbd data takes priority over aux data. */
daa57963	146	if (s->pending == KBD_PENDING_AUX) {
80cabfad FB	147	s->status \|= KBD_STAT_MOUSE_OBF;
80cabfad FB	148	if (s->mode & KBD_MODE_MOUSE_INT)
b7678d96	149	irq_mouse_level = 1;
80cabfad	150	} else {
5fafdf24	151	if ((s->mode & KBD_MODE_KBD_INT) &&
80cabfad	152	!(s->mode & KBD_MODE_DISABLE_KBD))
b7678d96	153	irq_kbd_level = 1;
80cabfad FB	154	}
80cabfad FB	155	}
d537cf6c PB	156	qemu_set_irq(s->irq_kbd, irq_kbd_level);
d537cf6c PB	157	qemu_set_irq(s->irq_mouse, irq_mouse_level);
80cabfad FB	158	}
80cabfad FB	159
daa57963	160	static void kbd_update_kbd_irq(void *opaque, int level)
80cabfad	161	{
daa57963	162	KBDState s = (KBDState )opaque;
80cabfad	163
daa57963 FB	164	if (level)
daa57963 FB	165	s->pending \|= KBD_PENDING_KBD;
80cabfad	166	else
daa57963	167	s->pending &= ~KBD_PENDING_KBD;
80cabfad FB	168	kbd_update_irq(s);
	169	}
	170
daa57963	171	static void kbd_update_aux_irq(void *opaque, int level)
80cabfad	172	{
daa57963 FB	173	KBDState s = (KBDState )opaque;
	174
	175	if (level)
	176	s->pending \|= KBD_PENDING_AUX;
	177	else
	178	s->pending &= ~KBD_PENDING_AUX;
	179	kbd_update_irq(s);
80cabfad FB	180	}
80cabfad FB	181
b41a2cd1	182	static uint32_t kbd_read_status(void *opaque, uint32_t addr)
80cabfad	183	{
b41a2cd1	184	KBDState *s = opaque;
80cabfad FB	185	int val;
	186	val = s->status;
	187	#if defined(DEBUG_KBD)
	188	printf("kbd: read status=0x%02x\n", val);
	189	#endif
	190	return val;
	191	}
	192
daa57963 FB	193	static void kbd_queue(KBDState *s, int b, int aux)
	194	{
	195	if (aux)
	196	ps2_queue(s->mouse, b);
	197	else
	198	ps2_queue(s->kbd, b);
	199	}
	200
b41a2cd1	201	static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val)
80cabfad	202	{
b41a2cd1	203	KBDState *s = opaque;
80cabfad FB	204
	205	#ifdef DEBUG_KBD
	206	printf("kbd: write cmd=0x%02x\n", val);
	207	#endif
	208	switch(val) {
	209	case KBD_CCMD_READ_MODE:
	210	kbd_queue(s, s->mode, 0);
	211	break;
	212	case KBD_CCMD_WRITE_MODE:
	213	case KBD_CCMD_WRITE_OBUF:
	214	case KBD_CCMD_WRITE_AUX_OBUF:
	215	case KBD_CCMD_WRITE_MOUSE:
	216	case KBD_CCMD_WRITE_OUTPORT:
	217	s->write_cmd = val;
	218	break;
	219	case KBD_CCMD_MOUSE_DISABLE:
	220	s->mode \|= KBD_MODE_DISABLE_MOUSE;
	221	break;
	222	case KBD_CCMD_MOUSE_ENABLE:
	223	s->mode &= ~KBD_MODE_DISABLE_MOUSE;
	224	break;
	225	case KBD_CCMD_TEST_MOUSE:
	226	kbd_queue(s, 0x00, 0);
	227	break;
	228	case KBD_CCMD_SELF_TEST:
	229	s->status \|= KBD_STAT_SELFTEST;
	230	kbd_queue(s, 0x55, 0);
	231	break;
	232	case KBD_CCMD_KBD_TEST:
	233	kbd_queue(s, 0x00, 0);
	234	break;
	235	case KBD_CCMD_KBD_DISABLE:
	236	s->mode \|= KBD_MODE_DISABLE_KBD;
	237	kbd_update_irq(s);
	238	break;
	239	case KBD_CCMD_KBD_ENABLE:
	240	s->mode &= ~KBD_MODE_DISABLE_KBD;
	241	kbd_update_irq(s);
	242	break;
	243	case KBD_CCMD_READ_INPORT:
	244	kbd_queue(s, 0x00, 0);
	245	break;
	246	case KBD_CCMD_READ_OUTPORT:
	247	/* XXX: check that */
	248	#ifdef TARGET_I386
c68ea704	249	val = 0x01 \| (ioport_get_a20() << 1);
80cabfad FB	250	#else
	251	val = 0x01;
	252	#endif
	253	if (s->status & KBD_STAT_OBF)
	254	val \|= 0x10;
	255	if (s->status & KBD_STAT_MOUSE_OBF)
	256	val \|= 0x20;
	257	kbd_queue(s, val, 0);
	258	break;
	259	#ifdef TARGET_I386
	260	case KBD_CCMD_ENABLE_A20:
c68ea704	261	ioport_set_a20(1);
80cabfad FB	262	break;
80cabfad FB	263	case KBD_CCMD_DISABLE_A20:
c68ea704	264	ioport_set_a20(0);
80cabfad FB	265	break;
	266	#endif
	267	case KBD_CCMD_RESET:
d7d02e3c	268	qemu_system_reset_request();
80cabfad FB	269	break;
	270	case 0xff:
	271	/* ignore that - I don't know what is its use */
	272	break;
	273	default:
	274	fprintf(stderr, "qemu: unsupported keyboard cmd=0x%02x\n", val);
	275	break;
	276	}
	277	}
	278
b41a2cd1	279	static uint32_t kbd_read_data(void *opaque, uint32_t addr)
80cabfad	280	{
63066f4f	281	KBDState *s = opaque;
80cabfad	282
daa57963 FB	283	if (s->pending == KBD_PENDING_AUX)
daa57963 FB	284	return ps2_read_data(s->mouse);
80cabfad	285
daa57963	286	return ps2_read_data(s->kbd);
80cabfad FB	287	}
80cabfad FB	288
b41a2cd1	289	void kbd_write_data(void *opaque, uint32_t addr, uint32_t val)
80cabfad	290	{
b41a2cd1	291	KBDState *s = opaque;
80cabfad FB	292
	293	#ifdef DEBUG_KBD
	294	printf("kbd: write data=0x%02x\n", val);
	295	#endif
	296
	297	switch(s->write_cmd) {
	298	case 0:
daa57963	299	ps2_write_keyboard(s->kbd, val);
80cabfad FB	300	break;
	301	case KBD_CCMD_WRITE_MODE:
	302	s->mode = val;
f94f5d71	303	ps2_keyboard_set_translation(s->kbd, (s->mode & KBD_MODE_KCC) != 0);
daa57963	304	/* ??? */
80cabfad FB	305	kbd_update_irq(s);
	306	break;
	307	case KBD_CCMD_WRITE_OBUF:
	308	kbd_queue(s, val, 0);
	309	break;
	310	case KBD_CCMD_WRITE_AUX_OBUF:
	311	kbd_queue(s, val, 1);
	312	break;
	313	case KBD_CCMD_WRITE_OUTPORT:
	314	#ifdef TARGET_I386
c68ea704	315	ioport_set_a20((val >> 1) & 1);
80cabfad FB	316	#endif
80cabfad FB	317	if (!(val & 1)) {
d7d02e3c	318	qemu_system_reset_request();
80cabfad FB	319	}
	320	break;
	321	case KBD_CCMD_WRITE_MOUSE:
daa57963	322	ps2_write_mouse(s->mouse, val);
80cabfad FB	323	break;
	324	default:
	325	break;
	326	}
	327	s->write_cmd = 0;
	328	}
	329
d7d02e3c	330	static void kbd_reset(void *opaque)
80cabfad	331	{
d7d02e3c	332	KBDState *s = opaque;
80cabfad	333
80cabfad FB	334	s->mode = KBD_MODE_KBD_INT \| KBD_MODE_MOUSE_INT;
80cabfad FB	335	s->status = KBD_STAT_CMD \| KBD_STAT_UNLOCKED;
80cabfad FB	336	}
80cabfad FB	337
675376f2 FB	338	static void kbd_save(QEMUFile* f, void* opaque)
	339	{
	340	KBDState s = (KBDState)opaque;
3b46e624	341
675376f2 FB	342	qemu_put_8s(f, &s->write_cmd);
	343	qemu_put_8s(f, &s->status);
	344	qemu_put_8s(f, &s->mode);
7783e9f0	345	qemu_put_8s(f, &s->pending);
675376f2 FB	346	}
	347
	348	static int kbd_load(QEMUFile* f, void* opaque, int version_id)
	349	{
	350	KBDState s = (KBDState)opaque;
3b46e624	351
7783e9f0	352	if (version_id != 3)
675376f2 FB	353	return -EINVAL;
	354	qemu_get_8s(f, &s->write_cmd);
	355	qemu_get_8s(f, &s->status);
	356	qemu_get_8s(f, &s->mode);
7783e9f0	357	qemu_get_8s(f, &s->pending);
675376f2 FB	358	return 0;
	359	}
	360
d537cf6c	361	void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base)
80cabfad	362	{
b41a2cd1	363	KBDState *s = &kbd_state;
b7678d96	364
d537cf6c PB	365	s->irq_kbd = kbd_irq;
d537cf6c PB	366	s->irq_mouse = mouse_irq;
b92bb99b	367
b41a2cd1	368	kbd_reset(s);
7783e9f0	369	register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
b7678d96 TS	370	register_ioport_read(io_base, 1, 1, kbd_read_data, s);
	371	register_ioport_write(io_base, 1, 1, kbd_write_data, s);
	372	register_ioport_read(io_base + 4, 1, 1, kbd_read_status, s);
	373	register_ioport_write(io_base + 4, 1, 1, kbd_write_command, s);
63066f4f	374
daa57963 FB	375	s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
daa57963 FB	376	s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
548df2ac TS	377	#ifdef TARGET_I386
	378	vmmouse_init(s->mouse);
	379	#endif
d7d02e3c	380	qemu_register_reset(kbd_reset, s);
80cabfad	381	}
b92bb99b TS	382
	383	/* Memory mapped interface */
	384	uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr)
	385	{
	386	KBDState *s = opaque;
	387
80355292 TS	388	switch ((addr - s->base) >> s->it_shift) {
	389	case 0:
	390	return kbd_read_data(s, 0) & 0xff;
	391	case 1:
	392	return kbd_read_status(s, 0) & 0xff;
	393	default:
	394	return 0xff;
	395	}
b92bb99b TS	396	}
b92bb99b TS	397
80355292	398	void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value)
b92bb99b TS	399	{
	400	KBDState *s = opaque;
	401
80355292 TS	402	switch ((addr - s->base) >> s->it_shift) {
	403	case 0:
	404	kbd_write_data(s, 0, value & 0xff);
	405	break;
	406	case 1:
	407	kbd_write_command(s, 0, value & 0xff);
	408	break;
	409	}
b92bb99b TS	410	}
	411
	412	static CPUReadMemoryFunc *kbd_mm_read[] = {
	413	&kbd_mm_readb,
	414	&kbd_mm_readb,
	415	&kbd_mm_readb,
	416	};
	417
	418	static CPUWriteMemoryFunc *kbd_mm_write[] = {
	419	&kbd_mm_writeb,
	420	&kbd_mm_writeb,
	421	&kbd_mm_writeb,
	422	};
	423
71db710f BS	424	void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
71db710f BS	425	target_phys_addr_t base, int it_shift)
b92bb99b TS	426	{
	427	KBDState *s = &kbd_state;
	428	int s_io_memory;
	429
	430	s->irq_kbd = kbd_irq;
	431	s->irq_mouse = mouse_irq;
	432	s->base = base;
80355292	433	s->it_shift = it_shift;
b92bb99b TS	434
	435	kbd_reset(s);
	436	register_savevm("pckbd", 0, 3, kbd_save, kbd_load, s);
	437	s_io_memory = cpu_register_io_memory(0, kbd_mm_read, kbd_mm_write, s);
80355292	438	cpu_register_physical_memory(base, 8 << it_shift, s_io_memory);
b92bb99b TS	439
	440	s->kbd = ps2_kbd_init(kbd_update_kbd_irq, s);
	441	s->mouse = ps2_mouse_init(kbd_update_aux_irq, s);
	442	#ifdef TARGET_I386
	443	vmmouse_init(s->mouse);
	444	#endif
	445	qemu_register_reset(kbd_reset, s);
	446	}