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47d05a86 MF |
1 | /* |
2 | * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab. | |
3 | * All rights reserved. | |
4 | * | |
5 | * Redistribution and use in source and binary forms, with or without | |
6 | * modification, are permitted provided that the following conditions are met: | |
7 | * * Redistributions of source code must retain the above copyright | |
8 | * notice, this list of conditions and the following disclaimer. | |
9 | * * Redistributions in binary form must reproduce the above copyright | |
10 | * notice, this list of conditions and the following disclaimer in the | |
11 | * documentation and/or other materials provided with the distribution. | |
12 | * * Neither the name of the Open Source and Linux Lab nor the | |
13 | * names of its contributors may be used to endorse or promote products | |
14 | * derived from this software without specific prior written permission. | |
15 | * | |
16 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
17 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
18 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
19 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY | |
20 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | |
21 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | |
22 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
23 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | |
24 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | |
25 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
26 | */ | |
27 | ||
09aae23d | 28 | #include "qemu/osdep.h" |
9c17d615 | 29 | #include "sysemu/sysemu.h" |
83c9f4ca PB |
30 | #include "hw/boards.h" |
31 | #include "hw/loader.h" | |
47d05a86 | 32 | #include "elf.h" |
022c62cb PB |
33 | #include "exec/memory.h" |
34 | #include "exec/address-spaces.h" | |
8488ab02 | 35 | #include "qemu/error-report.h" |
47d05a86 | 36 | |
00b941e5 | 37 | static uint64_t translate_phys_addr(void *opaque, uint64_t addr) |
47d05a86 | 38 | { |
00b941e5 AF |
39 | XtensaCPU *cpu = opaque; |
40 | ||
41 | return cpu_get_phys_page_debug(CPU(cpu), addr); | |
47d05a86 MF |
42 | } |
43 | ||
11e7bfd7 | 44 | static void sim_reset(void *opaque) |
47d05a86 | 45 | { |
11e7bfd7 AF |
46 | XtensaCPU *cpu = opaque; |
47 | ||
48 | cpu_reset(CPU(cpu)); | |
47d05a86 MF |
49 | } |
50 | ||
3ef96221 | 51 | static void xtensa_sim_init(MachineState *machine) |
47d05a86 | 52 | { |
06d26274 | 53 | XtensaCPU *cpu = NULL; |
5bfcb36e | 54 | CPUXtensaState *env = NULL; |
47d05a86 | 55 | MemoryRegion *ram, *rom; |
3ef96221 MA |
56 | ram_addr_t ram_size = machine->ram_size; |
57 | const char *cpu_model = machine->cpu_model; | |
58 | const char *kernel_filename = machine->kernel_filename; | |
47d05a86 MF |
59 | int n; |
60 | ||
50cd7214 MF |
61 | if (!cpu_model) { |
62 | cpu_model = XTENSA_DEFAULT_CPU_MODEL; | |
63 | } | |
64 | ||
47d05a86 | 65 | for (n = 0; n < smp_cpus; n++) { |
06d26274 AF |
66 | cpu = cpu_xtensa_init(cpu_model); |
67 | if (cpu == NULL) { | |
ebbb419a | 68 | error_report("unable to find CPU definition '%s'", |
8488ab02 MF |
69 | cpu_model); |
70 | exit(EXIT_FAILURE); | |
47d05a86 | 71 | } |
06d26274 AF |
72 | env = &cpu->env; |
73 | ||
47d05a86 | 74 | env->sregs[PRID] = n; |
11e7bfd7 | 75 | qemu_register_reset(sim_reset, cpu); |
47d05a86 MF |
76 | /* Need MMU initialized prior to ELF loading, |
77 | * so that ELF gets loaded into virtual addresses | |
78 | */ | |
11e7bfd7 | 79 | sim_reset(cpu); |
47d05a86 MF |
80 | } |
81 | ||
82 | ram = g_malloc(sizeof(*ram)); | |
f8ed85ac | 83 | memory_region_init_ram(ram, NULL, "xtensa.sram", ram_size, &error_fatal); |
c5705a77 | 84 | vmstate_register_ram_global(ram); |
47d05a86 MF |
85 | memory_region_add_subregion(get_system_memory(), 0, ram); |
86 | ||
87 | rom = g_malloc(sizeof(*rom)); | |
f8ed85ac | 88 | memory_region_init_ram(rom, NULL, "xtensa.rom", 0x1000, &error_fatal); |
c5705a77 | 89 | vmstate_register_ram_global(rom); |
47d05a86 MF |
90 | memory_region_add_subregion(get_system_memory(), 0xfe000000, rom); |
91 | ||
92 | if (kernel_filename) { | |
93 | uint64_t elf_entry; | |
94 | uint64_t elf_lowaddr; | |
95 | #ifdef TARGET_WORDS_BIGENDIAN | |
00b941e5 | 96 | int success = load_elf(kernel_filename, translate_phys_addr, cpu, |
7ef295ea | 97 | &elf_entry, &elf_lowaddr, NULL, 1, EM_XTENSA, 0, 0); |
47d05a86 | 98 | #else |
00b941e5 | 99 | int success = load_elf(kernel_filename, translate_phys_addr, cpu, |
7ef295ea | 100 | &elf_entry, &elf_lowaddr, NULL, 0, EM_XTENSA, 0, 0); |
47d05a86 MF |
101 | #endif |
102 | if (success > 0) { | |
103 | env->pc = elf_entry; | |
104 | } | |
105 | } | |
106 | } | |
107 | ||
e264d29d | 108 | static void xtensa_sim_machine_init(MachineClass *mc) |
47d05a86 | 109 | { |
e264d29d EH |
110 | mc->desc = "sim machine (" XTENSA_DEFAULT_CPU_MODEL ")"; |
111 | mc->is_default = true; | |
112 | mc->init = xtensa_sim_init; | |
113 | mc->max_cpus = 4; | |
47d05a86 MF |
114 | } |
115 | ||
e264d29d | 116 | DEFINE_MACHINE("sim", xtensa_sim_machine_init) |