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machine: Refactor smp_parse() in vl.c as MachineClass::smp_parse()
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CommitLineData
87ecb68b
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1/* Declarations for use by board files for creating devices. */
2
3#ifndef HW_BOARDS_H
4#define HW_BOARDS_H
5
9c17d615 6#include "sysemu/blockdev.h"
ac2da55e 7#include "sysemu/accel.h"
83c9f4ca 8#include "hw/qdev.h"
8ac25c84 9#include "qapi/qapi-types-machine.h"
0b8fa32f 10#include "qemu/module.h"
36d20cb2 11#include "qom/object.h"
3811ef14 12#include "qom/cpu.h"
b6b61144 13
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14/**
15 * memory_region_allocate_system_memory - Allocate a board's main memory
16 * @mr: the #MemoryRegion to be initialized
17 * @owner: the object that tracks the region's reference count
18 * @name: name of the memory region
19 * @ram_size: size of the region in bytes
20 *
21 * This function allocates the main memory for a board model, and
22 * initializes @mr appropriately. It also arranges for the memory
23 * to be migrated (by calling vmstate_register_ram_global()).
24 *
25 * Memory allocated via this function will be backed with the memory
26 * backend the user provided using "-mem-path" or "-numa node,memdev=..."
27 * if appropriate; this is typically used to cause host huge pages to be
28 * used. This function should therefore be called by a board exactly once,
29 * for the primary or largest RAM area it implements.
30 *
31 * For boards where the major RAM is split into two parts in the memory
32 * map, you can deal with this by calling memory_region_allocate_system_memory()
33 * once to get a MemoryRegion with enough RAM for both parts, and then
34 * creating alias MemoryRegions via memory_region_init_alias() which
35 * alias into different parts of the RAM MemoryRegion and can be mapped
36 * into the memory map in the appropriate places.
37 *
38 * Smaller pieces of memory (display RAM, static RAMs, etc) don't need
39 * to be backed via the -mem-path memory backend and can simply
5bd366b4 40 * be created via memory_region_init_ram().
09ad6438 41 */
dfabb8b9
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42void memory_region_allocate_system_memory(MemoryRegion *mr, Object *owner,
43 const char *name,
44 uint64_t ram_size);
45
dfabb8b9 46#define TYPE_MACHINE_SUFFIX "-machine"
c84a8f01
EH
47
48/* Machine class name that needs to be used for class-name-based machine
49 * type lookup to work.
50 */
51#define MACHINE_TYPE_NAME(machinename) (machinename TYPE_MACHINE_SUFFIX)
52
36d20cb2 53#define TYPE_MACHINE "machine"
c8897e8e 54#undef MACHINE /* BSD defines it and QEMU does not use it */
36d20cb2
MA
55#define MACHINE(obj) \
56 OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE)
57#define MACHINE_GET_CLASS(obj) \
58 OBJECT_GET_CLASS(MachineClass, (obj), TYPE_MACHINE)
59#define MACHINE_CLASS(klass) \
60 OBJECT_CLASS_CHECK(MachineClass, (klass), TYPE_MACHINE)
61
0056ae24
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62extern MachineState *current_machine;
63
482dfe9a 64void machine_run_board_init(MachineState *machine);
5e97b623 65bool machine_usb(MachineState *machine);
d8870d02
MA
66bool machine_kernel_irqchip_allowed(MachineState *machine);
67bool machine_kernel_irqchip_required(MachineState *machine);
32c18a2d 68bool machine_kernel_irqchip_split(MachineState *machine);
4689b77b 69int machine_kvm_shadow_mem(MachineState *machine);
6cabe7fa 70int machine_phandle_start(MachineState *machine);
47c8ca53 71bool machine_dump_guest_core(MachineState *machine);
75cc7f01 72bool machine_mem_merge(MachineState *machine);
f2d672c2 73HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine);
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74void machine_set_cpu_numa_node(MachineState *machine,
75 const CpuInstanceProperties *props,
76 Error **errp);
5e97b623 77
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78void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type);
79
80
3811ef14
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81/**
82 * CPUArchId:
83 * @arch_id - architecture-dependent CPU ID of present or possible CPU
84 * @cpu - pointer to corresponding CPU object if it's present on NULL otherwise
d342eb76 85 * @type - QOM class name of possible @cpu object
c67ae933 86 * @props - CPU object properties, initialized by board
f2d672c2 87 * #vcpus_count - number of threads provided by @cpu object
3811ef14
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88 */
89typedef struct {
90 uint64_t arch_id;
f2d672c2 91 int64_t vcpus_count;
c67ae933 92 CpuInstanceProperties props;
8aba3842 93 Object *cpu;
d342eb76 94 const char *type;
3811ef14
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95} CPUArchId;
96
97/**
98 * CPUArchIdList:
99 * @len - number of @CPUArchId items in @cpus array
100 * @cpus - array of present or possible CPUs for current machine configuration
101 */
102typedef struct {
103 int len;
104 CPUArchId cpus[0];
105} CPUArchIdList;
106
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107/**
108 * MachineClass:
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109 * @deprecation_reason: If set, the machine is marked as deprecated. The
110 * string should provide some clear information about what to use instead.
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111 * @max_cpus: maximum number of CPUs supported. Default: 1
112 * @min_cpus: minimum number of CPUs supported. Default: 1
113 * @default_cpus: number of CPUs instantiated if none are specified. Default: 1
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114 * @get_hotplug_handler: this function is called during bus-less
115 * device hotplug. If defined it returns pointer to an instance
116 * of HotplugHandler object, which handles hotplug operation
117 * for a given @dev. It may return NULL if @dev doesn't require
118 * any actions to be performed by hotplug handler.
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119 * @cpu_index_to_instance_props:
120 * used to provide @cpu_index to socket/core/thread number mapping, allowing
121 * legacy code to perform maping from cpu_index to topology properties
122 * Returns: tuple of socket/core/thread ids given cpu_index belongs to.
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123 * used to provide @cpu_index to socket number mapping, allowing
124 * a machine to group CPU threads belonging to the same socket/package
125 * Returns: socket number given cpu_index belongs to.
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126 * @hw_version:
127 * Value of QEMU_VERSION when the machine was added to QEMU.
128 * Set only by old machines because they need to keep
129 * compatibility on code that exposed QEMU_VERSION to guests in
130 * the past (and now use qemu_hw_version()).
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131 * @possible_cpu_arch_ids:
132 * Returns an array of @CPUArchId architecture-dependent CPU IDs
133 * which includes CPU IDs for present and possible to hotplug CPUs.
134 * Caller is responsible for freeing returned list.
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135 * @get_default_cpu_node_id:
136 * returns default board specific node_id value for CPU slot specified by
137 * index @idx in @ms->possible_cpus[]
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138 * @has_hotpluggable_cpus:
139 * If true, board supports CPUs creation with -device/device_add.
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140 * @default_cpu_type:
141 * specifies default CPU_TYPE, which will be used for parsing target
142 * specific features and for creating CPUs if CPU name wasn't provided
143 * explicitly at CLI
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144 * @minimum_page_bits:
145 * If non-zero, the board promises never to create a CPU with a page size
146 * smaller than this, so QEMU can use a more efficient larger page
147 * size than the target architecture's minimum. (Attempting to create
148 * such a CPU will fail.) Note that changing this is a migration
149 * compatibility break for the machine.
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150 * @ignore_memory_transaction_failures:
151 * If this is flag is true then the CPU will ignore memory transaction
152 * failures which should cause the CPU to take an exception due to an
153 * access to an unassigned physical address; the transaction will instead
154 * return zero (for a read) or be ignored (for a write). This should be
155 * set only by legacy board models which rely on the old RAZ/WI behaviour
156 * for handling devices that QEMU does not yet model. New board models
157 * should instead use "unimplemented-device" for all memory ranges where
158 * the guest will attempt to probe for a device that QEMU doesn't
159 * implement and a stub device is required.
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160 * @kvm_type:
161 * Return the type of KVM corresponding to the kvm-type string option or
162 * computed based on other criteria such as the host kernel capabilities.
cd5ff833
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163 * @numa_mem_supported:
164 * true if '--numa node.mem' option is supported and false otherwise
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165 * @smp_parse:
166 * The function pointer to hook different machine specific functions for
167 * parsing "smp-opts" from QemuOpts to MachineState::CpuTopology and more
168 * machine specific topology fields, such as smp_dies for PCMachine.
36d20cb2
MA
169 */
170struct MachineClass {
171 /*< private >*/
172 ObjectClass parent_class;
173 /*< public >*/
174
2709f263 175 const char *family; /* NULL iff @name identifies a standalone machtype */
8ea75371 176 char *name;
00b4fbe2
MA
177 const char *alias;
178 const char *desc;
08fe6824 179 const char *deprecation_reason;
00b4fbe2 180
3ef96221 181 void (*init)(MachineState *state);
a0628599
LX
182 void (*reset)(MachineState *state);
183 void (*hot_add_cpu)(MachineState *state, const int64_t id, Error **errp);
dc0ca80e 184 int (*kvm_type)(MachineState *machine, const char *arg);
6f479566 185 void (*smp_parse)(MachineState *ms, QemuOpts *opts);
00b4fbe2
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186
187 BlockInterfaceType block_default_type;
16026518 188 int units_per_default_bus;
00b4fbe2 189 int max_cpus;
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190 int min_cpus;
191 int default_cpus;
00b4fbe2
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192 unsigned int no_serial:1,
193 no_parallel:1,
00b4fbe2
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194 no_floppy:1,
195 no_cdrom:1,
33cd52b5 196 no_sdcard:1,
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197 pci_allow_0_address:1,
198 legacy_fw_cfg_order:1;
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199 int is_default;
200 const char *default_machine_opts;
201 const char *default_boot_order;
6f00494a 202 const char *default_display;
b66bbee3 203 GPtrArray *compat_props;
00b4fbe2 204 const char *hw_version;
076b35b5 205 ram_addr_t default_ram_size;
6063d4c0 206 const char *default_cpu_type;
b2fc91db 207 bool default_kernel_irqchip_split;
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208 bool option_rom_has_mr;
209 bool rom_file_has_mr;
20bccb82 210 int minimum_page_bits;
c5514d0e 211 bool has_hotpluggable_cpus;
ed860129 212 bool ignore_memory_transaction_failures;
55641213 213 int numa_mem_align_shift;
c9cf636d 214 const char **valid_cpu_types;
0bd1909d 215 strList *allowed_dynamic_sysbus_devices;
7b8be49d 216 bool auto_enable_numa_with_memhp;
3bfe5716
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217 void (*numa_auto_assign_ram)(MachineClass *mc, NodeInfo *nodes,
218 int nb_nodes, ram_addr_t size);
907aac2f 219 bool ignore_boot_device_suffixes;
7fccf2a0 220 bool smbus_no_migration_support;
f6a0d06b 221 bool nvdimm_supported;
cd5ff833 222 bool numa_mem_supported;
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223
224 HotplugHandler *(*get_hotplug_handler)(MachineState *machine,
225 DeviceState *dev);
ea089eeb
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226 CpuInstanceProperties (*cpu_index_to_instance_props)(MachineState *machine,
227 unsigned cpu_index);
80e5db30 228 const CPUArchIdList *(*possible_cpu_arch_ids)(MachineState *machine);
79e07936 229 int64_t (*get_default_cpu_node_id)(const MachineState *ms, int idx);
36d20cb2
MA
230};
231
b0c14ec4 232/**
e017da37 233 * DeviceMemoryState:
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DH
234 * @base: address in guest physical address space where the memory
235 * address space for memory devices starts
236 * @mr: address space container for memory devices
237 */
e017da37 238typedef struct DeviceMemoryState {
b0c14ec4
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239 hwaddr base;
240 MemoryRegion mr;
e017da37 241} DeviceMemoryState;
b0c14ec4 242
edeeec91
LX
243/**
244 * CpuTopology:
245 * @cpus: the number of present logical processors on the machine
246 * @cores: the number of cores in one package
247 * @threads: the number of threads in one core
248 * @max_cpus: the maximum number of logical processors on the machine
249 */
250typedef struct CpuTopology {
251 unsigned int cpus;
252 unsigned int cores;
253 unsigned int threads;
254 unsigned int max_cpus;
255} CpuTopology;
256
36d20cb2
MA
257/**
258 * MachineState:
259 */
260struct MachineState {
261 /*< private >*/
262 Object parent_obj;
33cd52b5
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263 Notifier sysbus_notifier;
264
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265 /*< public >*/
266
267 char *accel;
d8870d02
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268 bool kernel_irqchip_allowed;
269 bool kernel_irqchip_required;
32c18a2d 270 bool kernel_irqchip_split;
36d20cb2 271 int kvm_shadow_mem;
36d20cb2
MA
272 char *dtb;
273 char *dumpdtb;
274 int phandle_start;
275 char *dt_compatible;
276 bool dump_guest_core;
277 bool mem_merge;
278 bool usb;
c6e76503 279 bool usb_disabled;
79814179 280 bool igd_gfx_passthru;
36d20cb2 281 char *firmware;
a52a7fdf 282 bool iommu;
9850c604 283 bool suppress_vmdesc;
902c053d 284 bool enforce_config_section;
cfc58cf3 285 bool enable_graphics;
db588194 286 char *memory_encryption;
e017da37 287 DeviceMemoryState *device_memory;
36d20cb2 288
3ef96221 289 ram_addr_t ram_size;
c270fb9e
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290 ram_addr_t maxram_size;
291 uint64_t ram_slots;
3ef96221 292 const char *boot_order;
6b1b1440
MA
293 char *kernel_filename;
294 char *kernel_cmdline;
295 char *initrd_filename;
6063d4c0 296 const char *cpu_type;
ac2da55e 297 AccelState *accelerator;
38690a1c 298 CPUArchIdList *possible_cpus;
edeeec91 299 CpuTopology smp;
f6a0d06b 300 struct NVDIMMState *nvdimms_state;
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301};
302
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303#define DEFINE_MACHINE(namestr, machine_initfn) \
304 static void machine_initfn##_class_init(ObjectClass *oc, void *data) \
305 { \
306 MachineClass *mc = MACHINE_CLASS(oc); \
307 machine_initfn(mc); \
308 } \
309 static const TypeInfo machine_initfn##_typeinfo = { \
310 .name = MACHINE_TYPE_NAME(namestr), \
311 .parent = TYPE_MACHINE, \
312 .class_init = machine_initfn##_class_init, \
313 }; \
314 static void machine_initfn##_register_types(void) \
315 { \
316 type_register_static(&machine_initfn##_typeinfo); \
317 } \
0e6aac87 318 type_init(machine_initfn##_register_types)
ed0b6de3 319
9bf2650b
CH
320extern GlobalProperty hw_compat_4_0[];
321extern const size_t hw_compat_4_0_len;
322
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323extern GlobalProperty hw_compat_3_1[];
324extern const size_t hw_compat_3_1_len;
325
ddb3235d
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326extern GlobalProperty hw_compat_3_0[];
327extern const size_t hw_compat_3_0_len;
328
0d47310b
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329extern GlobalProperty hw_compat_2_12[];
330extern const size_t hw_compat_2_12_len;
331
43df70a9
MAL
332extern GlobalProperty hw_compat_2_11[];
333extern const size_t hw_compat_2_11_len;
334
503224f4
MAL
335extern GlobalProperty hw_compat_2_10[];
336extern const size_t hw_compat_2_10_len;
337
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338extern GlobalProperty hw_compat_2_9[];
339extern const size_t hw_compat_2_9_len;
340
edc24ccd
MAL
341extern GlobalProperty hw_compat_2_8[];
342extern const size_t hw_compat_2_8_len;
343
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344extern GlobalProperty hw_compat_2_7[];
345extern const size_t hw_compat_2_7_len;
346
ff8f261f
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347extern GlobalProperty hw_compat_2_6[];
348extern const size_t hw_compat_2_6_len;
349
fe759610
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350extern GlobalProperty hw_compat_2_5[];
351extern const size_t hw_compat_2_5_len;
352
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353extern GlobalProperty hw_compat_2_4[];
354extern const size_t hw_compat_2_4_len;
355
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356extern GlobalProperty hw_compat_2_3[];
357extern const size_t hw_compat_2_3_len;
358
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359extern GlobalProperty hw_compat_2_2[];
360extern const size_t hw_compat_2_2_len;
361
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362extern GlobalProperty hw_compat_2_1[];
363extern const size_t hw_compat_2_1_len;
364
87ecb68b 365#endif