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f4de3ca1 NP |
1 | /* |
2 | * SPDX-License-Identifier: GPL-2.0-or-later | |
3 | * Copyright (C) 2024 IBM Corp. | |
4 | * | |
5 | * IBM Flexible Service Interface | |
6 | */ | |
7 | #ifndef FSI_FSI_H | |
8 | #define FSI_FSI_H | |
9 | ||
6a2897bb | 10 | #include "exec/memory.h" |
f4de3ca1 | 11 | #include "hw/qdev-core.h" |
6a2897bb NP |
12 | #include "hw/fsi/lbus.h" |
13 | #include "qemu/bitops.h" | |
14 | ||
15 | /* Bitwise operations at the word level. */ | |
16 | #define BE_GENMASK(hb, lb) MAKE_64BIT_MASK((lb), ((hb) - (lb) + 1)) | |
f4de3ca1 NP |
17 | |
18 | #define TYPE_FSI_BUS "fsi.bus" | |
19 | OBJECT_DECLARE_SIMPLE_TYPE(FSIBus, FSI_BUS) | |
20 | ||
21 | typedef struct FSIBus { | |
22 | BusState bus; | |
23 | } FSIBus; | |
24 | ||
6a2897bb NP |
25 | #define TYPE_FSI_SLAVE "fsi.slave" |
26 | OBJECT_DECLARE_SIMPLE_TYPE(FSISlaveState, FSI_SLAVE) | |
27 | ||
28 | #define FSI_SLAVE_CONTROL_NR_REGS ((0x40 >> 2) + 1) | |
29 | ||
30 | typedef struct FSISlaveState { | |
31 | DeviceState parent; | |
32 | ||
33 | MemoryRegion iomem; | |
34 | uint32_t regs[FSI_SLAVE_CONTROL_NR_REGS]; | |
35 | } FSISlaveState; | |
36 | ||
f4de3ca1 | 37 | #endif /* FSI_FSI_H */ |