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c6dc6f63
AP		 1/*
2 * i386 CPUID helper functions
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19#include <stdlib.h>
20#include <stdio.h>
21#include <string.h>
22#include <inttypes.h>
23
24#include "cpu.h"
25#include "kvm.h"
26
27#include "qemu-option.h"
28#include "qemu-config.h"
29
30/* feature flags taken from "Intel Processor Identification and the CPUID
31 * Instruction" and AMD's "CPUID Specification". In cases of disagreement
32 * between feature naming conventions, aliases may be added.
33 */
34static const char *feature_name[] = {
35 "fpu", "vme", "de", "pse",
36 "tsc", "msr", "pae", "mce",
37 "cx8", "apic", NULL, "sep",
38 "mtrr", "pge", "mca", "cmov",
39 "pat", "pse36", "pn" /* Intel psn */, "clflush" /* Intel clfsh */,
40 NULL, "ds" /* Intel dts */, "acpi", "mmx",
41 "fxsr", "sse", "sse2", "ss",
42 "ht" /* Intel htt */, "tm", "ia64", "pbe",
43};
44static const char *ext_feature_name[] = {
e117f772
AP		 45 "pni|sse3" /* Intel,AMD sse3 */, "pclmuldq", "dtes64", "monitor",
46 "ds_cpl", "vmx", "smx", "est",
c6dc6f63 47 "tm2", "ssse3", "cid", NULL,
e117f772 48 "fma", "cx16", "xtpr", "pdcm",
c6dc6f63 49 NULL, NULL, "dca", "sse4.1|sse4_1",
e117f772
AP		 50 "sse4.2|sse4_2", "x2apic", "movbe", "popcnt",
51 NULL, "aes", "xsave", "osxsave",
52 "avx", NULL, NULL, "hypervisor",
c6dc6f63
AP		 53};
54static const char *ext2_feature_name[] = {
55 "fpu", "vme", "de", "pse",
56 "tsc", "msr", "pae", "mce",
57 "cx8" /* AMD CMPXCHG8B */, "apic", NULL, "syscall",
58 "mtrr", "pge", "mca", "cmov",
59 "pat", "pse36", NULL, NULL /* Linux mp */,
60 "nx" /* Intel xd */, NULL, "mmxext", "mmx",
61 "fxsr", "fxsr_opt" /* AMD ffxsr */, "pdpe1gb" /* AMD Page1GB */, "rdtscp",
62 NULL, "lm" /* Intel 64 */, "3dnowext", "3dnow",
63};
64static const char *ext3_feature_name[] = {
65 "lahf_lm" /* AMD LahfSahf */, "cmp_legacy", "svm", "extapic" /* AMD ExtApicSpace */,
66 "cr8legacy" /* AMD AltMovCr8 */, "abm", "sse4a", "misalignsse",
e117f772 67 "3dnowprefetch", "osvw", "ibs", "xop",
c6dc6f63 68 "skinit", "wdt", NULL, NULL,
e117f772 69 "fma4", NULL, "cvt16", "nodeid_msr",
c6dc6f63
AP		 70 NULL, NULL, NULL, NULL,
71 NULL, NULL, NULL, NULL,
72 NULL, NULL, NULL, NULL,
73};
74
75static const char *kvm_feature_name[] = {
642258c6 76 "kvmclock", "kvm_nopiodelay", "kvm_mmu", "kvmclock", "kvm_asyncpf", NULL, NULL, NULL,
c6dc6f63
AP		 77 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
78 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
79 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
80};
81
296acb64
JR		 82static const char *svm_feature_name[] = {
83 "npt", "lbrv", "svm_lock", "nrip_save",
84 "tsc_scale", "vmcb_clean", "flushbyasid", "decodeassists",
85 NULL, NULL, "pause_filter", NULL,
86 "pfthreshold", NULL, NULL, NULL,
87 NULL, NULL, NULL, NULL,
88 NULL, NULL, NULL, NULL,
89 NULL, NULL, NULL, NULL,
90 NULL, NULL, NULL, NULL,
91};
92
c6dc6f63
AP		 93/* collects per-function cpuid data
94 */
95typedef struct model_features_t {
96 uint32_t *guest_feat;
97 uint32_t *host_feat;
98 uint32_t check_feat;
99 const char **flag_names;
100 uint32_t cpuid;
101 } model_features_t;
102
103int check_cpuid = 0;
104int enforce_cpuid = 0;
105
bb44e0d1
JK		 106void host_cpuid(uint32_t function, uint32_t count,
107 uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx)
bdde476a
AP		 108{
109#if defined(CONFIG_KVM)
bdde476a 110 if (eax)
66e3dd92 111 *eax = kvm_arch_get_supported_cpuid(kvm_state, function, count, R_EAX);
bdde476a 112 if (ebx)
66e3dd92 113 *ebx = kvm_arch_get_supported_cpuid(kvm_state, function, count, R_EBX);
bdde476a 114 if (ecx)
66e3dd92 115 *ecx = kvm_arch_get_supported_cpuid(kvm_state, function, count, R_ECX);
bdde476a 116 if (edx)
66e3dd92 117 *edx = kvm_arch_get_supported_cpuid(kvm_state, function, count, R_EDX);
bdde476a
AP		 118#endif
119}
c6dc6f63
AP		 120
121#define iswhite(c) ((c) && ((c) <= ' ' || '~' < (c)))
122
123/* general substring compare of *[s1..e1) and *[s2..e2). sx is start of
124 * a substring. ex if !NULL points to the first char after a substring,
125 * otherwise the string is assumed to sized by a terminating nul.
126 * Return lexical ordering of *s1:*s2.
127 */
128static int sstrcmp(const char *s1, const char *e1, const char *s2,
129 const char *e2)
130{
131 for (;;) {
132 if (!*s1 || !*s2 || *s1 != *s2)
133 return (*s1 - *s2);
134 ++s1, ++s2;
135 if (s1 == e1 && s2 == e2)
136 return (0);
137 else if (s1 == e1)
138 return (*s2);
139 else if (s2 == e2)
140 return (*s1);
141 }
142}
143
144/* compare *[s..e) to *altstr. *altstr may be a simple string or multiple
145 * '|' delimited (possibly empty) strings in which case search for a match
146 * within the alternatives proceeds left to right. Return 0 for success,
147 * non-zero otherwise.
148 */
149static int altcmp(const char *s, const char *e, const char *altstr)
150{
151 const char *p, *q;
152
153 for (q = p = altstr; ; ) {
154 while (*p && *p != '|')
155 ++p;
156 if ((q == p && !*s) || (q != p && !sstrcmp(s, e, q, p)))
157 return (0);
158 if (!*p)
159 return (1);
160 else
161 q = ++p;
162 }
163}
164
165/* search featureset for flag *[s..e), if found set corresponding bit in
e41e0fc6 166 * *pval and return true, otherwise return false
c6dc6f63 167 */
e41e0fc6
JK		 168static bool lookup_feature(uint32_t *pval, const char *s, const char *e,
169 const char **featureset)
c6dc6f63
AP		 170{
171 uint32_t mask;
172 const char **ppc;
e41e0fc6 173 bool found = false;
c6dc6f63 174
e41e0fc6 175 for (mask = 1, ppc = featureset; mask; mask <<= 1, ++ppc) {
c6dc6f63
AP		 176 if (*ppc && !altcmp(s, e, *ppc)) {
177 *pval |= mask;
e41e0fc6 178 found = true;
c6dc6f63 179 }
e41e0fc6
JK		 180 }
181 return found;
c6dc6f63
AP		 182}
183
184static void add_flagname_to_bitmaps(const char *flagname, uint32_t *features,
185 uint32_t *ext_features,
186 uint32_t *ext2_features,
187 uint32_t *ext3_features,
296acb64
JR		 188 uint32_t *kvm_features,
189 uint32_t *svm_features)
c6dc6f63
AP		 190{
191 if (!lookup_feature(features, flagname, NULL, feature_name) &&
192 !lookup_feature(ext_features, flagname, NULL, ext_feature_name) &&
193 !lookup_feature(ext2_features, flagname, NULL, ext2_feature_name) &&
194 !lookup_feature(ext3_features, flagname, NULL, ext3_feature_name) &&
296acb64
JR		 195 !lookup_feature(kvm_features, flagname, NULL, kvm_feature_name) &&
196 !lookup_feature(svm_features, flagname, NULL, svm_feature_name))
c6dc6f63
AP		 197 fprintf(stderr, "CPU feature %s not found\n", flagname);
198}
199
200typedef struct x86_def_t {
201 struct x86_def_t *next;
202 const char *name;
203 uint32_t level;
204 uint32_t vendor1, vendor2, vendor3;
205 int family;
206 int model;
207 int stepping;
b862d1fe 208 int tsc_khz;
296acb64
JR		 209 uint32_t features, ext_features, ext2_features, ext3_features;
210 uint32_t kvm_features, svm_features;
c6dc6f63
AP		 211 uint32_t xlevel;
212 char model_id[48];
213 int vendor_override;
214 uint32_t flags;
b3baa152
BW		 215 /* Store the results of Centaur's CPUID instructions */
216 uint32_t ext4_features;
217 uint32_t xlevel2;
c6dc6f63
AP		 218} x86_def_t;
219
220#define I486_FEATURES (CPUID_FP87 | CPUID_VME | CPUID_PSE)
221#define PENTIUM_FEATURES (I486_FEATURES | CPUID_DE | CPUID_TSC | \
222 CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_MMX | CPUID_APIC)
223#define PENTIUM2_FEATURES (PENTIUM_FEATURES | CPUID_PAE | CPUID_SEP | \
224 CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
225 CPUID_PSE36 | CPUID_FXSR)
226#define PENTIUM3_FEATURES (PENTIUM2_FEATURES | CPUID_SSE)
227#define PPRO_FEATURES (CPUID_FP87 | CPUID_DE | CPUID_PSE | CPUID_TSC | \
228 CPUID_MSR | CPUID_MCE | CPUID_CX8 | CPUID_PGE | CPUID_CMOV | \
229 CPUID_PAT | CPUID_FXSR | CPUID_MMX | CPUID_SSE | CPUID_SSE2 | \
230 CPUID_PAE | CPUID_SEP | CPUID_APIC)
42673936 231#define EXT2_FEATURE_MASK 0x0183F3FF
c6dc6f63 232
551a2dec
AP		 233#define TCG_FEATURES (CPUID_FP87 | CPUID_PSE | CPUID_TSC | CPUID_MSR | \
234 CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC | CPUID_SEP | \
235 CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV | CPUID_PAT | \
236 CPUID_PSE36 | CPUID_CLFLUSH | CPUID_ACPI | CPUID_MMX | \
237 CPUID_FXSR | CPUID_SSE | CPUID_SSE2 | CPUID_SS)
8560efed
AJ		 238 /* partly implemented:
239 CPUID_MTRR, CPUID_MCA, CPUID_CLFLUSH (needed for Win64)
240 CPUID_PSE36 (needed for Solaris) */
241 /* missing:
242 CPUID_VME, CPUID_DTS, CPUID_SS, CPUID_HT, CPUID_TM, CPUID_PBE */
551a2dec 243#define TCG_EXT_FEATURES (CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | \
8713f8ff 244 CPUID_EXT_CX16 | CPUID_EXT_POPCNT | \
551a2dec 245 CPUID_EXT_HYPERVISOR)
8560efed
AJ		 246 /* missing:
247 CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_VMX, CPUID_EXT_EST,
8713f8ff 248 CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_XSAVE */
551a2dec
AP		 249#define TCG_EXT2_FEATURES ((TCG_FEATURES & EXT2_FEATURE_MASK) | \
250 CPUID_EXT2_NX | CPUID_EXT2_MMXEXT | CPUID_EXT2_RDTSCP | \
251 CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT)
8560efed
AJ		 252 /* missing:
253 CPUID_EXT2_PDPE1GB */
551a2dec
AP		 254#define TCG_EXT3_FEATURES (CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM | \
255 CPUID_EXT3_CR8LEG | CPUID_EXT3_ABM | CPUID_EXT3_SSE4A)
296acb64 256#define TCG_SVM_FEATURES 0
551a2dec 257
c6dc6f63
AP		 258/* maintains list of cpu model definitions
259 */
260static x86_def_t *x86_defs = {NULL};
261
262/* built-in cpu model definitions (deprecated)
263 */
264static x86_def_t builtin_x86_defs[] = {
c6dc6f63
AP		 265 {
266 .name = "qemu64",
267 .level = 4,
268 .vendor1 = CPUID_VENDOR_AMD_1,
269 .vendor2 = CPUID_VENDOR_AMD_2,
270 .vendor3 = CPUID_VENDOR_AMD_3,
271 .family = 6,
272 .model = 2,
273 .stepping = 3,
274 .features = PPRO_FEATURES |
c6dc6f63 275 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
c6dc6f63
AP		 276 CPUID_PSE36,
277 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16 | CPUID_EXT_POPCNT,
42673936 278 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
c6dc6f63
AP		 279 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
280 .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
281 CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
282 .xlevel = 0x8000000A,
283 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
284 },
285 {
286 .name = "phenom",
287 .level = 5,
288 .vendor1 = CPUID_VENDOR_AMD_1,
289 .vendor2 = CPUID_VENDOR_AMD_2,
290 .vendor3 = CPUID_VENDOR_AMD_3,
291 .family = 16,
292 .model = 2,
293 .stepping = 3,
c6dc6f63
AP		 294 .features = PPRO_FEATURES |
295 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
8560efed 296 CPUID_PSE36 | CPUID_VME | CPUID_HT,
c6dc6f63
AP		 297 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_CX16 |
298 CPUID_EXT_POPCNT,
42673936 299 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
c6dc6f63
AP		 300 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX |
301 CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT | CPUID_EXT2_MMXEXT |
8560efed 302 CPUID_EXT2_FFXSR | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP,
c6dc6f63
AP		 303 /* Missing: CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
304 CPUID_EXT3_CR8LEG,
305 CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
306 CPUID_EXT3_OSVW, CPUID_EXT3_IBS */
307 .ext3_features = CPUID_EXT3_LAHF_LM | CPUID_EXT3_SVM |
308 CPUID_EXT3_ABM | CPUID_EXT3_SSE4A,
296acb64 309 .svm_features = CPUID_SVM_NPT | CPUID_SVM_LBRV,
c6dc6f63
AP		 310 .xlevel = 0x8000001A,
311 .model_id = "AMD Phenom(tm) 9550 Quad-Core Processor"
312 },
313 {
314 .name = "core2duo",
315 .level = 10,
316 .family = 6,
317 .model = 15,
318 .stepping = 11,
c6dc6f63
AP		 319 .features = PPRO_FEATURES |
320 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
8560efed
AJ		 321 CPUID_PSE36 | CPUID_VME | CPUID_DTS | CPUID_ACPI | CPUID_SS |
322 CPUID_HT | CPUID_TM | CPUID_PBE,
323 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
324 CPUID_EXT_DTES64 | CPUID_EXT_DSCPL | CPUID_EXT_VMX | CPUID_EXT_EST |
325 CPUID_EXT_TM2 | CPUID_EXT_CX16 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
c6dc6f63
AP		 326 .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
327 .ext3_features = CPUID_EXT3_LAHF_LM,
328 .xlevel = 0x80000008,
329 .model_id = "Intel(R) Core(TM)2 Duo CPU T7700 @ 2.40GHz",
330 },
331 {
332 .name = "kvm64",
333 .level = 5,
334 .vendor1 = CPUID_VENDOR_INTEL_1,
335 .vendor2 = CPUID_VENDOR_INTEL_2,
336 .vendor3 = CPUID_VENDOR_INTEL_3,
337 .family = 15,
338 .model = 6,
339 .stepping = 1,
340 /* Missing: CPUID_VME, CPUID_HT */
341 .features = PPRO_FEATURES |
342 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA |
343 CPUID_PSE36,
344 /* Missing: CPUID_EXT_POPCNT, CPUID_EXT_MONITOR */
345 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_CX16,
346 /* Missing: CPUID_EXT2_PDPE1GB, CPUID_EXT2_RDTSCP */
42673936 347 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) |
c6dc6f63
AP		 348 CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX,
349 /* Missing: CPUID_EXT3_LAHF_LM, CPUID_EXT3_CMP_LEG, CPUID_EXT3_EXTAPIC,
350 CPUID_EXT3_CR8LEG, CPUID_EXT3_ABM, CPUID_EXT3_SSE4A,
351 CPUID_EXT3_MISALIGNSSE, CPUID_EXT3_3DNOWPREFETCH,
352 CPUID_EXT3_OSVW, CPUID_EXT3_IBS, CPUID_EXT3_SVM */
353 .ext3_features = 0,
354 .xlevel = 0x80000008,
355 .model_id = "Common KVM processor"
356 },
c6dc6f63
AP		 357 {
358 .name = "qemu32",
359 .level = 4,
360 .family = 6,
361 .model = 3,
362 .stepping = 3,
363 .features = PPRO_FEATURES,
364 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_POPCNT,
58012d66 365 .xlevel = 0x80000004,
c6dc6f63
AP		 366 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
367 },
eafaf1e5
AP		 368 {
369 .name = "kvm32",
370 .level = 5,
371 .family = 15,
372 .model = 6,
373 .stepping = 1,
374 .features = PPRO_FEATURES |
375 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36,
376 .ext_features = CPUID_EXT_SSE3,
377 .ext2_features = PPRO_FEATURES & EXT2_FEATURE_MASK,
378 .ext3_features = 0,
379 .xlevel = 0x80000008,
380 .model_id = "Common 32-bit KVM processor"
381 },
c6dc6f63
AP		 382 {
383 .name = "coreduo",
384 .level = 10,
385 .family = 6,
386 .model = 14,
387 .stepping = 8,
c6dc6f63 388 .features = PPRO_FEATURES | CPUID_VME |
8560efed
AJ		 389 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_DTS | CPUID_ACPI |
390 CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
391 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX |
392 CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR | CPUID_EXT_PDCM,
c6dc6f63
AP		 393 .ext2_features = CPUID_EXT2_NX,
394 .xlevel = 0x80000008,
395 .model_id = "Genuine Intel(R) CPU T2600 @ 2.16GHz",
396 },
397 {
398 .name = "486",
58012d66 399 .level = 1,
c6dc6f63
AP		 400 .family = 4,
401 .model = 0,
402 .stepping = 0,
403 .features = I486_FEATURES,
404 .xlevel = 0,
405 },
406 {
407 .name = "pentium",
408 .level = 1,
409 .family = 5,
410 .model = 4,
411 .stepping = 3,
412 .features = PENTIUM_FEATURES,
413 .xlevel = 0,
414 },
415 {
416 .name = "pentium2",
417 .level = 2,
418 .family = 6,
419 .model = 5,
420 .stepping = 2,
421 .features = PENTIUM2_FEATURES,
422 .xlevel = 0,
423 },
424 {
425 .name = "pentium3",
426 .level = 2,
427 .family = 6,
428 .model = 7,
429 .stepping = 3,
430 .features = PENTIUM3_FEATURES,
431 .xlevel = 0,
432 },
433 {
434 .name = "athlon",
435 .level = 2,
436 .vendor1 = CPUID_VENDOR_AMD_1,
437 .vendor2 = CPUID_VENDOR_AMD_2,
438 .vendor3 = CPUID_VENDOR_AMD_3,
439 .family = 6,
440 .model = 2,
441 .stepping = 3,
442 .features = PPRO_FEATURES | CPUID_PSE36 | CPUID_VME | CPUID_MTRR | CPUID_MCA,
42673936 443 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_MMXEXT | CPUID_EXT2_3DNOW | CPUID_EXT2_3DNOWEXT,
c6dc6f63
AP		 444 .xlevel = 0x80000008,
445 /* XXX: put another string ? */
446 .model_id = "QEMU Virtual CPU version " QEMU_VERSION,
447 },
448 {
449 .name = "n270",
450 /* original is on level 10 */
451 .level = 5,
452 .family = 6,
453 .model = 28,
454 .stepping = 2,
455 .features = PPRO_FEATURES |
8560efed
AJ		 456 CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_VME | CPUID_DTS |
457 CPUID_ACPI | CPUID_SS | CPUID_HT | CPUID_TM | CPUID_PBE,
c6dc6f63 458 /* Some CPUs got no CPUID_SEP */
8560efed
AJ		 459 .ext_features = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 |
460 CPUID_EXT_DSCPL | CPUID_EXT_EST | CPUID_EXT_TM2 | CPUID_EXT_XTPR,
42673936 461 .ext2_features = (PPRO_FEATURES & EXT2_FEATURE_MASK) | CPUID_EXT2_NX,
8560efed 462 .ext3_features = CPUID_EXT3_LAHF_LM,
c6dc6f63
AP		 463 .xlevel = 0x8000000A,
464 .model_id = "Intel(R) Atom(TM) CPU N270 @ 1.60GHz",
465 },
466};
467
468static int cpu_x86_fill_model_id(char *str)
469{
470 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
471 int i;
472
473 for (i = 0; i < 3; i++) {
474 host_cpuid(0x80000002 + i, 0, &eax, &ebx, &ecx, &edx);
475 memcpy(str + i * 16 + 0, &eax, 4);
476 memcpy(str + i * 16 + 4, &ebx, 4);
477 memcpy(str + i * 16 + 8, &ecx, 4);
478 memcpy(str + i * 16 + 12, &edx, 4);
479 }
480 return 0;
481}
482
483static int cpu_x86_fill_host(x86_def_t *x86_cpu_def)
484{
485 uint32_t eax = 0, ebx = 0, ecx = 0, edx = 0;
486
487 x86_cpu_def->name = "host";
488 host_cpuid(0x0, 0, &eax, &ebx, &ecx, &edx);
489 x86_cpu_def->level = eax;
490 x86_cpu_def->vendor1 = ebx;
491 x86_cpu_def->vendor2 = edx;
492 x86_cpu_def->vendor3 = ecx;
493
494 host_cpuid(0x1, 0, &eax, &ebx, &ecx, &edx);
495 x86_cpu_def->family = ((eax >> 8) & 0x0F) + ((eax >> 20) & 0xFF);
496 x86_cpu_def->model = ((eax >> 4) & 0x0F) | ((eax & 0xF0000) >> 12);
497 x86_cpu_def->stepping = eax & 0x0F;
498 x86_cpu_def->ext_features = ecx;
499 x86_cpu_def->features = edx;
500
501 host_cpuid(0x80000000, 0, &eax, &ebx, &ecx, &edx);
502 x86_cpu_def->xlevel = eax;
503
504 host_cpuid(0x80000001, 0, &eax, &ebx, &ecx, &edx);
505 x86_cpu_def->ext2_features = edx;
506 x86_cpu_def->ext3_features = ecx;
507 cpu_x86_fill_model_id(x86_cpu_def->model_id);
508 x86_cpu_def->vendor_override = 0;
509
b3baa152
BW		 510 /* Call Centaur's CPUID instruction. */
511 if (x86_cpu_def->vendor1 == CPUID_VENDOR_VIA_1 &&
512 x86_cpu_def->vendor2 == CPUID_VENDOR_VIA_2 &&
513 x86_cpu_def->vendor3 == CPUID_VENDOR_VIA_3) {
514 host_cpuid(0xC0000000, 0, &eax, &ebx, &ecx, &edx);
515 if (eax >= 0xC0000001) {
516 /* Support VIA max extended level */
517 x86_cpu_def->xlevel2 = eax;
518 host_cpuid(0xC0000001, 0, &eax, &ebx, &ecx, &edx);
519 x86_cpu_def->ext4_features = edx;
520 }
521 }
296acb64
JR		 522
523 /*
524 * Every SVM feature requires emulation support in KVM - so we can't just
525 * read the host features here. KVM might even support SVM features not
526 * available on the host hardware. Just set all bits and mask out the
527 * unsupported ones later.
528 */
529 x86_cpu_def->svm_features = -1;
530
c6dc6f63
AP		 531 return 0;
532}
533
534static int unavailable_host_feature(struct model_features_t *f, uint32_t mask)
535{
536 int i;
537
538 for (i = 0; i < 32; ++i)
539 if (1 << i & mask) {
540 fprintf(stderr, "warning: host cpuid %04x_%04x lacks requested"
541 " flag '%s' [0x%08x]\n",
542 f->cpuid >> 16, f->cpuid & 0xffff,
543 f->flag_names[i] ? f->flag_names[i] : "[reserved]", mask);
544 break;
545 }
546 return 0;
547}
548
549/* best effort attempt to inform user requested cpu flags aren't making
550 * their way to the guest. Note: ft[].check_feat ideally should be
551 * specified via a guest_def field to suppress report of extraneous flags.
552 */
553static int check_features_against_host(x86_def_t *guest_def)
554{
555 x86_def_t host_def;
556 uint32_t mask;
557 int rv, i;
558 struct model_features_t ft[] = {
559 {&guest_def->features, &host_def.features,
560 ~0, feature_name, 0x00000000},
561 {&guest_def->ext_features, &host_def.ext_features,
562 ~CPUID_EXT_HYPERVISOR, ext_feature_name, 0x00000001},
563 {&guest_def->ext2_features, &host_def.ext2_features,
564 ~PPRO_FEATURES, ext2_feature_name, 0x80000000},
565 {&guest_def->ext3_features, &host_def.ext3_features,
566 ~CPUID_EXT3_SVM, ext3_feature_name, 0x80000001}};
567
568 cpu_x86_fill_host(&host_def);
66fe09ee 569 for (rv = 0, i = 0; i < ARRAY_SIZE(ft); ++i)
c6dc6f63
AP		 570 for (mask = 1; mask; mask <<= 1)
571 if (ft[i].check_feat & mask && *ft[i].guest_feat & mask &&
572 !(*ft[i].host_feat & mask)) {
573 unavailable_host_feature(&ft[i], mask);
574 rv = 1;
575 }
576 return rv;
577}
578
579static int cpu_x86_find_by_name(x86_def_t *x86_cpu_def, const char *cpu_model)
580{
581 unsigned int i;
582 x86_def_t *def;
583
d3c481b3 584 char *s = g_strdup(cpu_model);
c6dc6f63 585 char *featurestr, *name = strtok(s, ",");
296acb64
JR		 586 /* Features to be added*/
587 uint32_t plus_features = 0, plus_ext_features = 0;
588 uint32_t plus_ext2_features = 0, plus_ext3_features = 0;
589 uint32_t plus_kvm_features = 0, plus_svm_features = 0;
590 /* Features to be removed */
591 uint32_t minus_features = 0, minus_ext_features = 0;
592 uint32_t minus_ext2_features = 0, minus_ext3_features = 0;
593 uint32_t minus_kvm_features = 0, minus_svm_features = 0;
c6dc6f63
AP		 594 uint32_t numvalue;
595
596 for (def = x86_defs; def; def = def->next)
04c5b17a 597 if (name && !strcmp(name, def->name))
c6dc6f63 598 break;
04c5b17a 599 if (kvm_enabled() && name && strcmp(name, "host") == 0) {
c6dc6f63
AP		 600 cpu_x86_fill_host(x86_cpu_def);
601 } else if (!def) {
602 goto error;
603 } else {
604 memcpy(x86_cpu_def, def, sizeof(*def));
605 }
606
607 plus_kvm_features = ~0; /* not supported bits will be filtered out later */
608
609 add_flagname_to_bitmaps("hypervisor", &plus_features,
610 &plus_ext_features, &plus_ext2_features, &plus_ext3_features,
296acb64 611 &plus_kvm_features, &plus_svm_features);
c6dc6f63
AP		 612
613 featurestr = strtok(NULL, ",");
614
615 while (featurestr) {
616 char *val;
617 if (featurestr[0] == '+') {
296acb64
JR		 618 add_flagname_to_bitmaps(featurestr + 1, &plus_features,
619 &plus_ext_features, &plus_ext2_features,
620 &plus_ext3_features, &plus_kvm_features,
621 &plus_svm_features);
c6dc6f63 622 } else if (featurestr[0] == '-') {
296acb64
JR		 623 add_flagname_to_bitmaps(featurestr + 1, &minus_features,
624 &minus_ext_features, &minus_ext2_features,
625 &minus_ext3_features, &minus_kvm_features,
626 &minus_svm_features);
c6dc6f63
AP		 627 } else if ((val = strchr(featurestr, '='))) {
628 *val = 0; val++;
629 if (!strcmp(featurestr, "family")) {
630 char *err;
631 numvalue = strtoul(val, &err, 0);
632 if (!*val || *err) {
633 fprintf(stderr, "bad numerical value %s\n", val);
634 goto error;
635 }
636 x86_cpu_def->family = numvalue;
637 } else if (!strcmp(featurestr, "model")) {
638 char *err;
639 numvalue = strtoul(val, &err, 0);
640 if (!*val || *err || numvalue > 0xff) {
641 fprintf(stderr, "bad numerical value %s\n", val);
642 goto error;
643 }
644 x86_cpu_def->model = numvalue;
645 } else if (!strcmp(featurestr, "stepping")) {
646 char *err;
647 numvalue = strtoul(val, &err, 0);
648 if (!*val || *err || numvalue > 0xf) {
649 fprintf(stderr, "bad numerical value %s\n", val);
650 goto error;
651 }
652 x86_cpu_def->stepping = numvalue ;
653 } else if (!strcmp(featurestr, "level")) {
654 char *err;
655 numvalue = strtoul(val, &err, 0);
656 if (!*val || *err) {
657 fprintf(stderr, "bad numerical value %s\n", val);
658 goto error;
659 }
660 x86_cpu_def->level = numvalue;
661 } else if (!strcmp(featurestr, "xlevel")) {
662 char *err;
663 numvalue = strtoul(val, &err, 0);
664 if (!*val || *err) {
665 fprintf(stderr, "bad numerical value %s\n", val);
666 goto error;
667 }
668 if (numvalue < 0x80000000) {
2f7a21c4 669 numvalue += 0x80000000;
c6dc6f63
AP		 670 }
671 x86_cpu_def->xlevel = numvalue;
672 } else if (!strcmp(featurestr, "vendor")) {
673 if (strlen(val) != 12) {
674 fprintf(stderr, "vendor string must be 12 chars long\n");
675 goto error;
676 }
677 x86_cpu_def->vendor1 = 0;
678 x86_cpu_def->vendor2 = 0;
679 x86_cpu_def->vendor3 = 0;
680 for(i = 0; i < 4; i++) {
681 x86_cpu_def->vendor1 |= ((uint8_t)val[i ]) << (8 * i);
682 x86_cpu_def->vendor2 |= ((uint8_t)val[i + 4]) << (8 * i);
683 x86_cpu_def->vendor3 |= ((uint8_t)val[i + 8]) << (8 * i);
684 }
685 x86_cpu_def->vendor_override = 1;
686 } else if (!strcmp(featurestr, "model_id")) {
687 pstrcpy(x86_cpu_def->model_id, sizeof(x86_cpu_def->model_id),
688 val);
b862d1fe
JR		 689 } else if (!strcmp(featurestr, "tsc_freq")) {
690 int64_t tsc_freq;
691 char *err;
692
693 tsc_freq = strtosz_suffix_unit(val, &err,
694 STRTOSZ_DEFSUFFIX_B, 1000);
695 if (!*val || *err) {
696 fprintf(stderr, "bad numerical value %s\n", val);
697 goto error;
698 }
699 x86_cpu_def->tsc_khz = tsc_freq / 1000;
c6dc6f63
AP		 700 } else {
701 fprintf(stderr, "unrecognized feature %s\n", featurestr);
702 goto error;
703 }
704 } else if (!strcmp(featurestr, "check")) {
705 check_cpuid = 1;
706 } else if (!strcmp(featurestr, "enforce")) {
707 check_cpuid = enforce_cpuid = 1;
708 } else {
709 fprintf(stderr, "feature string `%s' not in format (+feature|-feature|feature=xyz)\n", featurestr);
710 goto error;
711 }
712 featurestr = strtok(NULL, ",");
713 }
714 x86_cpu_def->features |= plus_features;
715 x86_cpu_def->ext_features |= plus_ext_features;
716 x86_cpu_def->ext2_features |= plus_ext2_features;
717 x86_cpu_def->ext3_features |= plus_ext3_features;
718 x86_cpu_def->kvm_features |= plus_kvm_features;
296acb64 719 x86_cpu_def->svm_features |= plus_svm_features;
c6dc6f63
AP		 720 x86_cpu_def->features &= ~minus_features;
721 x86_cpu_def->ext_features &= ~minus_ext_features;
722 x86_cpu_def->ext2_features &= ~minus_ext2_features;
723 x86_cpu_def->ext3_features &= ~minus_ext3_features;
724 x86_cpu_def->kvm_features &= ~minus_kvm_features;
296acb64 725 x86_cpu_def->svm_features &= ~minus_svm_features;
c6dc6f63
AP		 726 if (check_cpuid) {
727 if (check_features_against_host(x86_cpu_def) && enforce_cpuid)
728 goto error;
729 }
d3c481b3 730 g_free(s);
c6dc6f63
AP		 731 return 0;
732
733error:
d3c481b3 734 g_free(s);
c6dc6f63
AP		 735 return -1;
736}
737
738/* generate a composite string into buf of all cpuid names in featureset
739 * selected by fbits. indicate truncation at bufsize in the event of overflow.
740 * if flags, suppress names undefined in featureset.
741 */
742static void listflags(char *buf, int bufsize, uint32_t fbits,
743 const char **featureset, uint32_t flags)
744{
745 const char **p = &featureset[31];
746 char *q, *b, bit;
747 int nc;
748
749 b = 4 <= bufsize ? buf + (bufsize -= 3) - 1 : NULL;
750 *buf = '\0';
751 for (q = buf, bit = 31; fbits && bufsize; --p, fbits &= ~(1 << bit), --bit)
752 if (fbits & 1 << bit && (*p || !flags)) {
753 if (*p)
754 nc = snprintf(q, bufsize, "%s%s", q == buf ? "" : " ", *p);
755 else
756 nc = snprintf(q, bufsize, "%s[%d]", q == buf ? "" : " ", bit);
757 if (bufsize <= nc) {
758 if (b) {
759 memcpy(b, "...", sizeof("..."));
760 }
761 return;
762 }
763 q += nc;
764 bufsize -= nc;
765 }
766}
767
768/* generate CPU information:
769 * -? list model names
770 * -?model list model names/IDs
771 * -?dump output all model (x86_def_t) data
772 * -?cpuid list all recognized cpuid flag names
773 */
9a78eead 774void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
c6dc6f63
AP		 775{
776 unsigned char model = !strcmp("?model", optarg);
777 unsigned char dump = !strcmp("?dump", optarg);
778 unsigned char cpuid = !strcmp("?cpuid", optarg);
779 x86_def_t *def;
780 char buf[256];
781
782 if (cpuid) {
783 (*cpu_fprintf)(f, "Recognized CPUID flags:\n");
784 listflags(buf, sizeof (buf), (uint32_t)~0, feature_name, 1);
785 (*cpu_fprintf)(f, " f_edx: %s\n", buf);
786 listflags(buf, sizeof (buf), (uint32_t)~0, ext_feature_name, 1);
787 (*cpu_fprintf)(f, " f_ecx: %s\n", buf);
788 listflags(buf, sizeof (buf), (uint32_t)~0, ext2_feature_name, 1);
789 (*cpu_fprintf)(f, " extf_edx: %s\n", buf);
790 listflags(buf, sizeof (buf), (uint32_t)~0, ext3_feature_name, 1);
791 (*cpu_fprintf)(f, " extf_ecx: %s\n", buf);
792 return;
793 }
794 for (def = x86_defs; def; def = def->next) {
795 snprintf(buf, sizeof (buf), def->flags ? "[%s]": "%s", def->name);
796 if (model || dump) {
797 (*cpu_fprintf)(f, "x86 %16s %-48s\n", buf, def->model_id);
798 } else {
799 (*cpu_fprintf)(f, "x86 %16s\n", buf);
800 }
801 if (dump) {
802 memcpy(buf, &def->vendor1, sizeof (def->vendor1));
803 memcpy(buf + 4, &def->vendor2, sizeof (def->vendor2));
804 memcpy(buf + 8, &def->vendor3, sizeof (def->vendor3));
805 buf[12] = '\0';
806 (*cpu_fprintf)(f,
807 " family %d model %d stepping %d level %d xlevel 0x%x"
808 " vendor \"%s\"\n",
809 def->family, def->model, def->stepping, def->level,
810 def->xlevel, buf);
811 listflags(buf, sizeof (buf), def->features, feature_name, 0);
812 (*cpu_fprintf)(f, " feature_edx %08x (%s)\n", def->features,
813 buf);
814 listflags(buf, sizeof (buf), def->ext_features, ext_feature_name,
815 0);
816 (*cpu_fprintf)(f, " feature_ecx %08x (%s)\n", def->ext_features,
817 buf);
818 listflags(buf, sizeof (buf), def->ext2_features, ext2_feature_name,
819 0);
820 (*cpu_fprintf)(f, " extfeature_edx %08x (%s)\n",
821 def->ext2_features, buf);
822 listflags(buf, sizeof (buf), def->ext3_features, ext3_feature_name,
823 0);
824 (*cpu_fprintf)(f, " extfeature_ecx %08x (%s)\n",
825 def->ext3_features, buf);
826 (*cpu_fprintf)(f, "\n");
827 }
828 }
ed2c54d4
AP		 829 if (kvm_enabled()) {
830 (*cpu_fprintf)(f, "x86 %16s\n", "[host]");
831 }
c6dc6f63
AP		 832}
833
834int cpu_x86_register (CPUX86State *env, const char *cpu_model)
835{
836 x86_def_t def1, *def = &def1;
837
db0ad1ba
JR		 838 memset(def, 0, sizeof(*def));
839
c6dc6f63
AP		 840 if (cpu_x86_find_by_name(def, cpu_model) < 0)
841 return -1;
842 if (def->vendor1) {
843 env->cpuid_vendor1 = def->vendor1;
844 env->cpuid_vendor2 = def->vendor2;
845 env->cpuid_vendor3 = def->vendor3;
846 } else {
847 env->cpuid_vendor1 = CPUID_VENDOR_INTEL_1;
848 env->cpuid_vendor2 = CPUID_VENDOR_INTEL_2;
849 env->cpuid_vendor3 = CPUID_VENDOR_INTEL_3;
850 }
851 env->cpuid_vendor_override = def->vendor_override;
852 env->cpuid_level = def->level;
853 if (def->family > 0x0f)
854 env->cpuid_version = 0xf00 | ((def->family - 0x0f) << 20);
855 else
856 env->cpuid_version = def->family << 8;
857 env->cpuid_version |= ((def->model & 0xf) << 4) | ((def->model >> 4) << 16);
858 env->cpuid_version |= def->stepping;
859 env->cpuid_features = def->features;
c6dc6f63
AP		 860 env->cpuid_ext_features = def->ext_features;
861 env->cpuid_ext2_features = def->ext2_features;
4d067ed7 862 env->cpuid_ext3_features = def->ext3_features;
c6dc6f63
AP		 863 env->cpuid_xlevel = def->xlevel;
864 env->cpuid_kvm_features = def->kvm_features;
296acb64 865 env->cpuid_svm_features = def->svm_features;
b3baa152
BW		 866 env->cpuid_ext4_features = def->ext4_features;
867 env->cpuid_xlevel2 = def->xlevel2;
b862d1fe 868 env->tsc_khz = def->tsc_khz;
551a2dec
AP		 869 if (!kvm_enabled()) {
870 env->cpuid_features &= TCG_FEATURES;
871 env->cpuid_ext_features &= TCG_EXT_FEATURES;
872 env->cpuid_ext2_features &= (TCG_EXT2_FEATURES
873#ifdef TARGET_X86_64
874 | CPUID_EXT2_SYSCALL | CPUID_EXT2_LM
875#endif
876 );
877 env->cpuid_ext3_features &= TCG_EXT3_FEATURES;
296acb64 878 env->cpuid_svm_features &= TCG_SVM_FEATURES;
551a2dec 879 }
c6dc6f63
AP		 880 {
881 const char *model_id = def->model_id;
882 int c, len, i;
883 if (!model_id)
884 model_id = "";
885 len = strlen(model_id);
886 for(i = 0; i < 48; i++) {
887 if (i >= len)
888 c = '\0';
889 else
890 c = (uint8_t)model_id[i];
891 env->cpuid_model[i >> 2] |= c << (8 * (i & 3));
892 }
893 }
894 return 0;
895}
896
897#if !defined(CONFIG_USER_ONLY)
898/* copy vendor id string to 32 bit register, nul pad as needed
899 */
900static void cpyid(const char *s, uint32_t *id)
901{
902 char *d = (char *)id;
903 char i;
904
905 for (i = sizeof (*id); i--; )
906 *d++ = *s ? *s++ : '\0';
907}
908
909/* interpret radix and convert from string to arbitrary scalar,
910 * otherwise flag failure
911 */
912#define setscalar(pval, str, perr) \
913{ \
914 char *pend; \
915 unsigned long ul; \
916 \
917 ul = strtoul(str, &pend, 0); \
918 *str && !*pend ? (*pval = ul) : (*perr = 1); \
919}
920
921/* map cpuid options to feature bits, otherwise return failure
922 * (option tags in *str are delimited by whitespace)
923 */
924static void setfeatures(uint32_t *pval, const char *str,
925 const char **featureset, int *perr)
926{
927 const char *p, *q;
928
929 for (q = p = str; *p || *q; q = p) {
930 while (iswhite(*p))
931 q = ++p;
932 while (*p && !iswhite(*p))
933 ++p;
934 if (!*q && !*p)
935 return;
936 if (!lookup_feature(pval, q, p, featureset)) {
937 fprintf(stderr, "error: feature \"%.*s\" not available in set\n",
938 (int)(p - q), q);
939 *perr = 1;
940 return;
941 }
942 }
943}
944
945/* map config file options to x86_def_t form
946 */
947static int cpudef_setfield(const char *name, const char *str, void *opaque)
948{
949 x86_def_t *def = opaque;
950 int err = 0;
951
952 if (!strcmp(name, "name")) {
99e1dec0 953 g_free((void *)def->name);
d3c481b3 954 def->name = g_strdup(str);
c6dc6f63
AP		 955 } else if (!strcmp(name, "model_id")) {
956 strncpy(def->model_id, str, sizeof (def->model_id));
957 } else if (!strcmp(name, "level")) {
958 setscalar(&def->level, str, &err)
959 } else if (!strcmp(name, "vendor")) {
960 cpyid(&str[0], &def->vendor1);
961 cpyid(&str[4], &def->vendor2);
962 cpyid(&str[8], &def->vendor3);
963 } else if (!strcmp(name, "family")) {
964 setscalar(&def->family, str, &err)
965 } else if (!strcmp(name, "model")) {
966 setscalar(&def->model, str, &err)
967 } else if (!strcmp(name, "stepping")) {
968 setscalar(&def->stepping, str, &err)
969 } else if (!strcmp(name, "feature_edx")) {
970 setfeatures(&def->features, str, feature_name, &err);
971 } else if (!strcmp(name, "feature_ecx")) {
972 setfeatures(&def->ext_features, str, ext_feature_name, &err);
973 } else if (!strcmp(name, "extfeature_edx")) {
974 setfeatures(&def->ext2_features, str, ext2_feature_name, &err);
975 } else if (!strcmp(name, "extfeature_ecx")) {
976 setfeatures(&def->ext3_features, str, ext3_feature_name, &err);
977 } else if (!strcmp(name, "xlevel")) {
978 setscalar(&def->xlevel, str, &err)
979 } else {
980 fprintf(stderr, "error: unknown option [%s = %s]\n", name, str);
981 return (1);
982 }
983 if (err) {
984 fprintf(stderr, "error: bad option value [%s = %s]\n", name, str);
985 return (1);
986 }
987 return (0);
988}
989
990/* register config file entry as x86_def_t
991 */
992static int cpudef_register(QemuOpts *opts, void *opaque)
993{
7267c094 994 x86_def_t *def = g_malloc0(sizeof (x86_def_t));
c6dc6f63
AP		 995
996 qemu_opt_foreach(opts, cpudef_setfield, def, 1);
997 def->next = x86_defs;
998 x86_defs = def;
999 return (0);
1000}
0e26b7b8
BS		 1001
1002void cpu_clear_apic_feature(CPUX86State *env)
1003{
1004 env->cpuid_features &= ~CPUID_APIC;
1005}
1006
c6dc6f63
AP		 1007#endif /* !CONFIG_USER_ONLY */
1008
1009/* register "cpudef" models defined in configuration file. Here we first
1010 * preload any built-in definitions
1011 */
1012void x86_cpudef_setup(void)
1013{
1014 int i;
1015
1016 for (i = 0; i < ARRAY_SIZE(builtin_x86_defs); ++i) {
1017 builtin_x86_defs[i].next = x86_defs;
1018 builtin_x86_defs[i].flags = 1;
1019 x86_defs = &builtin_x86_defs[i];
1020 }
1021#if !defined(CONFIG_USER_ONLY)
3329f07b 1022 qemu_opts_foreach(qemu_find_opts("cpudef"), cpudef_register, NULL, 0);
c6dc6f63
AP		 1023#endif
1024}
1025
c6dc6f63
AP		 1026static void get_cpuid_vendor(CPUX86State *env, uint32_t *ebx,
1027 uint32_t *ecx, uint32_t *edx)
1028{
1029 *ebx = env->cpuid_vendor1;
1030 *edx = env->cpuid_vendor2;
1031 *ecx = env->cpuid_vendor3;
1032
1033 /* sysenter isn't supported on compatibility mode on AMD, syscall
1034 * isn't supported in compatibility mode on Intel.
1035 * Normally we advertise the actual cpu vendor, but you can override
1036 * this if you want to use KVM's sysenter/syscall emulation
1037 * in compatibility mode and when doing cross vendor migration
1038 */
89354998 1039 if (kvm_enabled() && ! env->cpuid_vendor_override) {
c6dc6f63
AP		 1040 host_cpuid(0, 0, NULL, ebx, ecx, edx);
1041 }
1042}
1043
1044void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
1045 uint32_t *eax, uint32_t *ebx,
1046 uint32_t *ecx, uint32_t *edx)
1047{
1048 /* test if maximum index reached */
1049 if (index & 0x80000000) {
b3baa152
BW		 1050 if (index > env->cpuid_xlevel) {
1051 if (env->cpuid_xlevel2 > 0) {
1052 /* Handle the Centaur's CPUID instruction. */
1053 if (index > env->cpuid_xlevel2) {
1054 index = env->cpuid_xlevel2;
1055 } else if (index < 0xC0000000) {
1056 index = env->cpuid_xlevel;
1057 }
1058 } else {
1059 index = env->cpuid_xlevel;
1060 }
1061 }
c6dc6f63
AP		 1062 } else {
1063 if (index > env->cpuid_level)
1064 index = env->cpuid_level;
1065 }
1066
1067 switch(index) {
1068 case 0:
1069 *eax = env->cpuid_level;
1070 get_cpuid_vendor(env, ebx, ecx, edx);
1071 break;
1072 case 1:
1073 *eax = env->cpuid_version;
1074 *ebx = (env->cpuid_apic_id << 24) | 8 << 8; /* CLFLUSH size in quad words, Linux wants it. */
1075 *ecx = env->cpuid_ext_features;
1076 *edx = env->cpuid_features;
1077 if (env->nr_cores * env->nr_threads > 1) {
1078 *ebx |= (env->nr_cores * env->nr_threads) << 16;
1079 *edx |= 1 << 28; /* HTT bit */
1080 }
1081 break;
1082 case 2:
1083 /* cache info: needed for Pentium Pro compatibility */
1084 *eax = 1;
1085 *ebx = 0;
1086 *ecx = 0;
1087 *edx = 0x2c307d;
1088 break;
1089 case 4:
1090 /* cache info: needed for Core compatibility */
1091 if (env->nr_cores > 1) {
2f7a21c4 1092 *eax = (env->nr_cores - 1) << 26;
c6dc6f63 1093 } else {
2f7a21c4 1094 *eax = 0;
c6dc6f63
AP		 1095 }
1096 switch (count) {
1097 case 0: /* L1 dcache info */
1098 *eax |= 0x0000121;
1099 *ebx = 0x1c0003f;
1100 *ecx = 0x000003f;
1101 *edx = 0x0000001;
1102 break;
1103 case 1: /* L1 icache info */
1104 *eax |= 0x0000122;
1105 *ebx = 0x1c0003f;
1106 *ecx = 0x000003f;
1107 *edx = 0x0000001;
1108 break;
1109 case 2: /* L2 cache info */
1110 *eax |= 0x0000143;
1111 if (env->nr_threads > 1) {
1112 *eax |= (env->nr_threads - 1) << 14;
1113 }
1114 *ebx = 0x3c0003f;
1115 *ecx = 0x0000fff;
1116 *edx = 0x0000001;
1117 break;
1118 default: /* end of info */
1119 *eax = 0;
1120 *ebx = 0;
1121 *ecx = 0;
1122 *edx = 0;
1123 break;
1124 }
1125 break;
1126 case 5:
1127 /* mwait info: needed for Core compatibility */
1128 *eax = 0; /* Smallest monitor-line size in bytes */
1129 *ebx = 0; /* Largest monitor-line size in bytes */
1130 *ecx = CPUID_MWAIT_EMX | CPUID_MWAIT_IBE;
1131 *edx = 0;
1132 break;
1133 case 6:
1134 /* Thermal and Power Leaf */
1135 *eax = 0;
1136 *ebx = 0;
1137 *ecx = 0;
1138 *edx = 0;
1139 break;
f7911686
YW		 1140 case 7:
1141 if (kvm_enabled()) {
ba9bc59e
JK		 1142 KVMState *s = env->kvm_state;
1143
1144 *eax = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EAX);
1145 *ebx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EBX);
1146 *ecx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_ECX);
1147 *edx = kvm_arch_get_supported_cpuid(s, 0x7, count, R_EDX);
f7911686
YW		 1148 } else {
1149 *eax = 0;
1150 *ebx = 0;
1151 *ecx = 0;
1152 *edx = 0;
1153 }
1154 break;
c6dc6f63
AP		 1155 case 9:
1156 /* Direct Cache Access Information Leaf */
1157 *eax = 0; /* Bits 0-31 in DCA_CAP MSR */
1158 *ebx = 0;
1159 *ecx = 0;
1160 *edx = 0;
1161 break;
1162 case 0xA:
1163 /* Architectural Performance Monitoring Leaf */
1164 *eax = 0;
1165 *ebx = 0;
1166 *ecx = 0;
1167 *edx = 0;
1168 break;
51e49430
SY		 1169 case 0xD:
1170 /* Processor Extended State */
1171 if (!(env->cpuid_ext_features & CPUID_EXT_XSAVE)) {
1172 *eax = 0;
1173 *ebx = 0;
1174 *ecx = 0;
1175 *edx = 0;
1176 break;
1177 }
1178 if (kvm_enabled()) {
ba9bc59e
JK		 1179 KVMState *s = env->kvm_state;
1180
1181 *eax = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EAX);
1182 *ebx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EBX);
1183 *ecx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_ECX);
1184 *edx = kvm_arch_get_supported_cpuid(s, 0xd, count, R_EDX);
51e49430
SY		 1185 } else {
1186 *eax = 0;
1187 *ebx = 0;
1188 *ecx = 0;
1189 *edx = 0;
1190 }
1191 break;
c6dc6f63
AP		 1192 case 0x80000000:
1193 *eax = env->cpuid_xlevel;
1194 *ebx = env->cpuid_vendor1;
1195 *edx = env->cpuid_vendor2;
1196 *ecx = env->cpuid_vendor3;
1197 break;
1198 case 0x80000001:
1199 *eax = env->cpuid_version;
1200 *ebx = 0;
1201 *ecx = env->cpuid_ext3_features;
1202 *edx = env->cpuid_ext2_features;
1203
1204 /* The Linux kernel checks for the CMPLegacy bit and
1205 * discards multiple thread information if it is set.
1206 * So dont set it here for Intel to make Linux guests happy.
1207 */
1208 if (env->nr_cores * env->nr_threads > 1) {
1209 uint32_t tebx, tecx, tedx;
1210 get_cpuid_vendor(env, &tebx, &tecx, &tedx);
1211 if (tebx != CPUID_VENDOR_INTEL_1 ||
1212 tedx != CPUID_VENDOR_INTEL_2 ||
1213 tecx != CPUID_VENDOR_INTEL_3) {
1214 *ecx |= 1 << 1; /* CmpLegacy bit */
1215 }
1216 }
c6dc6f63
AP		 1217 break;
1218 case 0x80000002:
1219 case 0x80000003:
1220 case 0x80000004:
1221 *eax = env->cpuid_model[(index - 0x80000002) * 4 + 0];
1222 *ebx = env->cpuid_model[(index - 0x80000002) * 4 + 1];
1223 *ecx = env->cpuid_model[(index - 0x80000002) * 4 + 2];
1224 *edx = env->cpuid_model[(index - 0x80000002) * 4 + 3];
1225 break;
1226 case 0x80000005:
1227 /* cache info (L1 cache) */
1228 *eax = 0x01ff01ff;
1229 *ebx = 0x01ff01ff;
1230 *ecx = 0x40020140;
1231 *edx = 0x40020140;
1232 break;
1233 case 0x80000006:
1234 /* cache info (L2 cache) */
1235 *eax = 0;
1236 *ebx = 0x42004200;
1237 *ecx = 0x02008140;
1238 *edx = 0;
1239 break;
1240 case 0x80000008:
1241 /* virtual & phys address size in low 2 bytes. */
1242/* XXX: This value must match the one used in the MMU code. */
1243 if (env->cpuid_ext2_features & CPUID_EXT2_LM) {
1244 /* 64 bit processor */
1245/* XXX: The physical address space is limited to 42 bits in exec.c. */
1246 *eax = 0x00003028; /* 48 bits virtual, 40 bits physical */
1247 } else {
1248 if (env->cpuid_features & CPUID_PSE36)
1249 *eax = 0x00000024; /* 36 bits physical */
1250 else
1251 *eax = 0x00000020; /* 32 bits physical */
1252 }
1253 *ebx = 0;
1254 *ecx = 0;
1255 *edx = 0;
1256 if (env->nr_cores * env->nr_threads > 1) {
1257 *ecx |= (env->nr_cores * env->nr_threads) - 1;
1258 }
1259 break;
1260 case 0x8000000A:
296acb64
JR		 1261 if (env->cpuid_ext3_features & CPUID_EXT3_SVM) {
1262 *eax = 0x00000001; /* SVM Revision */
1263 *ebx = 0x00000010; /* nr of ASIDs */
1264 *ecx = 0;
1265 *edx = env->cpuid_svm_features; /* optional features */
1266 } else {
1267 *eax = 0;
1268 *ebx = 0;
1269 *ecx = 0;
1270 *edx = 0;
1271 }
c6dc6f63 1272 break;
b3baa152
BW		 1273 case 0xC0000000:
1274 *eax = env->cpuid_xlevel2;
1275 *ebx = 0;
1276 *ecx = 0;
1277 *edx = 0;
1278 break;
1279 case 0xC0000001:
1280 /* Support for VIA CPU's CPUID instruction */
1281 *eax = env->cpuid_version;
1282 *ebx = 0;
1283 *ecx = 0;
1284 *edx = env->cpuid_ext4_features;
1285 break;
1286 case 0xC0000002:
1287 case 0xC0000003:
1288 case 0xC0000004:
1289 /* Reserved for the future, and now filled with zero */
1290 *eax = 0;
1291 *ebx = 0;
1292 *ecx = 0;
1293 *edx = 0;
1294 break;
c6dc6f63
AP		 1295 default:
1296 /* reserved values: zero */
1297 *eax = 0;
1298 *ebx = 0;
1299 *ecx = 0;
1300 *edx = 0;
1301 break;
1302 }
1303}
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