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cpu: Turn cpu_get_phys_page_debug() into a CPUClass hook
[mirror_qemu.git] / target-xtensa / cpu.c
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1/*
2 * QEMU Xtensa CPU
3 *
5087a72c 4 * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
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5 * Copyright (c) 2012 SUSE LINUX Products GmbH
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 * * Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * * Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * * Neither the name of the Open Source and Linux Lab nor the
16 * names of its contributors may be used to endorse or promote products
17 * derived from this software without specific prior written permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
23 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
26 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 */
30
15be3171 31#include "cpu.h"
a4633e16 32#include "qemu-common.h"
004a5690 33#include "migration/vmstate.h"
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34
35
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36static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
37{
38 XtensaCPU *cpu = XTENSA_CPU(cs);
39
40 cpu->env.pc = value;
41}
42
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43/* CPUClass::reset() */
44static void xtensa_cpu_reset(CPUState *s)
45{
46 XtensaCPU *cpu = XTENSA_CPU(s);
47 XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(cpu);
48 CPUXtensaState *env = &cpu->env;
49
50 xcc->parent_reset(s);
51
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52 env->exception_taken = 0;
53 env->pc = env->config->exception_vector[EXC_RESET];
54 env->sregs[LITBASE] &= ~1;
55 env->sregs[PS] = xtensa_option_enabled(env->config,
56 XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
57 env->sregs[VECBASE] = env->config->vecbase;
58 env->sregs[IBREAKENABLE] = 0;
4e41d2f5 59 env->sregs[CACHEATTR] = 0x22222222;
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60 env->sregs[ATOMCTL] = xtensa_option_enabled(env->config,
61 XTENSA_OPTION_ATOMCTL) ? 0x28 : 0x15;
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62
63 env->pending_irq_level = 0;
64 reset_mmu(env);
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65}
66
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67static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
68{
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69 XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
70
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71 xcc->parent_realize(dev, errp);
72}
73
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74static void xtensa_cpu_initfn(Object *obj)
75{
c05efcb1 76 CPUState *cs = CPU(obj);
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77 XtensaCPU *cpu = XTENSA_CPU(obj);
78 CPUXtensaState *env = &cpu->env;
25733ead 79 static bool tcg_inited;
e554bbc6 80
c05efcb1 81 cs->env_ptr = env;
e554bbc6 82 cpu_exec_init(env);
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83
84 if (tcg_enabled() && !tcg_inited) {
85 tcg_inited = true;
86 xtensa_translate_init();
87 cpu_set_debug_excp_handler(xtensa_breakpoint_handler);
88 }
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89}
90
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91static const VMStateDescription vmstate_xtensa_cpu = {
92 .name = "cpu",
93 .unmigratable = 1,
94};
95
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96static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
97{
004a5690 98 DeviceClass *dc = DEVICE_CLASS(oc);
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99 CPUClass *cc = CPU_CLASS(oc);
100 XtensaCPUClass *xcc = XTENSA_CPU_CLASS(cc);
101
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102 xcc->parent_realize = dc->realize;
103 dc->realize = xtensa_cpu_realizefn;
104
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105 xcc->parent_reset = cc->reset;
106 cc->reset = xtensa_cpu_reset;
004a5690 107
97a8ea5a 108 cc->do_interrupt = xtensa_cpu_do_interrupt;
878096ee 109 cc->dump_state = xtensa_cpu_dump_state;
f45748f1 110 cc->set_pc = xtensa_cpu_set_pc;
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111#ifndef CONFIG_USER_ONLY
112 cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
113#endif
004a5690 114 dc->vmsd = &vmstate_xtensa_cpu;
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115}
116
117static const TypeInfo xtensa_cpu_type_info = {
118 .name = TYPE_XTENSA_CPU,
119 .parent = TYPE_CPU,
120 .instance_size = sizeof(XtensaCPU),
e554bbc6 121 .instance_init = xtensa_cpu_initfn,
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122 .abstract = false,
123 .class_size = sizeof(XtensaCPUClass),
124 .class_init = xtensa_cpu_class_init,
125};
126
127static void xtensa_cpu_register_types(void)
128{
129 type_register_static(&xtensa_cpu_type_info);
130}
131
132type_init(xtensa_cpu_register_types)