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ed69e831 CF |
1 | /* |
2 | * TCG specific prototypes for helpers | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef I386_HELPER_TCG_H | |
21 | #define I386_HELPER_TCG_H | |
22 | ||
23 | #include "exec/exec-all.h" | |
24 | ||
25 | /* Maximum instruction code size */ | |
26 | #define TARGET_MAX_INSN_SIZE 16 | |
27 | ||
b8184135 | 28 | #if defined(TARGET_X86_64) |
ed69e831 | 29 | # define TCG_PHYS_ADDR_BITS 40 |
b8184135 | 30 | #else |
ed69e831 | 31 | # define TCG_PHYS_ADDR_BITS 36 |
b8184135 | 32 | #endif |
ed69e831 | 33 | |
b8184135 | 34 | QEMU_BUILD_BUG_ON(TCG_PHYS_ADDR_BITS > TARGET_PHYS_ADDR_SPACE_BITS); |
ed69e831 CF |
35 | |
36 | /** | |
37 | * x86_cpu_do_interrupt: | |
38 | * @cpu: vCPU the interrupt is to be handled by. | |
39 | */ | |
40 | void x86_cpu_do_interrupt(CPUState *cpu); | |
60466472 | 41 | #ifndef CONFIG_USER_ONLY |
ec1d32af | 42 | void x86_cpu_exec_halt(CPUState *cpu); |
6ae75481 | 43 | bool x86_need_replay_interrupt(int interrupt_request); |
ed69e831 | 44 | bool x86_cpu_exec_interrupt(CPUState *cpu, int int_req); |
60466472 | 45 | #endif |
ed69e831 | 46 | |
ed69e831 CF |
47 | void breakpoint_handler(CPUState *cs); |
48 | ||
49 | /* n must be a constant to be efficient */ | |
50 | static inline target_long lshift(target_long x, int n) | |
51 | { | |
52 | if (n >= 0) { | |
53 | return x << n; | |
54 | } else { | |
55 | return x >> (-n); | |
56 | } | |
57 | } | |
58 | ||
59 | /* translate.c */ | |
60 | void tcg_x86_init(void); | |
61 | ||
62 | /* excp_helper.c */ | |
8905770b MAL |
63 | G_NORETURN void raise_exception(CPUX86State *env, int exception_index); |
64 | G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index, | |
65 | uintptr_t retaddr); | |
66 | G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index, | |
67 | int error_code); | |
68 | G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index, | |
69 | int error_code, uintptr_t retaddr); | |
83280f6a | 70 | G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int next_eip_addend); |
958e1dd1 PB |
71 | G_NORETURN void handle_unaligned_access(CPUX86State *env, vaddr vaddr, |
72 | MMUAccessType access_type, | |
73 | uintptr_t retaddr); | |
74 | #ifdef CONFIG_USER_ONLY | |
75 | void x86_cpu_record_sigsegv(CPUState *cs, vaddr addr, | |
76 | MMUAccessType access_type, | |
77 | bool maperr, uintptr_t ra); | |
78 | void x86_cpu_record_sigbus(CPUState *cs, vaddr addr, | |
79 | MMUAccessType access_type, uintptr_t ra); | |
80 | #else | |
81 | bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size, | |
82 | MMUAccessType access_type, int mmu_idx, | |
83 | bool probe, uintptr_t retaddr); | |
84 | G_NORETURN void x86_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr, | |
85 | MMUAccessType access_type, | |
86 | int mmu_idx, uintptr_t retaddr); | |
87 | #endif | |
ed69e831 CF |
88 | |
89 | /* cc_helper.c */ | |
90 | extern const uint8_t parity_table[256]; | |
91 | ||
69483f31 CF |
92 | /* misc_helper.c */ |
93 | void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask); | |
8905770b | 94 | G_NORETURN void do_pause(CPUX86State *env); |
ed69e831 | 95 | |
3d4fce8b RH |
96 | /* sysemu/svm_helper.c */ |
97 | #ifndef CONFIG_USER_ONLY | |
8905770b MAL |
98 | G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code, |
99 | uint64_t exit_info_1, uintptr_t retaddr); | |
68775856 | 100 | void do_vmexit(CPUX86State *env); |
3d4fce8b | 101 | #endif |
ed69e831 CF |
102 | |
103 | /* seg_helper.c */ | |
104 | void do_interrupt_x86_hardirq(CPUX86State *env, int intno, int is_hw); | |
30493a03 CF |
105 | void do_interrupt_all(X86CPU *cpu, int intno, int is_int, |
106 | int error_code, target_ulong next_eip, int is_hw); | |
107 | void handle_even_inj(CPUX86State *env, int intno, int is_int, | |
108 | int error_code, int is_hw, int rm); | |
109 | int exception_has_error_code(int intno); | |
ed69e831 CF |
110 | |
111 | /* smm_helper.c */ | |
112 | void do_smm_enter(X86CPU *cpu); | |
113 | ||
6d8d1a03 CF |
114 | /* bpt_helper.c */ |
115 | bool check_hw_breakpoints(CPUX86State *env, bool force_dr6_update); | |
116 | ||
ed69e831 | 117 | #endif /* I386_HELPER_TCG_H */ |