#include "pci.h"
#include "pci_bridge.h"
#include "pci_internals.h"
+#include "msix.h"
+#include "msi.h"
#include "monitor.h"
#include "net.h"
#include "sysemu.h"
#include "loader.h"
#include "qemu-objects.h"
+#include "range.h"
//#define DEBUG_PCI
#ifdef DEBUG_PCI
dev->irq_state = 0;
pci_update_irq_status(dev);
/* Clear all writeable bits */
- pci_set_word(dev->config + PCI_COMMAND,
- pci_get_word(dev->config + PCI_COMMAND) &
- ~pci_get_word(dev->wmask + PCI_COMMAND));
+ pci_word_test_and_clear_mask(dev->config + PCI_COMMAND,
+ pci_get_word(dev->wmask + PCI_COMMAND) |
+ pci_get_word(dev->w1cmask + PCI_COMMAND));
dev->config[PCI_CACHE_LINE_SIZE] = 0x0;
dev->config[PCI_INTERRUPT_LINE] = 0x0;
for (r = 0; r < PCI_NUM_REGIONS; ++r) {
qemu_get_buffer(f, config, size);
for (i = 0; i < size; ++i) {
- if ((config[i] ^ s->config[i]) & s->cmask[i] & ~s->wmask[i]) {
+ if ((config[i] ^ s->config[i]) &
+ s->cmask[i] & ~s->wmask[i] & ~s->w1cmask[i]) {
qemu_free(config);
return -EINVAL;
}
}
/*
- * Parse [[<domain>:]<bus>:]<slot>, return -1 on error
+ * Parse [[<domain>:]<bus>:]<slot>, return -1 on error if funcp == NULL
+ * [[<domain>:]<bus>:]<slot>.<func>, return -1 on error
*/
-static int pci_parse_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp)
+int pci_parse_devaddr(const char *addr, int *domp, int *busp,
+ unsigned int *slotp, unsigned int *funcp)
{
const char *p;
char *e;
unsigned long val;
unsigned long dom = 0, bus = 0;
- unsigned slot = 0;
+ unsigned int slot = 0;
+ unsigned int func = 0;
p = addr;
val = strtoul(p, &e, 16);
}
}
- if (dom > 0xffff || bus > 0xff || val > 0x1f)
- return -1;
-
slot = val;
+ if (funcp != NULL) {
+ if (*e != '.')
+ return -1;
+
+ p = e + 1;
+ val = strtoul(p, &e, 16);
+ if (e == p)
+ return -1;
+
+ func = val;
+ }
+
+ /* if funcp == NULL func is 0 */
+ if (dom > 0xffff || bus > 0xff || slot > 0x1f || func > 7)
+ return -1;
+
if (*e)
return -1;
*domp = dom;
*busp = bus;
*slotp = slot;
+ if (funcp != NULL)
+ *funcp = func;
return 0;
}
if (!strncmp(addr, "pci_addr=", 9)) {
addr += 9;
}
- if (pci_parse_devaddr(addr, domp, busp, slotp)) {
+ if (pci_parse_devaddr(addr, domp, busp, slotp, NULL)) {
monitor_printf(mon, "Invalid pci address\n");
return -1;
}
return pci_find_bus(pci_find_root_bus(0), 0);
}
- if (pci_parse_devaddr(devaddr, &dom, &bus, &slot) < 0) {
+ if (pci_parse_devaddr(devaddr, &dom, &bus, &slot, NULL) < 0) {
return NULL;
}
}
/*
- * multifuction bit is interpreted in two ways as follows.
+ * multifunction bit is interpreted in two ways as follows.
* - all functions must set the bit to 1.
* Example: Intel X53
* - function 0 must set the bit, but the rest function (> 0)
pci_dev->config = qemu_mallocz(config_size);
pci_dev->cmask = qemu_mallocz(config_size);
pci_dev->wmask = qemu_mallocz(config_size);
+ pci_dev->w1cmask = qemu_mallocz(config_size);
pci_dev->used = qemu_mallocz(config_size);
}
qemu_free(pci_dev->config);
qemu_free(pci_dev->cmask);
qemu_free(pci_dev->wmask);
+ qemu_free(pci_dev->w1cmask);
qemu_free(pci_dev->used);
}
}
void pci_register_bar(PCIDevice *pci_dev, int region_num,
- pcibus_t size, int type,
+ pcibus_t size, uint8_t type,
PCIMapIORegionFunc *map_func)
{
PCIIORegion *r;
uint32_t addr;
- pcibus_t wmask;
-
- if ((unsigned int)region_num >= PCI_NUM_REGIONS)
- return;
+ uint64_t wmask;
+ assert(region_num >= 0);
+ assert(region_num < PCI_NUM_REGIONS);
if (size & (size-1)) {
fprintf(stderr, "ERROR: PCI region size must be pow2 "
"type=0x%x, size=0x%"FMT_PCIBUS"\n", type, size);
for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
uint8_t wmask = d->wmask[addr + i];
+ uint8_t w1cmask = d->w1cmask[addr + i];
+ assert(!(wmask & w1cmask));
d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask);
+ d->config[addr + i] &= ~(val & w1cmask); /* W1C: Write 1 to Clear */
}
if (ranges_overlap(addr, l, PCI_BASE_ADDRESS_0, 24) ||
ranges_overlap(addr, l, PCI_ROM_ADDRESS, 4) ||
pci_change_irq_level(pci_dev, irq_num, change);
}
+bool pci_msi_enabled(PCIDevice *dev)
+{
+ return msix_enabled(dev) || msi_enabled(dev);
+}
+
+void pci_msi_notify(PCIDevice *dev, unsigned int vector)
+{
+ if (msix_enabled(dev)) {
+ msix_notify(dev, vector);
+ } else if (msi_enabled(dev)) {
+ msi_notify(dev, vector);
+ } else {
+ /* MSI/MSI-X must be enabled */
+ abort();
+ }
+}
+
/***********************************************************/
/* monitor info on PCI */
pci_dev->romfile = qemu_strdup(info->romfile);
pci_add_option_rom(pci_dev);
- if (qdev->hotplugged) {
+ if (bus->hotplug) {
+ /* lower layer must check qdev->hotplugged */
rc = bus->hotplug(bus->hotplug_qdev, pci_dev, 1);
if (rc != 0) {
int r = pci_unregister_device(&pci_dev->qdev);
pdev->rom_offset = 0;
}
-/* Reserve space and add capability to the linked list in pci config space */
-int pci_add_capability_at_offset(PCIDevice *pdev, uint8_t cap_id,
- uint8_t offset, uint8_t size)
+/*
+ * if !offset
+ * Reserve space and add capability to the linked list in pci config space
+ *
+ * if offset = 0,
+ * Find and reserve space and add capability to the linked list
+ * in pci config space */
+int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
+ uint8_t offset, uint8_t size)
{
- uint8_t *config = pdev->config + offset;
+ uint8_t *config;
+ if (!offset) {
+ offset = pci_find_space(pdev, size);
+ if (!offset) {
+ return -ENOSPC;
+ }
+ }
+
+ config = pdev->config + offset;
config[PCI_CAP_LIST_ID] = cap_id;
config[PCI_CAP_LIST_NEXT] = pdev->config[PCI_CAPABILITY_LIST];
pdev->config[PCI_CAPABILITY_LIST] = offset;
return offset;
}
-/* Find and reserve space and add capability to the linked list
- * in pci config space */
-int pci_add_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
-{
- uint8_t offset = pci_find_space(pdev, size);
- if (!offset) {
- return -ENOSPC;
- }
- return pci_add_capability_at_offset(pdev, cap_id, offset, size);
-}
-
/* Unlink capability from the pci config space. */
void pci_del_capability(PCIDevice *pdev, uint8_t cap_id, uint8_t size)
{
pdev->config[prev] = pdev->config[offset + PCI_CAP_LIST_NEXT];
/* Make capability writeable again */
memset(pdev->wmask + offset, 0xff, size);
+ memset(pdev->w1cmask + offset, 0, size);
/* Clear cmask as device-specific registers can't be checked */
memset(pdev->cmask + offset, 0, size);
memset(pdev->used + offset, 0, size);
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