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(parent: ab6bff4) | patch
hw/mips/gt64xxx_pci: Align the pci0-mem size
authorPhilippe Mathieu-Daudé <f4bug@amsat.org>
Mon, 24 Jun 2019 22:28:41 +0000 (00:28 +0200)
committerAleksandar Markovic <amarkovic@wavecomp.com>
Wed, 26 Jun 2019 11:23:27 +0000 (13:23 +0200)
commit8110b2bf7ed6a5ed17c6fdd6f67a546c77f13f0d
tree1ceb0748b57acef9916bcb3e8927da83bbd30f90tree
parentab6bff424f455653c85380e253d79d00327b2aa3commit | diff
hw/mips/gt64xxx_pci: Align the pci0-mem size

One byte is missing, use an aligned size.

    (qemu) info mtree
    memory-region: pci0-mem
      0000000000000000-00000000fffffffe (prio 0, i/o): pci0-mem
                                      ^

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Message-Id: <20190624222844.26584-8-f4bug@amsat.org>
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